diff mbox series

[net,1/5] net: ethernet: mtk_eth_soc: revise mdc divider configuration

Message ID 08498e31e830cf0ee1ceb4fc1313d5c528a69150.1744654076.git.daniel@makrotopia.org (mailing list archive)
State New
Headers show
Series [net,1/5] net: ethernet: mtk_eth_soc: revise mdc divider configuration | expand

Commit Message

Daniel Golle April 14, 2025, 6:11 p.m. UTC
From: Bo-Cun Chen <bc-bocun.chen@mediatek.com>

In the current method, the MDC divider was reset to the default setting
of 2.5MHz after the NETSYS SER. Therefore, we need to move the MDC
divider configuration function to mtk_hw_init().

Fixes: c0a440031d431 ("net: ethernet: mtk_eth_soc: set MDIO bus clock frequency")
Signed-off-by: Bo-Cun Chen <bc-bocun.chen@mediatek.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
 drivers/net/ethernet/mediatek/mtk_eth_soc.c | 60 ++++++++++++++-------
 1 file changed, 42 insertions(+), 18 deletions(-)

Comments

Andrew Lunn April 14, 2025, 6:30 p.m. UTC | #1
On Mon, Apr 14, 2025 at 07:11:20PM +0100, Daniel Golle wrote:
> From: Bo-Cun Chen <bc-bocun.chen@mediatek.com>
> 
> In the current method, the MDC divider was reset to the default setting
> of 2.5MHz after the NETSYS SER. Therefore, we need to move the MDC
> divider configuration function to mtk_hw_init().
> 
> Fixes: c0a440031d431 ("net: ethernet: mtk_eth_soc: set MDIO bus clock frequency")
> Signed-off-by: Bo-Cun Chen <bc-bocun.chen@mediatek.com>
> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
> ---
>  drivers/net/ethernet/mediatek/mtk_eth_soc.c | 60 ++++++++++++++-------
>  1 file changed, 42 insertions(+), 18 deletions(-)
> 
> diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
> index 43197b28b3e74..fd643cc1b7dd2 100644
> --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
> +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
> @@ -871,11 +871,11 @@ static const struct phylink_mac_ops mtk_phylink_ops = {
>  	.mac_enable_tx_lpi = mtk_mac_enable_tx_lpi,
>  };
>  
> -static int mtk_mdio_init(struct mtk_eth *eth)
> +static int mtk_mdio_config(struct mtk_eth *eth)
>  {
>  	unsigned int max_clk = 2500000, divider;
>  	struct device_node *mii_np;
> -	int ret;
> +	int ret = 0;
>  	u32 val;
>  
>  	mii_np = of_get_available_child_by_name(eth->dev->of_node, "mdio-bus");
> @@ -884,22 +884,6 @@ static int mtk_mdio_init(struct mtk_eth *eth)
>  		return -ENODEV;
>  	}
>  
> -	eth->mii_bus = devm_mdiobus_alloc(eth->dev);
> -	if (!eth->mii_bus) {
> -		ret = -ENOMEM;
> -		goto err_put_node;
> -	}
> -
> -	eth->mii_bus->name = "mdio";
> -	eth->mii_bus->read = mtk_mdio_read_c22;
> -	eth->mii_bus->write = mtk_mdio_write_c22;
> -	eth->mii_bus->read_c45 = mtk_mdio_read_c45;
> -	eth->mii_bus->write_c45 = mtk_mdio_write_c45;
> -	eth->mii_bus->priv = eth;
> -	eth->mii_bus->parent = eth->dev;
> -
> -	snprintf(eth->mii_bus->id, MII_BUS_ID_SIZE, "%pOFn", mii_np);
> -
>  	if (!of_property_read_u32(mii_np, "clock-frequency", &val)) {
>  		if (val > MDC_MAX_FREQ || val < MDC_MAX_FREQ / MDC_MAX_DIVIDER) {
>  			dev_err(eth->dev, "MDIO clock frequency out of range");
> @@ -922,6 +906,42 @@ static int mtk_mdio_init(struct mtk_eth *eth)
>  
>  	dev_dbg(eth->dev, "MDC is running on %d Hz\n", MDC_MAX_FREQ / divider);
>  
> +err_put_node:
> +	of_node_put(mii_np);
> +	return ret;
> +}
> +
> +static int mtk_mdio_init(struct mtk_eth *eth)
> +{
> +	struct device_node *mii_np;
> +	int ret;
> +
> +	mii_np = of_get_child_by_name(eth->dev->of_node, "mdio-bus");
> +	if (!mii_np) {
> +		dev_err(eth->dev, "no %s child node found", "mdio-bus");
> +		return -ENODEV;
> +	}
> +
> +	if (!of_device_is_available(mii_np)) {
> +		ret = -ENODEV;
> +		goto err_put_node;
> +	}

It seems like you end up doing these checks twice. In theory it might
change between the calls, but it is very unlikely? Maybe just keep
node reference returned by of_get_child_by_name() and release it in
mtk_mdio_cleanup()?

Or calculate the divider in mtk_mdio_init() as is, but store it away
in struct mtk_eth, so you don't need to redo all the DT parsing?

	Andrew
diff mbox series

Patch

diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
index 43197b28b3e74..fd643cc1b7dd2 100644
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -871,11 +871,11 @@  static const struct phylink_mac_ops mtk_phylink_ops = {
 	.mac_enable_tx_lpi = mtk_mac_enable_tx_lpi,
 };
 
-static int mtk_mdio_init(struct mtk_eth *eth)
+static int mtk_mdio_config(struct mtk_eth *eth)
 {
 	unsigned int max_clk = 2500000, divider;
 	struct device_node *mii_np;
-	int ret;
+	int ret = 0;
 	u32 val;
 
 	mii_np = of_get_available_child_by_name(eth->dev->of_node, "mdio-bus");
@@ -884,22 +884,6 @@  static int mtk_mdio_init(struct mtk_eth *eth)
 		return -ENODEV;
 	}
 
-	eth->mii_bus = devm_mdiobus_alloc(eth->dev);
-	if (!eth->mii_bus) {
-		ret = -ENOMEM;
-		goto err_put_node;
-	}
-
-	eth->mii_bus->name = "mdio";
-	eth->mii_bus->read = mtk_mdio_read_c22;
-	eth->mii_bus->write = mtk_mdio_write_c22;
-	eth->mii_bus->read_c45 = mtk_mdio_read_c45;
-	eth->mii_bus->write_c45 = mtk_mdio_write_c45;
-	eth->mii_bus->priv = eth;
-	eth->mii_bus->parent = eth->dev;
-
-	snprintf(eth->mii_bus->id, MII_BUS_ID_SIZE, "%pOFn", mii_np);
-
 	if (!of_property_read_u32(mii_np, "clock-frequency", &val)) {
 		if (val > MDC_MAX_FREQ || val < MDC_MAX_FREQ / MDC_MAX_DIVIDER) {
 			dev_err(eth->dev, "MDIO clock frequency out of range");
@@ -922,6 +906,42 @@  static int mtk_mdio_init(struct mtk_eth *eth)
 
 	dev_dbg(eth->dev, "MDC is running on %d Hz\n", MDC_MAX_FREQ / divider);
 
+err_put_node:
+	of_node_put(mii_np);
+	return ret;
+}
+
+static int mtk_mdio_init(struct mtk_eth *eth)
+{
+	struct device_node *mii_np;
+	int ret;
+
+	mii_np = of_get_child_by_name(eth->dev->of_node, "mdio-bus");
+	if (!mii_np) {
+		dev_err(eth->dev, "no %s child node found", "mdio-bus");
+		return -ENODEV;
+	}
+
+	if (!of_device_is_available(mii_np)) {
+		ret = -ENODEV;
+		goto err_put_node;
+	}
+
+	eth->mii_bus = devm_mdiobus_alloc(eth->dev);
+	if (!eth->mii_bus) {
+		ret = -ENOMEM;
+		goto err_put_node;
+	}
+
+	eth->mii_bus->name = "mdio";
+	eth->mii_bus->read = mtk_mdio_read_c22;
+	eth->mii_bus->write = mtk_mdio_write_c22;
+	eth->mii_bus->read_c45 = mtk_mdio_read_c45;
+	eth->mii_bus->write_c45 = mtk_mdio_write_c45;
+	eth->mii_bus->priv = eth;
+	eth->mii_bus->parent = eth->dev;
+
+	snprintf(eth->mii_bus->id, MII_BUS_ID_SIZE, "%pOFn", mii_np);
 	ret = of_mdiobus_register(eth->mii_bus, mii_np);
 
 err_put_node:
@@ -3974,6 +3994,10 @@  static int mtk_hw_init(struct mtk_eth *eth, bool reset)
 	else
 		mtk_hw_reset(eth);
 
+	/* No MT7628/88 support yet */
+	if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628))
+		mtk_mdio_config(eth);
+
 	if (mtk_is_netsys_v3_or_greater(eth)) {
 		/* Set FE to PDMAv2 if necessary */
 		val = mtk_r32(eth, MTK_FE_GLO_MISC);