| Message ID | 20120722130355.GA29138@mudshark.cambridge.arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 07/22/2012 03:03 PM, Will Deacon wrote: > On Sat, Jul 21, 2012 at 03:47:37PM +0100, Gilles Chanteperdrix wrote: >> On 07/21/2012 04:40 PM, Gilles Chanteperdrix wrote: >>> On 07/21/2012 04:35 PM, Will Deacon wrote: >>>> Hi Gilles, >>>> >>>> On Sat, Jul 21, 2012 at 02:18:35PM +0100, Gilles Chanteperdrix wrote: >>>>> On 07/20/2012 10:41 PM, Gilles Chanteperdrix wrote: >>>>>> Being 0 or 1 whether we want to flush the vector page (I believe we do >>>>>> not want to flush it, but am not sure). >>>>> >>>>> Actually, I believe we want to flush the vector page, at least on >>>>> systems with VIVT cache: on systems with VIVT cache, the vector page is >>>>> writeable in kernel mode, so may have been modified, and the address >>>>> used by elf_core_dump is not the vectors address, but the address in the >>>>> kernel direct-mapped RAM region where the vector page was allocated, so >>>>> there is a cache aliasing issue. >>>> >>>> It may be writable, but we never actually write to it after it has been >>>> initialised so there's no need to worry about caching issues (the cache is >>>> flushed in devicemaps_init). >>> >>> Except if CONFIG_TLS_REG_EMUL is enabled >> >> is disabled I mean. > > Well spotted! I disagree about the address being flushed though -- it looks > to me like we flush from 0xffff0000 - 0xffff1000, which is what we want. Why > do you think we're flushing from the linear mapping? I do not think we're flushing from the linear mapping, I believe the address used by the elf_core_dump function (elf_core_dump -> kmap -> page_address), to copy the page data to the core is the linear mapping address, which is the reason why we need the flush at all.
On Sun, Jul 22, 2012 at 02:26:03PM +0100, Gilles Chanteperdrix wrote: > On 07/22/2012 03:03 PM, Will Deacon wrote: > > On Sat, Jul 21, 2012 at 03:47:37PM +0100, Gilles Chanteperdrix wrote: > >> On 07/21/2012 04:40 PM, Gilles Chanteperdrix wrote: > >>> On 07/21/2012 04:35 PM, Will Deacon wrote: > >>>> It may be writable, but we never actually write to it after it has been > >>>> initialised so there's no need to worry about caching issues (the cache is > >>>> flushed in devicemaps_init). > >>> > >>> Except if CONFIG_TLS_REG_EMUL is enabled > >> > >> is disabled I mean. > > > > Well spotted! I disagree about the address being flushed though -- it looks > > to me like we flush from 0xffff0000 - 0xffff1000, which is what we want. Why > > do you think we're flushing from the linear mapping? > > I do not think we're flushing from the linear mapping, I believe the > address used by the elf_core_dump function (elf_core_dump -> kmap -> > page_address), to copy the page data to the core is the linear mapping > address, which is the reason why we need the flush at all. Ok, good, sounds like we're singing the same tune at last. If you're happy with my proposed change to the original patch and Uros could re-test, then I think we're in business again. Cheers, Will
On 07/22/2012 05:09 PM, Will Deacon wrote: > On Sun, Jul 22, 2012 at 02:26:03PM +0100, Gilles Chanteperdrix wrote: >> On 07/22/2012 03:03 PM, Will Deacon wrote: >>> On Sat, Jul 21, 2012 at 03:47:37PM +0100, Gilles Chanteperdrix wrote: >>>> On 07/21/2012 04:40 PM, Gilles Chanteperdrix wrote: >>>>> On 07/21/2012 04:35 PM, Will Deacon wrote: >>>>>> It may be writable, but we never actually write to it after it has been >>>>>> initialised so there's no need to worry about caching issues (the cache is >>>>>> flushed in devicemaps_init). >>>>> >>>>> Except if CONFIG_TLS_REG_EMUL is enabled >>>> >>>> is disabled I mean. >>> >>> Well spotted! I disagree about the address being flushed though -- it looks >>> to me like we flush from 0xffff0000 - 0xffff1000, which is what we want. Why >>> do you think we're flushing from the linear mapping? >> >> I do not think we're flushing from the linear mapping, I believe the >> address used by the elf_core_dump function (elf_core_dump -> kmap -> >> page_address), to copy the page data to the core is the linear mapping >> address, which is the reason why we need the flush at all. > > Ok, good, sounds like we're singing the same tune at last. If you're happy > with my proposed change to the original patch and Uros could re-test, then I > think we're in business again. It is OK for me.
On Sun, Jul 22, 2012 at 5:09 PM, Will Deacon <will.deacon@arm.com> wrote: >> >>>> It may be writable, but we never actually write to it after it has been >> >>>> initialised so there's no need to worry about caching issues (the cache is >> >>>> flushed in devicemaps_init). >> >>> >> >>> Except if CONFIG_TLS_REG_EMUL is enabled >> >> >> >> is disabled I mean. >> > >> > Well spotted! I disagree about the address being flushed though -- it looks >> > to me like we flush from 0xffff0000 - 0xffff1000, which is what we want. Why >> > do you think we're flushing from the linear mapping? >> >> I do not think we're flushing from the linear mapping, I believe the >> address used by the elf_core_dump function (elf_core_dump -> kmap -> >> page_address), to copy the page data to the core is the linear mapping >> address, which is the reason why we need the flush at all. > > Ok, good, sounds like we're singing the same tune at last. If you're happy > with my proposed change to the original patch and Uros could re-test, then I > think we're in business again. The updated patch is effectively the same as the patch at [1], which works for our target as well. This patch was also tested on 3.4 branch, where it fixes the same problem. For the patch, I can add: Tested-by: Uros Bizjak <ubizjak@gmail.com> [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2012-June/105047.html Thanks, Uros.
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h index 8cf828e..e4448e1 100644 --- a/arch/arm/include/asm/cacheflush.h +++ b/arch/arm/include/asm/cacheflush.h @@ -217,7 +217,7 @@ vivt_flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned { struct mm_struct *mm = vma->vm_mm; - if (mm && cpumask_test_cpu(smp_processor_id(), mm_cpumask(mm))) + if (!mm || cpumask_test_cpu(smp_processor_id(), mm_cpumask(mm))) __cpuc_flush_user_range(start & PAGE_MASK, PAGE_ALIGN(end), vma->vm_flags); } @@ -227,7 +227,7 @@ vivt_flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsig { struct mm_struct *mm = vma->vm_mm; - if (mm && cpumask_test_cpu(smp_processor_id(), mm_cpumask(mm))) { + if (!mm || cpumask_test_cpu(smp_processor_id(), mm_cpumask(mm))) { unsigned long addr = user_addr & PAGE_MASK; __cpuc_flush_user_range(addr, addr + PAGE_SIZE, vma->vm_flags); }