| Message ID | 50473A67.6000805@ti.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wed, Sep 5, 2012 at 5:11 PM, Benoit Cousson <b-cousson@ti.com> wrote: > > Hi Tony, > > On 09/05/2012 02:03 AM, Tony Lindgren wrote: > > If NR_IRQS is less than MAX_IRQS, we end up writing past the > > irq_target_cpu array in omap_wakeupgen_init(): > > > > /* Associate all the IRQs to boot CPU like GIC init does. */ > > for (i = 0; i < max_irqs; i++) > > irq_target_cpu[i] = boot_cpu; > > > > This can happen if SPARSE_IRQ is enabled as by default NR_IRQS is > > set to 16. Without this patch we're overwriting other data during > > the boot. > > In fact I already sent a patch to fix that when I started my SPARSE_IRQ > cleanup, but it looks like it was never merged :-( > I guess I forgot a little bit that series. > Indeed. I remember acking few patches in that series. Infact this patch set was the basis on which I was talking to Arnd that SPARSE_IRQ should work on OMAP. Didn't think that it has not made it yet in mainline. Regards Santosh
* Shilimkar, Santosh <santosh.shilimkar@ti.com> [120905 06:17]: > On Wed, Sep 5, 2012 at 5:11 PM, Benoit Cousson <b-cousson@ti.com> wrote: > > > > Hi Tony, > > > > On 09/05/2012 02:03 AM, Tony Lindgren wrote: > > > If NR_IRQS is less than MAX_IRQS, we end up writing past the > > > irq_target_cpu array in omap_wakeupgen_init(): > > > > > > /* Associate all the IRQs to boot CPU like GIC init does. */ > > > for (i = 0; i < max_irqs; i++) > > > irq_target_cpu[i] = boot_cpu; > > > > > > This can happen if SPARSE_IRQ is enabled as by default NR_IRQS is > > > set to 16. Without this patch we're overwriting other data during > > > the boot. > > > > In fact I already sent a patch to fix that when I started my SPARSE_IRQ > > cleanup, but it looks like it was never merged :-( > > I guess I forgot a little bit that series. > > > Indeed. I remember acking few patches in that series. > Infact this patch set was the basis on which I was talking to Arnd > that SPARSE_IRQ > should work on OMAP. Didn't think that it has not made it yet in mainline. Bummer. That means duplicate wasted effort was done :( Looks like the original patch no longer applies because of commit 247c445c0 (ARM: OMAP5: Add the WakeupGen IP updates). So I'll just update the comments to mention Benoit's original patch. I guess the lesson here is that everybody must follow up on their own patches to make sure they get merged. Especially on fixes. Benoit, can you please check if some parts of your earlier series are still needed in the testing-cleanup branch? BTW, there was also Felipe's TWL removal patch that was done in a slightly different way "[PATCH] arm: omap: drop unused IRQ defines: http://lists.infradead.org/pipermail/linux-arm-kernel/2012-June/103274.html# Regards, Tony
diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c b/arch/arm/mach-omap2/omap-wak index d3d8971..bec55e1 100644 --- a/arch/arm/mach-omap2/omap-wakeupgen.c +++ b/arch/arm/mach-omap2/omap-wakeupgen.c @@ -45,7 +45,7 @@ static void __iomem *wakeupgen_base; static void __iomem *sar_base; static DEFINE_PER_CPU(u32 [NR_REG_BANKS], irqmasks); static DEFINE_SPINLOCK(wakeupgen_lock); -static unsigned int irq_target_cpu[NR_IRQS]; +static unsigned int irq_target_cpu[MAX_IRQS]; /* * Static helper functions. @@ -379,7 +379,7 @@ int __init omap_wakeupgen_init(void) */ /* Associate all the IRQs to boot CPU like GIC init does. */ - for (i = 0; i < NR_IRQS; i++) + for (i = 0; i < MAX_IRQS; i++) irq_target_cpu[i] = boot_cpu; irq_hotplug_init();