Message ID | CAKvkGKfjShpdTagsHAhyMr3rHfUQc4qpZjW9wMdht4N36Pk5rA@mail.gmail.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Tue, Sep 18, 2012 at 04:07:49PM +0800, ??? wrote: > Russell King want people to move to SGI0 for this, so that we can have SGI1-N > as the proper IPIs, but now we can't do this, maybe we must wait for > so many years. > But, Do you think we can use a another way to resolve this problem, > because this warning message will oftenly appeare in products. > > We can't assume the fixed IPI number that can wakeup secondary cores. > "I'd much rather see platforms deciding whether they need to use SGI1 > or whether they can switch to SGI0 instead." Why not just fix your platform to use SGI0. I think we're _finally_ there with everyone using SGI0, which means we can commit the patch which fixes this. And anyway, how many of your customers read your kernel log messages?
On 09/18/12 02:38, Russell King - ARM Linux wrote: > On Tue, Sep 18, 2012 at 04:07:49PM +0800, ??? wrote: >> Russell King want people to move to SGI0 for this, so that we can have SGI1-N >> as the proper IPIs, but now we can't do this, maybe we must wait for >> so many years. >> But, Do you think we can use a another way to resolve this problem, >> because this warning message will oftenly appeare in products. >> >> We can't assume the fixed IPI number that can wakeup secondary cores. >> "I'd much rather see platforms deciding whether they need to use SGI1 >> or whether they can switch to SGI0 instead." > Why not just fix your platform to use SGI0. I think we're _finally_ > there with everyone using SGI0, which means we can commit the patch > which fixes this. > Yes. I'm going to put it in the patch tracker now. https://patchwork.kernel.org/patch/1433931/
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index ea73045..8605400 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -25,6 +25,7 @@ #include <linux/percpu.h> #include <linux/clockchips.h> #include <linux/completion.h> +#include <linux/threads.h> #include <linux/atomic.h> #include <asm/cacheflush.h> @@ -495,11 +496,28 @@ asmlinkage void __exception_irq_entry do_IPI(int ipinr, struct pt_regs *regs) handle_IPI(ipinr, regs); } +static int ipi_wakeup_nr[NR_CPUS]; + +void smp_send_wakeup_ipi_begin(unsigned int cpu, unsigned int irq) +{ + ipi_wakeup_nr[cpu] = irq + 1; + gic_raise_softirq(cpumask_of(cpu),irq); +} + +void smp_send_wakeup_ipi_end(unsigned int cpu, unsigned int irq) +{ + BUG_ON(ipi_wakeup_nr[cpu] != irq + 1); + ipi_wakeup_nr[cpu] = 0; +} + void handle_IPI(int ipinr, struct pt_regs *regs) { unsigned int cpu = smp_processor_id(); struct pt_regs *old_regs = set_irq_regs(regs); + if (ipi_wakeup_nr[cpu] == ipinr + 1) + goto Exit; + if (ipinr >= IPI_TIMER && ipinr < IPI_TIMER + NR_IPI) __inc_irq_stat(cpu, ipi_irqs[ipinr - IPI_TIMER]); @@ -537,6 +555,7 @@ void handle_IPI(int ipinr, struct pt_regs *regs) cpu, ipinr); break; } +Exit: set_irq_regs(old_regs); }