diff mbox

ARM: Orion5x: Fix too small coherent pool.

Message ID 1348466073-22726-1-git-send-email-andrew@lunn.ch (mailing list archive)
State New, archived
Headers show

Commit Message

Andrew Lunn Sept. 24, 2012, 5:54 a.m. UTC
Some Orion5x devices allocate their coherent buffers from atomic
context. Increase size of atomic coherent pool to make sure such the
allocations won't fail during boot.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
 arch/arm/mach-orion5x/common.c |    7 +++++++
 1 file changed, 7 insertions(+)

Comments

Jason Cooper Sept. 24, 2012, 4:37 p.m. UTC | #1
On Mon, Sep 24, 2012 at 07:54:33AM +0200, Andrew Lunn wrote:
> Some Orion5x devices allocate their coherent buffers from atomic
> context. Increase size of atomic coherent pool to make sure such the
> allocations won't fail during boot.
> 
> Signed-off-by: Andrew Lunn <andrew@lunn.ch>

Acked-by: Jason Cooper <jason@lakedaemon.net>

btw - we should take this to it's logical conclusion and have Sebastian
check Dove.  Sebastian?

thx,

Jason.

> ---
>  arch/arm/mach-orion5x/common.c |    7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
> index 410291c..a6cd14a 100644
> --- a/arch/arm/mach-orion5x/common.c
> +++ b/arch/arm/mach-orion5x/common.c
> @@ -204,6 +204,13 @@ void __init orion5x_wdt_init(void)
>  void __init orion5x_init_early(void)
>  {
>  	orion_time_set_base(TIMER_VIRT_BASE);
> +
> +	/*
> +	 * Some Orion5x devices allocate their coherent buffers from atomic
> +	 * context. Increase size of atomic coherent pool to make sure such
> +	 * the allocations won't fail.
> +	 */
> +	init_dma_coherent_pool_size(SZ_1M);
>  }
>  
>  int orion5x_tclk;
> -- 
> 1.7.10.4
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Andrew Lunn Sept. 24, 2012, 5:37 p.m. UTC | #2
On Mon, Sep 24, 2012 at 12:37:16PM -0400, Jason Cooper wrote:
> On Mon, Sep 24, 2012 at 07:54:33AM +0200, Andrew Lunn wrote:
> > Some Orion5x devices allocate their coherent buffers from atomic
> > context. Increase size of atomic coherent pool to make sure such the
> > allocations won't fail during boot.
> > 
> > Signed-off-by: Andrew Lunn <andrew@lunn.ch>
> 
> Acked-by: Jason Cooper <jason@lakedaemon.net>
> 
> btw - we should take this to it's logical conclusion and have Sebastian
> check Dove.  Sebastian?

I did think about that. It probably hits if you have two sata
devices. However, all current Dove machines have just one.

	 Andrew
Sebastian Hesselbarth Sept. 24, 2012, 11:16 p.m. UTC | #3
On 09/24/2012 07:37 PM, Andrew Lunn wrote:
> On Mon, Sep 24, 2012 at 12:37:16PM -0400, Jason Cooper wrote:
>> On Mon, Sep 24, 2012 at 07:54:33AM +0200, Andrew Lunn wrote:
>>> Some Orion5x devices allocate their coherent buffers from atomic
>>> context. Increase size of atomic coherent pool to make sure such the
>>> allocations won't fail during boot.
>>>
>>> Signed-off-by: Andrew Lunn<andrew@lunn.ch>
>>
>> Acked-by: Jason Cooper<jason@lakedaemon.net>
>>
>> btw - we should take this to it's logical conclusion and have Sebastian
>> check Dove.  Sebastian?
>
> I did think about that. It probably hits if you have two sata
> devices. However, all current Dove machines have just one.

Jason, Andrew,

I did boot arm-soc/for-next on Cubox and looks like 256k pool for atomic
coherent allocations is enough. I booted with sata, sdhci0, eth0, i2c0,
spi0, and both pcie ports forced on without any pcie devices attached.

Sebastian
Jason Cooper Sept. 24, 2012, 11:45 p.m. UTC | #4
On Tue, Sep 25, 2012 at 01:16:10AM +0200, Sebastian Hesselbarth wrote:
> On 09/24/2012 07:37 PM, Andrew Lunn wrote:
> >On Mon, Sep 24, 2012 at 12:37:16PM -0400, Jason Cooper wrote:
> >>On Mon, Sep 24, 2012 at 07:54:33AM +0200, Andrew Lunn wrote:
> >>>Some Orion5x devices allocate their coherent buffers from atomic
> >>>context. Increase size of atomic coherent pool to make sure such the
> >>>allocations won't fail during boot.
> >>>
> >>>Signed-off-by: Andrew Lunn<andrew@lunn.ch>
> >>
> >>Acked-by: Jason Cooper<jason@lakedaemon.net>
> >>
> >>btw - we should take this to it's logical conclusion and have Sebastian
> >>check Dove.  Sebastian?
> >
> >I did think about that. It probably hits if you have two sata
> >devices. However, all current Dove machines have just one.
> 
> I did boot arm-soc/for-next on Cubox and looks like 256k pool for atomic
> coherent allocations is enough. I booted with sata, sdhci0, eth0, i2c0,
> spi0, and both pcie ports forced on without any pcie devices attached.

Thanks for testing, Sebastian.

Andrew, I'll put this into a late/fixes branch for arm-soc and send it
on up.

thx,

Jason.
Olof Johansson Sept. 24, 2012, 11:47 p.m. UTC | #5
On Mon, Sep 24, 2012 at 4:45 PM, Jason Cooper <jason@lakedaemon.net> wrote:
> On Tue, Sep 25, 2012 at 01:16:10AM +0200, Sebastian Hesselbarth wrote:
>> On 09/24/2012 07:37 PM, Andrew Lunn wrote:
>> >On Mon, Sep 24, 2012 at 12:37:16PM -0400, Jason Cooper wrote:
>> >>On Mon, Sep 24, 2012 at 07:54:33AM +0200, Andrew Lunn wrote:
>> >>>Some Orion5x devices allocate their coherent buffers from atomic
>> >>>context. Increase size of atomic coherent pool to make sure such the
>> >>>allocations won't fail during boot.
>> >>>
>> >>>Signed-off-by: Andrew Lunn<andrew@lunn.ch>
>> >>
>> >>Acked-by: Jason Cooper<jason@lakedaemon.net>
>> >>
>> >>btw - we should take this to it's logical conclusion and have Sebastian
>> >>check Dove.  Sebastian?
>> >
>> >I did think about that. It probably hits if you have two sata
>> >devices. However, all current Dove machines have just one.
>>
>> I did boot arm-soc/for-next on Cubox and looks like 256k pool for atomic
>> coherent allocations is enough. I booted with sata, sdhci0, eth0, i2c0,
>> spi0, and both pcie ports forced on without any pcie devices attached.
>
> Thanks for testing, Sebastian.
>
> Andrew, I'll put this into a late/fixes branch for arm-soc and send it
> on up.

I can just apply it in fixes here with your ack and send it up for 3.6 tonight.



-Olof
Jason Cooper Sept. 25, 2012, 12:04 a.m. UTC | #6
On Mon, Sep 24, 2012 at 04:47:35PM -0700, Olof Johansson wrote:
> On Mon, Sep 24, 2012 at 4:45 PM, Jason Cooper <jason@lakedaemon.net> wrote:
> > On Tue, Sep 25, 2012 at 01:16:10AM +0200, Sebastian Hesselbarth wrote:
> >> On 09/24/2012 07:37 PM, Andrew Lunn wrote:
> >> >On Mon, Sep 24, 2012 at 12:37:16PM -0400, Jason Cooper wrote:
> >> >>On Mon, Sep 24, 2012 at 07:54:33AM +0200, Andrew Lunn wrote:
> >> >>>Some Orion5x devices allocate their coherent buffers from atomic
> >> >>>context. Increase size of atomic coherent pool to make sure such the
> >> >>>allocations won't fail during boot.
> >> >>>
> >> >>>Signed-off-by: Andrew Lunn<andrew@lunn.ch>
> >> >>
> >> >>Acked-by: Jason Cooper<jason@lakedaemon.net>
> >> >>
> >> >>btw - we should take this to it's logical conclusion and have Sebastian
> >> >>check Dove.  Sebastian?
> >> >
> >> >I did think about that. It probably hits if you have two sata
> >> >devices. However, all current Dove machines have just one.
> >>
> >> I did boot arm-soc/for-next on Cubox and looks like 256k pool for atomic
> >> coherent allocations is enough. I booted with sata, sdhci0, eth0, i2c0,
> >> spi0, and both pcie ports forced on without any pcie devices attached.
> >
> > Thanks for testing, Sebastian.
> >
> > Andrew, I'll put this into a late/fixes branch for arm-soc and send it
> > on up.
> 
> I can just apply it in fixes here with your ack and send it up for 3.6 tonight.

Oops, already sent the pull request.  Which ever you prefer is fine with
me.  I just wanted another round of am, build, push, request-pull. ;-)

thx,

Jason.
diff mbox

Patch

diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 410291c..a6cd14a 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -204,6 +204,13 @@  void __init orion5x_wdt_init(void)
 void __init orion5x_init_early(void)
 {
 	orion_time_set_base(TIMER_VIRT_BASE);
+
+	/*
+	 * Some Orion5x devices allocate their coherent buffers from atomic
+	 * context. Increase size of atomic coherent pool to make sure such
+	 * the allocations won't fail.
+	 */
+	init_dma_coherent_pool_size(SZ_1M);
 }
 
 int orion5x_tclk;