diff mbox

usb: phy: samsung: Introducing usb phy driver for hsotg

Message ID 1350036934-6051-1-git-send-email-p.paneri@samsung.com (mailing list archive)
State New, archived
Headers show

Commit Message

p.paneri@samsung.com Oct. 12, 2012, 10:15 a.m. UTC 
platform_set_drvdata() required for driver's remove function, so adding
it back.

From v6:
Added TODO for phy bindings with controller
Dropped platform_set_drvdata() from driver probe

This driver uses usb_phy interface to interact with s3c-hsotg. Supports
phy_init and phy_shutdown functions to enable/disable phy. Tested with
smdk6410 and smdkv310. More SoCs can be brought under later.

Signed-off-by: Praveen Paneri <p.paneri@samsung.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
---
 .../devicetree/bindings/usb/samsung-usbphy.txt     |   11 +
 drivers/usb/phy/Kconfig                            |    8 +
 drivers/usb/phy/Makefile                           |    1 +
 drivers/usb/phy/samsung-usbphy.c                   |  357 ++++++++++++++++++++
 include/linux/platform_data/samsung-usbphy.h       |   27 ++
 5 files changed, 404 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/usb/samsung-usbphy.txt
 create mode 100644 drivers/usb/phy/samsung-usbphy.c
 create mode 100644 include/linux/platform_data/samsung-usbphy.h

Comments

Felipe Balbi Oct. 15, 2012, 1:28 p.m. UTC | #1 
On Fri, Oct 12, 2012 at 03:45:34PM +0530, Praveen Paneri wrote:
> platform_set_drvdata() required for driver's remove function, so adding
> it back.
> 
> From v6:
> Added TODO for phy bindings with controller
> Dropped platform_set_drvdata() from driver probe
> 
> This driver uses usb_phy interface to interact with s3c-hsotg. Supports
> phy_init and phy_shutdown functions to enable/disable phy. Tested with
> smdk6410 and smdkv310. More SoCs can be brought under later.
> 

this commit log needs improvement. There are stuff there which shouldn't
go to git's history.

I would like to get Tested-bys and Acked-by from DT maintainers.

> Signed-off-by: Praveen Paneri <p.paneri@samsung.com>
> Acked-by: Heiko Stuebner <heiko@sntech.de>
> ---
>  .../devicetree/bindings/usb/samsung-usbphy.txt     |   11 +
>  drivers/usb/phy/Kconfig                            |    8 +
>  drivers/usb/phy/Makefile                           |    1 +
>  drivers/usb/phy/samsung-usbphy.c                   |  357 ++++++++++++++++++++
>  include/linux/platform_data/samsung-usbphy.h       |   27 ++
>  5 files changed, 404 insertions(+), 0 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/usb/samsung-usbphy.txt
>  create mode 100644 drivers/usb/phy/samsung-usbphy.c
>  create mode 100644 include/linux/platform_data/samsung-usbphy.h
> 
> diff --git a/Documentation/devicetree/bindings/usb/samsung-usbphy.txt b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
> new file mode 100644
> index 0000000..7b26e2d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
> @@ -0,0 +1,11 @@
> +* Samsung's usb phy transceiver
> +
> +The Samsung's phy transceiver is used for controlling usb otg phy for
> +s3c-hsotg usb device controller.
> +TODO: Adding the PHY binding with controller(s) according to the under
> +developement generic PHY driver.
> +
> +Required properties:
> +- compatible : should be "samsung,exynos4210-usbphy"
> +- reg : base physical address of the phy registers and length of memory mapped
> +	region.
> diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
> index 63c339b..313685f 100644
> --- a/drivers/usb/phy/Kconfig
> +++ b/drivers/usb/phy/Kconfig
> @@ -32,3 +32,11 @@ config MV_U3D_PHY
>  	help
>  	  Enable this to support Marvell USB 3.0 phy controller for Marvell
>  	  SoC.
> +
> +config SAMSUNG_USBPHY
> +	bool "Samsung USB PHY controller Driver"
> +	depends on USB_S3C_HSOTG
> +	select USB_OTG_UTILS
> +	help
> +	  Enable this to support Samsung USB phy controller for samsung
> +	  SoCs.
> diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
> index b069f29..55dcfc1 100644
> --- a/drivers/usb/phy/Makefile
> +++ b/drivers/usb/phy/Makefile
> @@ -8,3 +8,4 @@ obj-$(CONFIG_OMAP_USB2)			+= omap-usb2.o
>  obj-$(CONFIG_USB_ISP1301)		+= isp1301.o
>  obj-$(CONFIG_MV_U3D_PHY)		+= mv_u3d_phy.o
>  obj-$(CONFIG_USB_EHCI_TEGRA)	+= tegra_usb_phy.o
> +obj-$(CONFIG_SAMSUNG_USBPHY)		+= samsung-usbphy.o
> diff --git a/drivers/usb/phy/samsung-usbphy.c b/drivers/usb/phy/samsung-usbphy.c
> new file mode 100644
> index 0000000..14c182f
> --- /dev/null
> +++ b/drivers/usb/phy/samsung-usbphy.c
> @@ -0,0 +1,357 @@
> +/* linux/drivers/usb/phy/samsung-usbphy.c
> + *
> + * Copyright (c) 2012 Samsung Electronics Co., Ltd.
> + *              http://www.samsung.com
> + *
> + * Author: Praveen Paneri <p.paneri@samsung.com>
> + *
> + * Samsung USB2.0 High-speed OTG transceiver, talks to S3C HS OTG controller
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +#include <linux/clk.h>
> +#include <linux/delay.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +#include <linux/of.h>
> +#include <linux/usb/otg.h>
> +#include <linux/platform_data/samsung-usbphy.h>
> +
> +/* Register definitions */
> +
> +#define S3C_PHYPWR				(0x00)
> +
> +#define S3C_PHYPWR_NORMAL_MASK			(0x19 << 0)
> +#define S3C_PHYPWR_OTG_DISABLE			(1 << 4)
> +#define S3C_PHYPWR_ANALOG_POWERDOWN		(1 << 3)
> +#define S3C_PHYPWR_FORCE_SUSPEND		(1 << 1)
> +/* For Exynos4 */
> +#define EXYNOS4_PHYPWR_NORMAL_MASK		(0x39 << 0)
> +#define EXYNOS4_PHYPWR_SLEEP			(1 << 5)
> +
> +#define S3C_PHYCLK				(0x04)
> +
> +#define S3C_PHYCLK_MODE_SERIAL			(1 << 6)
> +#define S3C_PHYCLK_EXT_OSC			(1 << 5)
> +#define S3C_PHYCLK_COMMON_ON_N			(1 << 4)
> +#define S3C_PHYCLK_ID_PULL			(1 << 2)
> +#define S3C_PHYCLK_CLKSEL_MASK			(0x3 << 0)
> +#define S3C_PHYCLK_CLKSEL_SHIFT			(0)
> +#define S3C_PHYCLK_CLKSEL_48M			(0x0 << 0)
> +#define S3C_PHYCLK_CLKSEL_12M			(0x2 << 0)
> +#define S3C_PHYCLK_CLKSEL_24M			(0x3 << 0)
> +
> +#define S3C_RSTCON				(0x08)
> +
> +#define S3C_RSTCON_PHYCLK			(1 << 2)
> +#define S3C_RSTCON_HCLK				(1 << 1)
> +#define S3C_RSTCON_PHY				(1 << 0)
> +
> +#ifndef MHZ
> +#define MHZ (1000*1000)
> +#endif
> +
> +enum samsung_cpu_type {
> +	TYPE_S3C64XX,
> +	TYPE_EXYNOS4210,
> +};
> +
> +/*
> + * struct samsung_usbphy - transceiver driver state
> + * @phy: transceiver structure
> + * @plat: platform data
> + * @dev: The parent device supplied to the probe function
> + * @clk: usb phy clock
> + * @regs: usb phy register memory base
> + * @ref_clk_freq: reference clock frequency selection
> + * @cpu_type: machine identifier
> + */
> +struct samsung_usbphy {
> +	struct usb_phy	phy;
> +	struct samsung_usbphy_data *plat;
> +	struct device	*dev;
> +	struct clk	*clk;
> +	void __iomem	*regs;
> +	int		ref_clk_freq;
> +	int		cpu_type;
> +};
> +
> +#define phy_to_sphy(x)		container_of((x), struct samsung_usbphy, phy)
> +
> +/*
> + * Returns reference clock frequency selection value
> + */
> +static int samsung_usbphy_get_refclk_freq(struct samsung_usbphy *sphy)
> +{
> +	struct clk *ref_clk;
> +	int refclk_freq = 0;
> +
> +	ref_clk = clk_get(sphy->dev, "xusbxti");
> +	if (IS_ERR(ref_clk)) {
> +		dev_err(sphy->dev, "Failed to get reference clock\n");
> +		return PTR_ERR(ref_clk);
> +	}
> +
> +	switch (clk_get_rate(ref_clk)) {
> +	case 12 * MHZ:
> +		refclk_freq |= S3C_PHYCLK_CLKSEL_12M;
> +		break;
> +	case 24 * MHZ:
> +		refclk_freq |= S3C_PHYCLK_CLKSEL_24M;
> +		break;
> +	default:
> +	case 48 * MHZ:
> +		/* default reference clock */
> +		refclk_freq |= S3C_PHYCLK_CLKSEL_48M;
> +		break;
> +	}
> +	clk_put(ref_clk);
> +
> +	return refclk_freq;
> +}
> +
> +static void samsung_usbphy_enable(struct samsung_usbphy *sphy)
> +{
> +	void __iomem *regs = sphy->regs;
> +	u32 phypwr;
> +	u32 phyclk;
> +	u32 rstcon;
> +
> +	/* set clock frequency for PLL */
> +	phyclk = sphy->ref_clk_freq;
> +	phypwr = readl(regs + S3C_PHYPWR);
> +	rstcon = readl(regs + S3C_RSTCON);
> +
> +	switch (sphy->cpu_type) {
> +	case TYPE_S3C64XX:
> +		phyclk &= ~(S3C_PHYCLK_COMMON_ON_N);
> +		phypwr &= ~S3C_PHYPWR_NORMAL_MASK;
> +		rstcon |= S3C_RSTCON_PHY;
> +		break;
> +	case TYPE_EXYNOS4210:
> +		phypwr &= ~EXYNOS4_PHYPWR_NORMAL_MASK;
> +		rstcon |= S3C_RSTCON_PHY;
> +	default:
> +		break;
> +	}
> +
> +	writel(phyclk, regs + S3C_PHYCLK);
> +	/* set to normal of PHY0 */
> +	writel(phypwr, regs + S3C_PHYPWR);
> +	/* reset all ports of PHY and Link */
> +	writel(rstcon, regs + S3C_RSTCON);
> +	udelay(10);
> +	rstcon &= ~S3C_RSTCON_PHY;
> +	writel(rstcon, regs + S3C_RSTCON);
> +}
> +
> +static void samsung_usbphy_disable(struct samsung_usbphy *sphy)
> +{
> +	void __iomem *regs = sphy->regs;
> +	u32 phypwr;
> +
> +	phypwr = readl(regs + S3C_PHYPWR);
> +
> +	switch (sphy->cpu_type) {
> +	case TYPE_S3C64XX:
> +		phypwr |= S3C_PHYPWR_NORMAL_MASK;
> +		break;
> +	case TYPE_EXYNOS4210:
> +		phypwr |= EXYNOS4_PHYPWR_NORMAL_MASK;
> +	default:
> +		break;
> +	}
> +
> +	/* unset to normal of PHY0 */
> +	writel(phypwr, regs + S3C_PHYPWR);
> +}
> +
> +/*
> + * The function passed to the usb driver for phy initialization
> + */
> +static int samsung_usbphy_init(struct usb_phy *phy)
> +{
> +	struct samsung_usbphy *sphy;
> +	int ret = 0;
> +
> +	sphy = phy_to_sphy(phy);
> +
> +	/* Enable the phy clock */
> +	ret = clk_prepare_enable(sphy->clk);
> +	if (ret) {
> +		dev_err(sphy->dev, "%s: clk_prepare_enable failed\n", __func__);
> +		return ret;
> +	}
> +
> +	/* Disable phy isolation */
> +	if (sphy->plat && sphy->plat->pmu_isolation)
> +		sphy->plat->pmu_isolation(false);
> +
> +	/* Initialize usb phy registers */
> +	samsung_usbphy_enable(sphy);
> +
> +	/* Disable the phy clock */
> +	clk_disable_unprepare(sphy->clk);
> +	return ret;
> +}
> +
> +/*
> + * The function passed to the usb driver for phy shutdown
> + */
> +static void samsung_usbphy_shutdown(struct usb_phy *phy)
> +{
> +	struct samsung_usbphy *sphy;
> +
> +	sphy = phy_to_sphy(phy);
> +
> +	if (clk_prepare_enable(sphy->clk)) {
> +		dev_err(sphy->dev, "%s: clk_prepare_enable failed\n", __func__);
> +		return;
> +	}
> +
> +	/* De-initialize usb phy registers */
> +	samsung_usbphy_disable(sphy);
> +
> +	/* Enable phy isolation */
> +	if (sphy->plat && sphy->plat->pmu_isolation)
> +		sphy->plat->pmu_isolation(true);
> +
> +	clk_disable_unprepare(sphy->clk);
> +}
> +
> +static const struct of_device_id samsung_usbphy_dt_match[];
> +
> +static inline int samsung_usbphy_get_driver_data(struct platform_device *pdev)
> +{
> +	if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
> +		int data;
> +		const struct of_device_id *match;
> +		match = of_match_node(samsung_usbphy_dt_match,
> +							pdev->dev.of_node);
> +		data = (int) match->data;
> +		return data;
> +	}
> +
> +	return platform_get_device_id(pdev)->driver_data;
> +}
> +
> +static int __devinit samsung_usbphy_probe(struct platform_device *pdev)
> +{
> +	struct samsung_usbphy *sphy;
> +	struct samsung_usbphy_data *pdata;
> +	struct device *dev = &pdev->dev;
> +	struct resource *phy_mem;
> +	void __iomem	*phy_base;
> +	struct clk *clk;
> +	int	ret = 0;
> +
> +	pdata = pdev->dev.platform_data;
> +	if (!pdata) {
> +		dev_err(&pdev->dev, "%s: no platform data defined\n", __func__);
> +		return -EINVAL;
> +	}
> +
> +	phy_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> +	if (!phy_mem) {
> +		dev_err(dev, "%s: missing mem resource\n", __func__);
> +		return -ENODEV;
> +	}
> +
> +	phy_base = devm_request_and_ioremap(dev, phy_mem);
> +	if (!phy_base) {
> +		dev_err(dev, "%s: register mapping failed\n", __func__);
> +		return -ENXIO;
> +	}
> +
> +	sphy = devm_kzalloc(dev, sizeof(*sphy), GFP_KERNEL);
> +	if (!sphy)
> +		return -ENOMEM;
> +
> +	clk = devm_clk_get(dev, "otg");
> +	if (IS_ERR(clk)) {
> +		dev_err(dev, "Failed to get otg clock\n");
> +		return PTR_ERR(clk);
> +	}
> +
> +	sphy->dev		= &pdev->dev;
> +	sphy->plat		= pdata;
> +	sphy->regs		= phy_base;
> +	sphy->clk		= clk;
> +	sphy->phy.dev		= sphy->dev;
> +	sphy->phy.label		= "samsung-usbphy";
> +	sphy->phy.init		= samsung_usbphy_init;
> +	sphy->phy.shutdown	= samsung_usbphy_shutdown;
> +	sphy->cpu_type		= samsung_usbphy_get_driver_data(pdev);
> +	sphy->ref_clk_freq	= samsung_usbphy_get_refclk_freq(sphy);
> +
> +	platform_set_drvdata(pdev, sphy);
> +
> +	ret = usb_add_phy(&sphy->phy, USB_PHY_TYPE_USB2);
> +	return ret;
> +}
> +
> +static int __exit samsung_usbphy_remove(struct platform_device *pdev)
> +{
> +	struct samsung_usbphy *sphy = platform_get_drvdata(pdev);
> +
> +	usb_remove_phy(&sphy->phy);
> +
> +	return 0;
> +}
> +
> +#ifdef CONFIG_OF
> +static const struct of_device_id samsung_usbphy_dt_match[] = {
> +	{
> +		.compatible = "samsung,s3c64xx-usbphy",
> +		.data = (void *)TYPE_S3C64XX,
> +	}, {
> +		.compatible = "samsung,exynos4210-usbphy",
> +		.data = (void *)TYPE_EXYNOS4210,
> +	},
> +	{},
> +};
> +MODULE_DEVICE_TABLE(of, samsung_usbphy_dt_match);
> +#else
> +#define samsung_usbphy_dt_match NULL
> +#endif
> +
> +static struct platform_device_id samsung_usbphy_driver_ids[] = {
> +	{
> +		.name		= "s3c64xx-usbphy",
> +		.driver_data	= TYPE_S3C64XX,
> +	}, {
> +		.name		= "exynos4210-usbphy",
> +		.driver_data	= TYPE_EXYNOS4210,
> +	},
> +	{},
> +};
> +
> +MODULE_DEVICE_TABLE(platform, samsung_usbphy_driver_ids);
> +
> +static struct platform_driver samsung_usbphy_driver = {
> +	.probe		= samsung_usbphy_probe,
> +	.remove		= __devexit_p(samsung_usbphy_remove),
> +	.id_table	= samsung_usbphy_driver_ids,
> +	.driver		= {
> +		.name	= "samsung-usbphy",
> +		.owner	= THIS_MODULE,
> +		.of_match_table = samsung_usbphy_dt_match,
> +	},
> +};
> +
> +module_platform_driver(samsung_usbphy_driver);
> +
> +MODULE_DESCRIPTION("Samsung USB phy controller");
> +MODULE_AUTHOR("Praveen Paneri <p.paneri@samsung.com>");
> +MODULE_LICENSE("GPL");
> +MODULE_ALIAS("platform:samsung-usbphy");
> diff --git a/include/linux/platform_data/samsung-usbphy.h b/include/linux/platform_data/samsung-usbphy.h
> new file mode 100644
> index 0000000..1bd24cb
> --- /dev/null
> +++ b/include/linux/platform_data/samsung-usbphy.h
> @@ -0,0 +1,27 @@
> +/*
> + * Copyright (C) 2012 Samsung Electronics Co.Ltd
> + *		http://www.samsung.com/
> + * Author: Praveen Paneri <p.paneri@samsung.com>
> + *
> + * Defines platform data for samsung usb phy driver.
> + *
> + * This program is free software; you can redistribute  it and/or modify it
> + * under  the terms of  the GNU General  Public License as published by the
> + * Free Software Foundation;  either version 2 of the  License, or (at your
> + * option) any later version.
> + */
> +
> +#ifndef __SAMSUNG_USBPHY_PLATFORM_H
> +#define __SAMSUNG_USBPHY_PLATFORM_H
> +
> +/**
> + * samsung_usbphy_data - Platform data for USB PHY driver.
> + * @pmu_isolation: Function to control usb phy isolation in PMU.
> + */
> +struct samsung_usbphy_data {
> +	void (*pmu_isolation)(int on);
> +};
> +
> +extern void samsung_usbphy_set_pdata(struct samsung_usbphy_data *pd);
> +
> +#endif /* __SAMSUNG_USBPHY_PLATFORM_H */
> -- 
> 1.7.1
>
Kyungmin Park Oct. 15, 2012, 1:44 p.m. UTC | #2 
+ Tomasz Figa,

Acked-by: Kyungmin Park <kyungmin.park@samsung.com>

On Mon, Oct 15, 2012 at 10:28 PM, Felipe Balbi <balbi@ti.com> wrote:
> On Fri, Oct 12, 2012 at 03:45:34PM +0530, Praveen Paneri wrote:
>> platform_set_drvdata() required for driver's remove function, so adding
>> it back.
>>
>> From v6:
>> Added TODO for phy bindings with controller
>> Dropped platform_set_drvdata() from driver probe
>>
>> This driver uses usb_phy interface to interact with s3c-hsotg. Supports
>> phy_init and phy_shutdown functions to enable/disable phy. Tested with
>> smdk6410 and smdkv310. More SoCs can be brought under later.
>>
>
> this commit log needs improvement. There are stuff there which shouldn't
> go to git's history.
>
> I would like to get Tested-bys and Acked-by from DT maintainers.
>
>> Signed-off-by: Praveen Paneri <p.paneri@samsung.com>
>> Acked-by: Heiko Stuebner <heiko@sntech.de>
>> ---
>>  .../devicetree/bindings/usb/samsung-usbphy.txt     |   11 +
>>  drivers/usb/phy/Kconfig                            |    8 +
>>  drivers/usb/phy/Makefile                           |    1 +
>>  drivers/usb/phy/samsung-usbphy.c                   |  357 ++++++++++++++++++++
>>  include/linux/platform_data/samsung-usbphy.h       |   27 ++
>>  5 files changed, 404 insertions(+), 0 deletions(-)
>>  create mode 100644 Documentation/devicetree/bindings/usb/samsung-usbphy.txt
>>  create mode 100644 drivers/usb/phy/samsung-usbphy.c
>>  create mode 100644 include/linux/platform_data/samsung-usbphy.h
>>
>> diff --git a/Documentation/devicetree/bindings/usb/samsung-usbphy.txt b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
>> new file mode 100644
>> index 0000000..7b26e2d
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
>> @@ -0,0 +1,11 @@
>> +* Samsung's usb phy transceiver
>> +
>> +The Samsung's phy transceiver is used for controlling usb otg phy for
>> +s3c-hsotg usb device controller.
>> +TODO: Adding the PHY binding with controller(s) according to the under
>> +developement generic PHY driver.
>> +
>> +Required properties:
>> +- compatible : should be "samsung,exynos4210-usbphy"
>> +- reg : base physical address of the phy registers and length of memory mapped
>> +     region.
>> diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
>> index 63c339b..313685f 100644
>> --- a/drivers/usb/phy/Kconfig
>> +++ b/drivers/usb/phy/Kconfig
>> @@ -32,3 +32,11 @@ config MV_U3D_PHY
>>       help
>>         Enable this to support Marvell USB 3.0 phy controller for Marvell
>>         SoC.
>> +
>> +config SAMSUNG_USBPHY
>> +     bool "Samsung USB PHY controller Driver"
>> +     depends on USB_S3C_HSOTG
>> +     select USB_OTG_UTILS
>> +     help
>> +       Enable this to support Samsung USB phy controller for samsung
>> +       SoCs.
>> diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
>> index b069f29..55dcfc1 100644
>> --- a/drivers/usb/phy/Makefile
>> +++ b/drivers/usb/phy/Makefile
>> @@ -8,3 +8,4 @@ obj-$(CONFIG_OMAP_USB2)                       += omap-usb2.o
>>  obj-$(CONFIG_USB_ISP1301)            += isp1301.o
>>  obj-$(CONFIG_MV_U3D_PHY)             += mv_u3d_phy.o
>>  obj-$(CONFIG_USB_EHCI_TEGRA) += tegra_usb_phy.o
>> +obj-$(CONFIG_SAMSUNG_USBPHY)         += samsung-usbphy.o
>> diff --git a/drivers/usb/phy/samsung-usbphy.c b/drivers/usb/phy/samsung-usbphy.c
>> new file mode 100644
>> index 0000000..14c182f
>> --- /dev/null
>> +++ b/drivers/usb/phy/samsung-usbphy.c
>> @@ -0,0 +1,357 @@
>> +/* linux/drivers/usb/phy/samsung-usbphy.c
>> + *
>> + * Copyright (c) 2012 Samsung Electronics Co., Ltd.
>> + *              http://www.samsung.com
>> + *
>> + * Author: Praveen Paneri <p.paneri@samsung.com>
>> + *
>> + * Samsung USB2.0 High-speed OTG transceiver, talks to S3C HS OTG controller
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>> + * GNU General Public License for more details.
>> + */
>> +
>> +#include <linux/module.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/clk.h>
>> +#include <linux/delay.h>
>> +#include <linux/err.h>
>> +#include <linux/io.h>
>> +#include <linux/of.h>
>> +#include <linux/usb/otg.h>
>> +#include <linux/platform_data/samsung-usbphy.h>
>> +
>> +/* Register definitions */
>> +
>> +#define S3C_PHYPWR                           (0x00)
>> +
>> +#define S3C_PHYPWR_NORMAL_MASK                       (0x19 << 0)
>> +#define S3C_PHYPWR_OTG_DISABLE                       (1 << 4)
>> +#define S3C_PHYPWR_ANALOG_POWERDOWN          (1 << 3)
>> +#define S3C_PHYPWR_FORCE_SUSPEND             (1 << 1)
>> +/* For Exynos4 */
>> +#define EXYNOS4_PHYPWR_NORMAL_MASK           (0x39 << 0)
>> +#define EXYNOS4_PHYPWR_SLEEP                 (1 << 5)
>> +
>> +#define S3C_PHYCLK                           (0x04)
>> +
>> +#define S3C_PHYCLK_MODE_SERIAL                       (1 << 6)
>> +#define S3C_PHYCLK_EXT_OSC                   (1 << 5)
>> +#define S3C_PHYCLK_COMMON_ON_N                       (1 << 4)
>> +#define S3C_PHYCLK_ID_PULL                   (1 << 2)
>> +#define S3C_PHYCLK_CLKSEL_MASK                       (0x3 << 0)
>> +#define S3C_PHYCLK_CLKSEL_SHIFT                      (0)
>> +#define S3C_PHYCLK_CLKSEL_48M                        (0x0 << 0)
>> +#define S3C_PHYCLK_CLKSEL_12M                        (0x2 << 0)
>> +#define S3C_PHYCLK_CLKSEL_24M                        (0x3 << 0)
>> +
>> +#define S3C_RSTCON                           (0x08)
>> +
>> +#define S3C_RSTCON_PHYCLK                    (1 << 2)
>> +#define S3C_RSTCON_HCLK                              (1 << 1)
>> +#define S3C_RSTCON_PHY                               (1 << 0)
>> +
>> +#ifndef MHZ
>> +#define MHZ (1000*1000)
>> +#endif
>> +
>> +enum samsung_cpu_type {
>> +     TYPE_S3C64XX,
>> +     TYPE_EXYNOS4210,
>> +};
>> +
>> +/*
>> + * struct samsung_usbphy - transceiver driver state
>> + * @phy: transceiver structure
>> + * @plat: platform data
>> + * @dev: The parent device supplied to the probe function
>> + * @clk: usb phy clock
>> + * @regs: usb phy register memory base
>> + * @ref_clk_freq: reference clock frequency selection
>> + * @cpu_type: machine identifier
>> + */
>> +struct samsung_usbphy {
>> +     struct usb_phy  phy;
>> +     struct samsung_usbphy_data *plat;
>> +     struct device   *dev;
>> +     struct clk      *clk;
>> +     void __iomem    *regs;
>> +     int             ref_clk_freq;
>> +     int             cpu_type;
>> +};
>> +
>> +#define phy_to_sphy(x)               container_of((x), struct samsung_usbphy, phy)
>> +
>> +/*
>> + * Returns reference clock frequency selection value
>> + */
>> +static int samsung_usbphy_get_refclk_freq(struct samsung_usbphy *sphy)
>> +{
>> +     struct clk *ref_clk;
>> +     int refclk_freq = 0;
>> +
>> +     ref_clk = clk_get(sphy->dev, "xusbxti");
>> +     if (IS_ERR(ref_clk)) {
>> +             dev_err(sphy->dev, "Failed to get reference clock\n");
>> +             return PTR_ERR(ref_clk);
>> +     }
>> +
>> +     switch (clk_get_rate(ref_clk)) {
>> +     case 12 * MHZ:
>> +             refclk_freq |= S3C_PHYCLK_CLKSEL_12M;
>> +             break;
>> +     case 24 * MHZ:
>> +             refclk_freq |= S3C_PHYCLK_CLKSEL_24M;
>> +             break;
>> +     default:
>> +     case 48 * MHZ:
>> +             /* default reference clock */
>> +             refclk_freq |= S3C_PHYCLK_CLKSEL_48M;
>> +             break;
>> +     }
>> +     clk_put(ref_clk);
>> +
>> +     return refclk_freq;
>> +}
>> +
>> +static void samsung_usbphy_enable(struct samsung_usbphy *sphy)
>> +{
>> +     void __iomem *regs = sphy->regs;
>> +     u32 phypwr;
>> +     u32 phyclk;
>> +     u32 rstcon;
>> +
>> +     /* set clock frequency for PLL */
>> +     phyclk = sphy->ref_clk_freq;
>> +     phypwr = readl(regs + S3C_PHYPWR);
>> +     rstcon = readl(regs + S3C_RSTCON);
>> +
>> +     switch (sphy->cpu_type) {
>> +     case TYPE_S3C64XX:
>> +             phyclk &= ~(S3C_PHYCLK_COMMON_ON_N);
>> +             phypwr &= ~S3C_PHYPWR_NORMAL_MASK;
>> +             rstcon |= S3C_RSTCON_PHY;
>> +             break;
>> +     case TYPE_EXYNOS4210:
>> +             phypwr &= ~EXYNOS4_PHYPWR_NORMAL_MASK;
>> +             rstcon |= S3C_RSTCON_PHY;
>> +     default:
>> +             break;
>> +     }
>> +
>> +     writel(phyclk, regs + S3C_PHYCLK);
>> +     /* set to normal of PHY0 */
>> +     writel(phypwr, regs + S3C_PHYPWR);
>> +     /* reset all ports of PHY and Link */
>> +     writel(rstcon, regs + S3C_RSTCON);
>> +     udelay(10);
>> +     rstcon &= ~S3C_RSTCON_PHY;
>> +     writel(rstcon, regs + S3C_RSTCON);
>> +}
>> +
>> +static void samsung_usbphy_disable(struct samsung_usbphy *sphy)
>> +{
>> +     void __iomem *regs = sphy->regs;
>> +     u32 phypwr;
>> +
>> +     phypwr = readl(regs + S3C_PHYPWR);
>> +
>> +     switch (sphy->cpu_type) {
>> +     case TYPE_S3C64XX:
>> +             phypwr |= S3C_PHYPWR_NORMAL_MASK;
>> +             break;
>> +     case TYPE_EXYNOS4210:
>> +             phypwr |= EXYNOS4_PHYPWR_NORMAL_MASK;
>> +     default:
>> +             break;
>> +     }
>> +
>> +     /* unset to normal of PHY0 */
>> +     writel(phypwr, regs + S3C_PHYPWR);
>> +}
>> +
>> +/*
>> + * The function passed to the usb driver for phy initialization
>> + */
>> +static int samsung_usbphy_init(struct usb_phy *phy)
>> +{
>> +     struct samsung_usbphy *sphy;
>> +     int ret = 0;
>> +
>> +     sphy = phy_to_sphy(phy);
>> +
>> +     /* Enable the phy clock */
>> +     ret = clk_prepare_enable(sphy->clk);
>> +     if (ret) {
>> +             dev_err(sphy->dev, "%s: clk_prepare_enable failed\n", __func__);
>> +             return ret;
>> +     }
>> +
>> +     /* Disable phy isolation */
>> +     if (sphy->plat && sphy->plat->pmu_isolation)
>> +             sphy->plat->pmu_isolation(false);
>> +
>> +     /* Initialize usb phy registers */
>> +     samsung_usbphy_enable(sphy);
>> +
>> +     /* Disable the phy clock */
>> +     clk_disable_unprepare(sphy->clk);
>> +     return ret;
>> +}
>> +
>> +/*
>> + * The function passed to the usb driver for phy shutdown
>> + */
>> +static void samsung_usbphy_shutdown(struct usb_phy *phy)
>> +{
>> +     struct samsung_usbphy *sphy;
>> +
>> +     sphy = phy_to_sphy(phy);
>> +
>> +     if (clk_prepare_enable(sphy->clk)) {
>> +             dev_err(sphy->dev, "%s: clk_prepare_enable failed\n", __func__);
>> +             return;
>> +     }
>> +
>> +     /* De-initialize usb phy registers */
>> +     samsung_usbphy_disable(sphy);
>> +
>> +     /* Enable phy isolation */
>> +     if (sphy->plat && sphy->plat->pmu_isolation)
>> +             sphy->plat->pmu_isolation(true);
>> +
>> +     clk_disable_unprepare(sphy->clk);
>> +}
>> +
>> +static const struct of_device_id samsung_usbphy_dt_match[];
>> +
>> +static inline int samsung_usbphy_get_driver_data(struct platform_device *pdev)
>> +{
>> +     if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
>> +             int data;
>> +             const struct of_device_id *match;
>> +             match = of_match_node(samsung_usbphy_dt_match,
>> +                                                     pdev->dev.of_node);
>> +             data = (int) match->data;
>> +             return data;
>> +     }
>> +
>> +     return platform_get_device_id(pdev)->driver_data;
>> +}
>> +
>> +static int __devinit samsung_usbphy_probe(struct platform_device *pdev)
>> +{
>> +     struct samsung_usbphy *sphy;
>> +     struct samsung_usbphy_data *pdata;
>> +     struct device *dev = &pdev->dev;
>> +     struct resource *phy_mem;
>> +     void __iomem    *phy_base;
>> +     struct clk *clk;
>> +     int     ret = 0;
>> +
>> +     pdata = pdev->dev.platform_data;
>> +     if (!pdata) {
>> +             dev_err(&pdev->dev, "%s: no platform data defined\n", __func__);
>> +             return -EINVAL;
>> +     }
>> +
>> +     phy_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> +     if (!phy_mem) {
>> +             dev_err(dev, "%s: missing mem resource\n", __func__);
>> +             return -ENODEV;
>> +     }
>> +
>> +     phy_base = devm_request_and_ioremap(dev, phy_mem);
>> +     if (!phy_base) {
>> +             dev_err(dev, "%s: register mapping failed\n", __func__);
>> +             return -ENXIO;
>> +     }
>> +
>> +     sphy = devm_kzalloc(dev, sizeof(*sphy), GFP_KERNEL);
>> +     if (!sphy)
>> +             return -ENOMEM;
>> +
>> +     clk = devm_clk_get(dev, "otg");
>> +     if (IS_ERR(clk)) {
>> +             dev_err(dev, "Failed to get otg clock\n");
>> +             return PTR_ERR(clk);
>> +     }
>> +
>> +     sphy->dev               = &pdev->dev;
>> +     sphy->plat              = pdata;
>> +     sphy->regs              = phy_base;
>> +     sphy->clk               = clk;
>> +     sphy->phy.dev           = sphy->dev;
>> +     sphy->phy.label         = "samsung-usbphy";
>> +     sphy->phy.init          = samsung_usbphy_init;
>> +     sphy->phy.shutdown      = samsung_usbphy_shutdown;
>> +     sphy->cpu_type          = samsung_usbphy_get_driver_data(pdev);
>> +     sphy->ref_clk_freq      = samsung_usbphy_get_refclk_freq(sphy);
>> +
>> +     platform_set_drvdata(pdev, sphy);
>> +
>> +     ret = usb_add_phy(&sphy->phy, USB_PHY_TYPE_USB2);
>> +     return ret;
>> +}
>> +
>> +static int __exit samsung_usbphy_remove(struct platform_device *pdev)
>> +{
>> +     struct samsung_usbphy *sphy = platform_get_drvdata(pdev);
>> +
>> +     usb_remove_phy(&sphy->phy);
>> +
>> +     return 0;
>> +}
>> +
>> +#ifdef CONFIG_OF
>> +static const struct of_device_id samsung_usbphy_dt_match[] = {
>> +     {
>> +             .compatible = "samsung,s3c64xx-usbphy",
>> +             .data = (void *)TYPE_S3C64XX,
>> +     }, {
>> +             .compatible = "samsung,exynos4210-usbphy",
>> +             .data = (void *)TYPE_EXYNOS4210,
>> +     },
>> +     {},
>> +};
>> +MODULE_DEVICE_TABLE(of, samsung_usbphy_dt_match);
>> +#else
>> +#define samsung_usbphy_dt_match NULL
>> +#endif
>> +
>> +static struct platform_device_id samsung_usbphy_driver_ids[] = {
>> +     {
>> +             .name           = "s3c64xx-usbphy",
>> +             .driver_data    = TYPE_S3C64XX,
>> +     }, {
>> +             .name           = "exynos4210-usbphy",
>> +             .driver_data    = TYPE_EXYNOS4210,
>> +     },
>> +     {},
>> +};
>> +
>> +MODULE_DEVICE_TABLE(platform, samsung_usbphy_driver_ids);
>> +
>> +static struct platform_driver samsung_usbphy_driver = {
>> +     .probe          = samsung_usbphy_probe,
>> +     .remove         = __devexit_p(samsung_usbphy_remove),
>> +     .id_table       = samsung_usbphy_driver_ids,
>> +     .driver         = {
>> +             .name   = "samsung-usbphy",
>> +             .owner  = THIS_MODULE,
>> +             .of_match_table = samsung_usbphy_dt_match,
>> +     },
>> +};
>> +
>> +module_platform_driver(samsung_usbphy_driver);
>> +
>> +MODULE_DESCRIPTION("Samsung USB phy controller");
>> +MODULE_AUTHOR("Praveen Paneri <p.paneri@samsung.com>");
>> +MODULE_LICENSE("GPL");
>> +MODULE_ALIAS("platform:samsung-usbphy");
>> diff --git a/include/linux/platform_data/samsung-usbphy.h b/include/linux/platform_data/samsung-usbphy.h
>> new file mode 100644
>> index 0000000..1bd24cb
>> --- /dev/null
>> +++ b/include/linux/platform_data/samsung-usbphy.h
>> @@ -0,0 +1,27 @@
>> +/*
>> + * Copyright (C) 2012 Samsung Electronics Co.Ltd
>> + *           http://www.samsung.com/
>> + * Author: Praveen Paneri <p.paneri@samsung.com>
>> + *
>> + * Defines platform data for samsung usb phy driver.
>> + *
>> + * This program is free software; you can redistribute  it and/or modify it
>> + * under  the terms of  the GNU General  Public License as published by the
>> + * Free Software Foundation;  either version 2 of the  License, or (at your
>> + * option) any later version.
>> + */
>> +
>> +#ifndef __SAMSUNG_USBPHY_PLATFORM_H
>> +#define __SAMSUNG_USBPHY_PLATFORM_H
>> +
>> +/**
>> + * samsung_usbphy_data - Platform data for USB PHY driver.
>> + * @pmu_isolation: Function to control usb phy isolation in PMU.
>> + */
>> +struct samsung_usbphy_data {
>> +     void (*pmu_isolation)(int on);
>> +};
>> +
>> +extern void samsung_usbphy_set_pdata(struct samsung_usbphy_data *pd);
>> +
>> +#endif /* __SAMSUNG_USBPHY_PLATFORM_H */
>> --
>> 1.7.1
>>
>
> --
> balbi
p.paneri@samsung.com Oct. 16, 2012, 5:39 a.m. UTC | #3 
On Mon, Oct 15, 2012 at 6:58 PM, Felipe Balbi <balbi@ti.com> wrote:
> On Fri, Oct 12, 2012 at 03:45:34PM +0530, Praveen Paneri wrote:
>> platform_set_drvdata() required for driver's remove function, so adding
>> it back.
>>
>> From v6:
>> Added TODO for phy bindings with controller
>> Dropped platform_set_drvdata() from driver probe
>>
>> This driver uses usb_phy interface to interact with s3c-hsotg. Supports
>> phy_init and phy_shutdown functions to enable/disable phy. Tested with
>> smdk6410 and smdkv310. More SoCs can be brought under later.
>>
>
> this commit log needs improvement. There are stuff there which shouldn't
> go to git's history.
I will resend the patches with improved commit log.

Thanks,
Praveen
>
> I would like to get Tested-bys and Acked-by from DT maintainers.
>
>> Signed-off-by: Praveen Paneri <p.paneri@samsung.com>
>> Acked-by: Heiko Stuebner <heiko@sntech.de>
>> ---
>>  .../devicetree/bindings/usb/samsung-usbphy.txt     |   11 +
>>  drivers/usb/phy/Kconfig                            |    8 +
>>  drivers/usb/phy/Makefile                           |    1 +
>>  drivers/usb/phy/samsung-usbphy.c                   |  357 ++++++++++++++++++++
>>  include/linux/platform_data/samsung-usbphy.h       |   27 ++
>>  5 files changed, 404 insertions(+), 0 deletions(-)
>>  create mode 100644 Documentation/devicetree/bindings/usb/samsung-usbphy.txt
>>  create mode 100644 drivers/usb/phy/samsung-usbphy.c
>>  create mode 100644 include/linux/platform_data/samsung-usbphy.h
>>
>> diff --git a/Documentation/devicetree/bindings/usb/samsung-usbphy.txt b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
>> new file mode 100644
>> index 0000000..7b26e2d
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
>> @@ -0,0 +1,11 @@
>> +* Samsung's usb phy transceiver
>> +
>> +The Samsung's phy transceiver is used for controlling usb otg phy for
>> +s3c-hsotg usb device controller.
>> +TODO: Adding the PHY binding with controller(s) according to the under
>> +developement generic PHY driver.
>> +
>> +Required properties:
>> +- compatible : should be "samsung,exynos4210-usbphy"
>> +- reg : base physical address of the phy registers and length of memory mapped
>> +     region.
>> diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
>> index 63c339b..313685f 100644
>> --- a/drivers/usb/phy/Kconfig
>> +++ b/drivers/usb/phy/Kconfig
>> @@ -32,3 +32,11 @@ config MV_U3D_PHY
>>       help
>>         Enable this to support Marvell USB 3.0 phy controller for Marvell
>>         SoC.
>> +
>> +config SAMSUNG_USBPHY
>> +     bool "Samsung USB PHY controller Driver"
>> +     depends on USB_S3C_HSOTG
>> +     select USB_OTG_UTILS
>> +     help
>> +       Enable this to support Samsung USB phy controller for samsung
>> +       SoCs.
>> diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
>> index b069f29..55dcfc1 100644
>> --- a/drivers/usb/phy/Makefile
>> +++ b/drivers/usb/phy/Makefile
>> @@ -8,3 +8,4 @@ obj-$(CONFIG_OMAP_USB2)                       += omap-usb2.o
>>  obj-$(CONFIG_USB_ISP1301)            += isp1301.o
>>  obj-$(CONFIG_MV_U3D_PHY)             += mv_u3d_phy.o
>>  obj-$(CONFIG_USB_EHCI_TEGRA) += tegra_usb_phy.o
>> +obj-$(CONFIG_SAMSUNG_USBPHY)         += samsung-usbphy.o
>> diff --git a/drivers/usb/phy/samsung-usbphy.c b/drivers/usb/phy/samsung-usbphy.c
>> new file mode 100644
>> index 0000000..14c182f
>> --- /dev/null
>> +++ b/drivers/usb/phy/samsung-usbphy.c
>> @@ -0,0 +1,357 @@
>> +/* linux/drivers/usb/phy/samsung-usbphy.c
>> + *
>> + * Copyright (c) 2012 Samsung Electronics Co., Ltd.
>> + *              http://www.samsung.com
>> + *
>> + * Author: Praveen Paneri <p.paneri@samsung.com>
>> + *
>> + * Samsung USB2.0 High-speed OTG transceiver, talks to S3C HS OTG controller
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>> + * GNU General Public License for more details.
>> + */
>> +
>> +#include <linux/module.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/clk.h>
>> +#include <linux/delay.h>
>> +#include <linux/err.h>
>> +#include <linux/io.h>
>> +#include <linux/of.h>
>> +#include <linux/usb/otg.h>
>> +#include <linux/platform_data/samsung-usbphy.h>
>> +
>> +/* Register definitions */
>> +
>> +#define S3C_PHYPWR                           (0x00)
>> +
>> +#define S3C_PHYPWR_NORMAL_MASK                       (0x19 << 0)
>> +#define S3C_PHYPWR_OTG_DISABLE                       (1 << 4)
>> +#define S3C_PHYPWR_ANALOG_POWERDOWN          (1 << 3)
>> +#define S3C_PHYPWR_FORCE_SUSPEND             (1 << 1)
>> +/* For Exynos4 */
>> +#define EXYNOS4_PHYPWR_NORMAL_MASK           (0x39 << 0)
>> +#define EXYNOS4_PHYPWR_SLEEP                 (1 << 5)
>> +
>> +#define S3C_PHYCLK                           (0x04)
>> +
>> +#define S3C_PHYCLK_MODE_SERIAL                       (1 << 6)
>> +#define S3C_PHYCLK_EXT_OSC                   (1 << 5)
>> +#define S3C_PHYCLK_COMMON_ON_N                       (1 << 4)
>> +#define S3C_PHYCLK_ID_PULL                   (1 << 2)
>> +#define S3C_PHYCLK_CLKSEL_MASK                       (0x3 << 0)
>> +#define S3C_PHYCLK_CLKSEL_SHIFT                      (0)
>> +#define S3C_PHYCLK_CLKSEL_48M                        (0x0 << 0)
>> +#define S3C_PHYCLK_CLKSEL_12M                        (0x2 << 0)
>> +#define S3C_PHYCLK_CLKSEL_24M                        (0x3 << 0)
>> +
>> +#define S3C_RSTCON                           (0x08)
>> +
>> +#define S3C_RSTCON_PHYCLK                    (1 << 2)
>> +#define S3C_RSTCON_HCLK                              (1 << 1)
>> +#define S3C_RSTCON_PHY                               (1 << 0)
>> +
>> +#ifndef MHZ
>> +#define MHZ (1000*1000)
>> +#endif
>> +
>> +enum samsung_cpu_type {
>> +     TYPE_S3C64XX,
>> +     TYPE_EXYNOS4210,
>> +};
>> +
>> +/*
>> + * struct samsung_usbphy - transceiver driver state
>> + * @phy: transceiver structure
>> + * @plat: platform data
>> + * @dev: The parent device supplied to the probe function
>> + * @clk: usb phy clock
>> + * @regs: usb phy register memory base
>> + * @ref_clk_freq: reference clock frequency selection
>> + * @cpu_type: machine identifier
>> + */
>> +struct samsung_usbphy {
>> +     struct usb_phy  phy;
>> +     struct samsung_usbphy_data *plat;
>> +     struct device   *dev;
>> +     struct clk      *clk;
>> +     void __iomem    *regs;
>> +     int             ref_clk_freq;
>> +     int             cpu_type;
>> +};
>> +
>> +#define phy_to_sphy(x)               container_of((x), struct samsung_usbphy, phy)
>> +
>> +/*
>> + * Returns reference clock frequency selection value
>> + */
>> +static int samsung_usbphy_get_refclk_freq(struct samsung_usbphy *sphy)
>> +{
>> +     struct clk *ref_clk;
>> +     int refclk_freq = 0;
>> +
>> +     ref_clk = clk_get(sphy->dev, "xusbxti");
>> +     if (IS_ERR(ref_clk)) {
>> +             dev_err(sphy->dev, "Failed to get reference clock\n");
>> +             return PTR_ERR(ref_clk);
>> +     }
>> +
>> +     switch (clk_get_rate(ref_clk)) {
>> +     case 12 * MHZ:
>> +             refclk_freq |= S3C_PHYCLK_CLKSEL_12M;
>> +             break;
>> +     case 24 * MHZ:
>> +             refclk_freq |= S3C_PHYCLK_CLKSEL_24M;
>> +             break;
>> +     default:
>> +     case 48 * MHZ:
>> +             /* default reference clock */
>> +             refclk_freq |= S3C_PHYCLK_CLKSEL_48M;
>> +             break;
>> +     }
>> +     clk_put(ref_clk);
>> +
>> +     return refclk_freq;
>> +}
>> +
>> +static void samsung_usbphy_enable(struct samsung_usbphy *sphy)
>> +{
>> +     void __iomem *regs = sphy->regs;
>> +     u32 phypwr;
>> +     u32 phyclk;
>> +     u32 rstcon;
>> +
>> +     /* set clock frequency for PLL */
>> +     phyclk = sphy->ref_clk_freq;
>> +     phypwr = readl(regs + S3C_PHYPWR);
>> +     rstcon = readl(regs + S3C_RSTCON);
>> +
>> +     switch (sphy->cpu_type) {
>> +     case TYPE_S3C64XX:
>> +             phyclk &= ~(S3C_PHYCLK_COMMON_ON_N);
>> +             phypwr &= ~S3C_PHYPWR_NORMAL_MASK;
>> +             rstcon |= S3C_RSTCON_PHY;
>> +             break;
>> +     case TYPE_EXYNOS4210:
>> +             phypwr &= ~EXYNOS4_PHYPWR_NORMAL_MASK;
>> +             rstcon |= S3C_RSTCON_PHY;
>> +     default:
>> +             break;
>> +     }
>> +
>> +     writel(phyclk, regs + S3C_PHYCLK);
>> +     /* set to normal of PHY0 */
>> +     writel(phypwr, regs + S3C_PHYPWR);
>> +     /* reset all ports of PHY and Link */
>> +     writel(rstcon, regs + S3C_RSTCON);
>> +     udelay(10);
>> +     rstcon &= ~S3C_RSTCON_PHY;
>> +     writel(rstcon, regs + S3C_RSTCON);
>> +}
>> +
>> +static void samsung_usbphy_disable(struct samsung_usbphy *sphy)
>> +{
>> +     void __iomem *regs = sphy->regs;
>> +     u32 phypwr;
>> +
>> +     phypwr = readl(regs + S3C_PHYPWR);
>> +
>> +     switch (sphy->cpu_type) {
>> +     case TYPE_S3C64XX:
>> +             phypwr |= S3C_PHYPWR_NORMAL_MASK;
>> +             break;
>> +     case TYPE_EXYNOS4210:
>> +             phypwr |= EXYNOS4_PHYPWR_NORMAL_MASK;
>> +     default:
>> +             break;
>> +     }
>> +
>> +     /* unset to normal of PHY0 */
>> +     writel(phypwr, regs + S3C_PHYPWR);
>> +}
>> +
>> +/*
>> + * The function passed to the usb driver for phy initialization
>> + */
>> +static int samsung_usbphy_init(struct usb_phy *phy)
>> +{
>> +     struct samsung_usbphy *sphy;
>> +     int ret = 0;
>> +
>> +     sphy = phy_to_sphy(phy);
>> +
>> +     /* Enable the phy clock */
>> +     ret = clk_prepare_enable(sphy->clk);
>> +     if (ret) {
>> +             dev_err(sphy->dev, "%s: clk_prepare_enable failed\n", __func__);
>> +             return ret;
>> +     }
>> +
>> +     /* Disable phy isolation */
>> +     if (sphy->plat && sphy->plat->pmu_isolation)
>> +             sphy->plat->pmu_isolation(false);
>> +
>> +     /* Initialize usb phy registers */
>> +     samsung_usbphy_enable(sphy);
>> +
>> +     /* Disable the phy clock */
>> +     clk_disable_unprepare(sphy->clk);
>> +     return ret;
>> +}
>> +
>> +/*
>> + * The function passed to the usb driver for phy shutdown
>> + */
>> +static void samsung_usbphy_shutdown(struct usb_phy *phy)
>> +{
>> +     struct samsung_usbphy *sphy;
>> +
>> +     sphy = phy_to_sphy(phy);
>> +
>> +     if (clk_prepare_enable(sphy->clk)) {
>> +             dev_err(sphy->dev, "%s: clk_prepare_enable failed\n", __func__);
>> +             return;
>> +     }
>> +
>> +     /* De-initialize usb phy registers */
>> +     samsung_usbphy_disable(sphy);
>> +
>> +     /* Enable phy isolation */
>> +     if (sphy->plat && sphy->plat->pmu_isolation)
>> +             sphy->plat->pmu_isolation(true);
>> +
>> +     clk_disable_unprepare(sphy->clk);
>> +}
>> +
>> +static const struct of_device_id samsung_usbphy_dt_match[];
>> +
>> +static inline int samsung_usbphy_get_driver_data(struct platform_device *pdev)
>> +{
>> +     if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
>> +             int data;
>> +             const struct of_device_id *match;
>> +             match = of_match_node(samsung_usbphy_dt_match,
>> +                                                     pdev->dev.of_node);
>> +             data = (int) match->data;
>> +             return data;
>> +     }
>> +
>> +     return platform_get_device_id(pdev)->driver_data;
>> +}
>> +
>> +static int __devinit samsung_usbphy_probe(struct platform_device *pdev)
>> +{
>> +     struct samsung_usbphy *sphy;
>> +     struct samsung_usbphy_data *pdata;
>> +     struct device *dev = &pdev->dev;
>> +     struct resource *phy_mem;
>> +     void __iomem    *phy_base;
>> +     struct clk *clk;
>> +     int     ret = 0;
>> +
>> +     pdata = pdev->dev.platform_data;
>> +     if (!pdata) {
>> +             dev_err(&pdev->dev, "%s: no platform data defined\n", __func__);
>> +             return -EINVAL;
>> +     }
>> +
>> +     phy_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> +     if (!phy_mem) {
>> +             dev_err(dev, "%s: missing mem resource\n", __func__);
>> +             return -ENODEV;
>> +     }
>> +
>> +     phy_base = devm_request_and_ioremap(dev, phy_mem);
>> +     if (!phy_base) {
>> +             dev_err(dev, "%s: register mapping failed\n", __func__);
>> +             return -ENXIO;
>> +     }
>> +
>> +     sphy = devm_kzalloc(dev, sizeof(*sphy), GFP_KERNEL);
>> +     if (!sphy)
>> +             return -ENOMEM;
>> +
>> +     clk = devm_clk_get(dev, "otg");
>> +     if (IS_ERR(clk)) {
>> +             dev_err(dev, "Failed to get otg clock\n");
>> +             return PTR_ERR(clk);
>> +     }
>> +
>> +     sphy->dev               = &pdev->dev;
>> +     sphy->plat              = pdata;
>> +     sphy->regs              = phy_base;
>> +     sphy->clk               = clk;
>> +     sphy->phy.dev           = sphy->dev;
>> +     sphy->phy.label         = "samsung-usbphy";
>> +     sphy->phy.init          = samsung_usbphy_init;
>> +     sphy->phy.shutdown      = samsung_usbphy_shutdown;
>> +     sphy->cpu_type          = samsung_usbphy_get_driver_data(pdev);
>> +     sphy->ref_clk_freq      = samsung_usbphy_get_refclk_freq(sphy);
>> +
>> +     platform_set_drvdata(pdev, sphy);
>> +
>> +     ret = usb_add_phy(&sphy->phy, USB_PHY_TYPE_USB2);
>> +     return ret;
>> +}
>> +
>> +static int __exit samsung_usbphy_remove(struct platform_device *pdev)
>> +{
>> +     struct samsung_usbphy *sphy = platform_get_drvdata(pdev);
>> +
>> +     usb_remove_phy(&sphy->phy);
>> +
>> +     return 0;
>> +}
>> +
>> +#ifdef CONFIG_OF
>> +static const struct of_device_id samsung_usbphy_dt_match[] = {
>> +     {
>> +             .compatible = "samsung,s3c64xx-usbphy",
>> +             .data = (void *)TYPE_S3C64XX,
>> +     }, {
>> +             .compatible = "samsung,exynos4210-usbphy",
>> +             .data = (void *)TYPE_EXYNOS4210,
>> +     },
>> +     {},
>> +};
>> +MODULE_DEVICE_TABLE(of, samsung_usbphy_dt_match);
>> +#else
>> +#define samsung_usbphy_dt_match NULL
>> +#endif
>> +
>> +static struct platform_device_id samsung_usbphy_driver_ids[] = {
>> +     {
>> +             .name           = "s3c64xx-usbphy",
>> +             .driver_data    = TYPE_S3C64XX,
>> +     }, {
>> +             .name           = "exynos4210-usbphy",
>> +             .driver_data    = TYPE_EXYNOS4210,
>> +     },
>> +     {},
>> +};
>> +
>> +MODULE_DEVICE_TABLE(platform, samsung_usbphy_driver_ids);
>> +
>> +static struct platform_driver samsung_usbphy_driver = {
>> +     .probe          = samsung_usbphy_probe,
>> +     .remove         = __devexit_p(samsung_usbphy_remove),
>> +     .id_table       = samsung_usbphy_driver_ids,
>> +     .driver         = {
>> +             .name   = "samsung-usbphy",
>> +             .owner  = THIS_MODULE,
>> +             .of_match_table = samsung_usbphy_dt_match,
>> +     },
>> +};
>> +
>> +module_platform_driver(samsung_usbphy_driver);
>> +
>> +MODULE_DESCRIPTION("Samsung USB phy controller");
>> +MODULE_AUTHOR("Praveen Paneri <p.paneri@samsung.com>");
>> +MODULE_LICENSE("GPL");
>> +MODULE_ALIAS("platform:samsung-usbphy");
>> diff --git a/include/linux/platform_data/samsung-usbphy.h b/include/linux/platform_data/samsung-usbphy.h
>> new file mode 100644
>> index 0000000..1bd24cb
>> --- /dev/null
>> +++ b/include/linux/platform_data/samsung-usbphy.h
>> @@ -0,0 +1,27 @@
>> +/*
>> + * Copyright (C) 2012 Samsung Electronics Co.Ltd
>> + *           http://www.samsung.com/
>> + * Author: Praveen Paneri <p.paneri@samsung.com>
>> + *
>> + * Defines platform data for samsung usb phy driver.
>> + *
>> + * This program is free software; you can redistribute  it and/or modify it
>> + * under  the terms of  the GNU General  Public License as published by the
>> + * Free Software Foundation;  either version 2 of the  License, or (at your
>> + * option) any later version.
>> + */
>> +
>> +#ifndef __SAMSUNG_USBPHY_PLATFORM_H
>> +#define __SAMSUNG_USBPHY_PLATFORM_H
>> +
>> +/**
>> + * samsung_usbphy_data - Platform data for USB PHY driver.
>> + * @pmu_isolation: Function to control usb phy isolation in PMU.
>> + */
>> +struct samsung_usbphy_data {
>> +     void (*pmu_isolation)(int on);
>> +};
>> +
>> +extern void samsung_usbphy_set_pdata(struct samsung_usbphy_data *pd);
>> +
>> +#endif /* __SAMSUNG_USBPHY_PLATFORM_H */
>> --
>> 1.7.1
>>
>
> --
> balbi
Kim Kukjin Oct. 17, 2012, 11 a.m. UTC | #4 
Praveen Paneri wrote:
> 
> platform_set_drvdata() required for driver's remove function, so adding
> it back.
> 
> From v6:
> Added TODO for phy bindings with controller
> Dropped platform_set_drvdata() from driver probe
> 
> This driver uses usb_phy interface to interact with s3c-hsotg. Supports
> phy_init and phy_shutdown functions to enable/disable phy. Tested with
> smdk6410 and smdkv310. More SoCs can be brought under later.
> 
> Signed-off-by: Praveen Paneri <p.paneri@samsung.com>
> Acked-by: Heiko Stuebner <heiko@sntech.de>
> ---
>  .../devicetree/bindings/usb/samsung-usbphy.txt     |   11 +
>  drivers/usb/phy/Kconfig                            |    8 +
>  drivers/usb/phy/Makefile                           |    1 +
>  drivers/usb/phy/samsung-usbphy.c                   |  357
++++++++++++++++++++
>  include/linux/platform_data/samsung-usbphy.h       |   27 ++
>  5 files changed, 404 insertions(+), 0 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/usb/samsung-
> usbphy.txt
>  create mode 100644 drivers/usb/phy/samsung-usbphy.c
>  create mode 100644 include/linux/platform_data/samsung-usbphy.h
> 
> diff --git a/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
> b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
> new file mode 100644
> index 0000000..7b26e2d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
> @@ -0,0 +1,11 @@
> +* Samsung's usb phy transceiver
> +
> +The Samsung's phy transceiver is used for controlling usb otg phy for
> +s3c-hsotg usb device controller.
> +TODO: Adding the PHY binding with controller(s) according to the under
> +developement generic PHY driver.
> +
> +Required properties:
> +- compatible : should be "samsung,exynos4210-usbphy"
> +- reg : base physical address of the phy registers and length of memory
> mapped
> +	region.
> diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
> index 63c339b..313685f 100644
> --- a/drivers/usb/phy/Kconfig
> +++ b/drivers/usb/phy/Kconfig
> @@ -32,3 +32,11 @@ config MV_U3D_PHY
>  	help
>  	  Enable this to support Marvell USB 3.0 phy controller for Marvell
>  	  SoC.
> +
> +config SAMSUNG_USBPHY
> +	bool "Samsung USB PHY controller Driver"
> +	depends on USB_S3C_HSOTG
> +	select USB_OTG_UTILS
> +	help
> +	  Enable this to support Samsung USB phy controller for samsung
> +	  SoCs.
> diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
> index b069f29..55dcfc1 100644
> --- a/drivers/usb/phy/Makefile
> +++ b/drivers/usb/phy/Makefile
> @@ -8,3 +8,4 @@ obj-$(CONFIG_OMAP_USB2)			+=
omap-usb2.o
>  obj-$(CONFIG_USB_ISP1301)		+= isp1301.o
>  obj-$(CONFIG_MV_U3D_PHY)		+= mv_u3d_phy.o
>  obj-$(CONFIG_USB_EHCI_TEGRA)	+= tegra_usb_phy.o
> +obj-$(CONFIG_SAMSUNG_USBPHY)		+= samsung-usbphy.o
> diff --git a/drivers/usb/phy/samsung-usbphy.c b/drivers/usb/phy/samsung-
> usbphy.c
> new file mode 100644
> index 0000000..14c182f
> --- /dev/null
> +++ b/drivers/usb/phy/samsung-usbphy.c

Hi,

Basically I agree and this is a good approach to support usb phy for Samsung
stuff...but there are some comments ;)

> @@ -0,0 +1,357 @@
> +/* linux/drivers/usb/phy/samsung-usbphy.c
> + *
> + * Copyright (c) 2012 Samsung Electronics Co., Ltd.
> + *              http://www.samsung.com
> + *
> + * Author: Praveen Paneri <p.paneri@samsung.com>
> + *
> + * Samsung USB2.0 High-speed OTG transceiver, talks to S3C HS OTG
> controller
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +#include <linux/clk.h>
> +#include <linux/delay.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +#include <linux/of.h>
> +#include <linux/usb/otg.h>
> +#include <linux/platform_data/samsung-usbphy.h>
> +
> +/* Register definitions */
> +
> +#define S3C_PHYPWR				(0x00)
> +
IMHO, according to the file name, samsung-usbphy, SAMSUNG_ is better here?


> +#define S3C_PHYPWR_NORMAL_MASK			(0x19 << 0)
> +#define S3C_PHYPWR_OTG_DISABLE			(1 << 4)
> +#define S3C_PHYPWR_ANALOG_POWERDOWN		(1 << 3)
> +#define S3C_PHYPWR_FORCE_SUSPEND		(1 << 1)
> +/* For Exynos4 */
> +#define EXYNOS4_PHYPWR_NORMAL_MASK		(0x39 << 0)

Hmm...is this right? If so, need to use exact name for the definition.

See arch/arm/mach-exynos/include/mach/regs-usb-phy.h

> +#define EXYNOS4_PHYPWR_SLEEP			(1 << 5)

Ditto.

> +
> +#define S3C_PHYCLK				(0x04)
> +
> +#define S3C_PHYCLK_MODE_SERIAL			(1 << 6)

MODE_USB11?

> +#define S3C_PHYCLK_EXT_OSC			(1 << 5)
> +#define S3C_PHYCLK_COMMON_ON_N			(1 << 4)

There are Samsung SoCs which is having two PHYs, so I think, we need to
design this with considering it.

> +#define S3C_PHYCLK_ID_PULL			(1 << 2)
> +#define S3C_PHYCLK_CLKSEL_MASK			(0x3 << 0)
> +#define S3C_PHYCLK_CLKSEL_SHIFT			(0)
> +#define S3C_PHYCLK_CLKSEL_48M			(0x0 << 0)
> +#define S3C_PHYCLK_CLKSEL_12M			(0x2 << 0)
> +#define S3C_PHYCLK_CLKSEL_24M			(0x3 << 0)

As you know, the values for CLKSEL are different on each Samsung SoCs...if
we use this patch, we need to implement for other SoCs many things. In
addition, this patch says can support EXYNOS4210 but not actually...

> +
> +#define S3C_RSTCON				(0x08)
> +
> +#define S3C_RSTCON_PHYCLK			(1 << 2)
> +#define S3C_RSTCON_HCLK				(1 << 1)
> +#define S3C_RSTCON_PHY				(1 << 0)
> +
> +#ifndef MHZ
> +#define MHZ (1000*1000)
> +#endif
> +
> +enum samsung_cpu_type {
> +	TYPE_S3C64XX,
> +	TYPE_EXYNOS4210,
> +};
> +
> +/*
> + * struct samsung_usbphy - transceiver driver state
> + * @phy: transceiver structure
> + * @plat: platform data
> + * @dev: The parent device supplied to the probe function
> + * @clk: usb phy clock
> + * @regs: usb phy register memory base
> + * @ref_clk_freq: reference clock frequency selection
> + * @cpu_type: machine identifier
> + */
> +struct samsung_usbphy {
> +	struct usb_phy	phy;
> +	struct samsung_usbphy_data *plat;
> +	struct device	*dev;
> +	struct clk	*clk;
> +	void __iomem	*regs;
> +	int		ref_clk_freq;
> +	int		cpu_type;
> +};
> +
> +#define phy_to_sphy(x)		container_of((x), struct
samsung_usbphy,
> phy)
> +
> +/*
> + * Returns reference clock frequency selection value
> + */
> +static int samsung_usbphy_get_refclk_freq(struct samsung_usbphy *sphy)
> +{
> +	struct clk *ref_clk;
> +	int refclk_freq = 0;
> +
> +	ref_clk = clk_get(sphy->dev, "xusbxti");
> +	if (IS_ERR(ref_clk)) {

IS_ERR_OR_NULL(ref_clk)?

> +		dev_err(sphy->dev, "Failed to get reference clock\n");
> +		return PTR_ERR(ref_clk);
> +	}
> +
> +	switch (clk_get_rate(ref_clk)) {
> +	case 12 * MHZ:
> +		refclk_freq |= S3C_PHYCLK_CLKSEL_12M;

Just,

+		refclk_freq = S3C_PHYCLK_CLKSEL_12M;

because its defalut value is 0...BTW, how do you think to support other SoCs
such as EXYNOS4210, EXYNOS4X12?

> +		break;
> +	case 24 * MHZ:
> +		refclk_freq |= S3C_PHYCLK_CLKSEL_24M;

Ditto.

> +		break;
> +	default:
> +	case 48 * MHZ:
> +		/* default reference clock */
> +		refclk_freq |= S3C_PHYCLK_CLKSEL_48M;

Ditto...and default refernec clock for EXYNOS4 is 24MHz...

> +		break;
> +	}
> +	clk_put(ref_clk);
> +
> +	return refclk_freq;
> +}
> +

Hmm...I need more time to look at this again...

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
p.paneri@samsung.com Oct. 17, 2012, 12:30 p.m. UTC | #5 
Hi,

On Wed, Oct 17, 2012 at 4:30 PM, Kukjin Kim <kgene.kim@samsung.com> wrote:
> Praveen Paneri wrote:
>>
>> platform_set_drvdata() required for driver's remove function, so adding
>> it back.
>>
>> From v6:
>> Added TODO for phy bindings with controller
>> Dropped platform_set_drvdata() from driver probe
>>
>> This driver uses usb_phy interface to interact with s3c-hsotg. Supports
>> phy_init and phy_shutdown functions to enable/disable phy. Tested with
>> smdk6410 and smdkv310. More SoCs can be brought under later.
>>
>> Signed-off-by: Praveen Paneri <p.paneri@samsung.com>
>> Acked-by: Heiko Stuebner <heiko@sntech.de>
>> ---
>>  .../devicetree/bindings/usb/samsung-usbphy.txt     |   11 +
>>  drivers/usb/phy/Kconfig                            |    8 +
>>  drivers/usb/phy/Makefile                           |    1 +
>>  drivers/usb/phy/samsung-usbphy.c                   |  357
> ++++++++++++++++++++
>>  include/linux/platform_data/samsung-usbphy.h       |   27 ++
>>  5 files changed, 404 insertions(+), 0 deletions(-)
>>  create mode 100644 Documentation/devicetree/bindings/usb/samsung-
>> usbphy.txt
>>  create mode 100644 drivers/usb/phy/samsung-usbphy.c
>>  create mode 100644 include/linux/platform_data/samsung-usbphy.h
>>
>> diff --git a/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
>> b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
>> new file mode 100644
>> index 0000000..7b26e2d
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
>> @@ -0,0 +1,11 @@
>> +* Samsung's usb phy transceiver
>> +
>> +The Samsung's phy transceiver is used for controlling usb otg phy for
>> +s3c-hsotg usb device controller.
>> +TODO: Adding the PHY binding with controller(s) according to the under
>> +developement generic PHY driver.
>> +
>> +Required properties:
>> +- compatible : should be "samsung,exynos4210-usbphy"
>> +- reg : base physical address of the phy registers and length of memory
>> mapped
>> +     region.
>> diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
>> index 63c339b..313685f 100644
>> --- a/drivers/usb/phy/Kconfig
>> +++ b/drivers/usb/phy/Kconfig
>> @@ -32,3 +32,11 @@ config MV_U3D_PHY
>>       help
>>         Enable this to support Marvell USB 3.0 phy controller for Marvell
>>         SoC.
>> +
>> +config SAMSUNG_USBPHY
>> +     bool "Samsung USB PHY controller Driver"
>> +     depends on USB_S3C_HSOTG
>> +     select USB_OTG_UTILS
>> +     help
>> +       Enable this to support Samsung USB phy controller for samsung
>> +       SoCs.
>> diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
>> index b069f29..55dcfc1 100644
>> --- a/drivers/usb/phy/Makefile
>> +++ b/drivers/usb/phy/Makefile
>> @@ -8,3 +8,4 @@ obj-$(CONFIG_OMAP_USB2)                       +=
> omap-usb2.o
>>  obj-$(CONFIG_USB_ISP1301)            += isp1301.o
>>  obj-$(CONFIG_MV_U3D_PHY)             += mv_u3d_phy.o
>>  obj-$(CONFIG_USB_EHCI_TEGRA) += tegra_usb_phy.o
>> +obj-$(CONFIG_SAMSUNG_USBPHY)         += samsung-usbphy.o
>> diff --git a/drivers/usb/phy/samsung-usbphy.c b/drivers/usb/phy/samsung-
>> usbphy.c
>> new file mode 100644
>> index 0000000..14c182f
>> --- /dev/null
>> +++ b/drivers/usb/phy/samsung-usbphy.c
>
> Hi,
>
> Basically I agree and this is a good approach to support usb phy for Samsung
> stuff...but there are some comments ;)
>
>> @@ -0,0 +1,357 @@
>> +/* linux/drivers/usb/phy/samsung-usbphy.c
>> + *
>> + * Copyright (c) 2012 Samsung Electronics Co., Ltd.
>> + *              http://www.samsung.com
>> + *
>> + * Author: Praveen Paneri <p.paneri@samsung.com>
>> + *
>> + * Samsung USB2.0 High-speed OTG transceiver, talks to S3C HS OTG
>> controller
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>> + * GNU General Public License for more details.
>> + */
>> +
>> +#include <linux/module.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/clk.h>
>> +#include <linux/delay.h>
>> +#include <linux/err.h>
>> +#include <linux/io.h>
>> +#include <linux/of.h>
>> +#include <linux/usb/otg.h>
>> +#include <linux/platform_data/samsung-usbphy.h>
>> +
>> +/* Register definitions */
>> +
>> +#define S3C_PHYPWR                           (0x00)
>> +
> IMHO, according to the file name, samsung-usbphy, SAMSUNG_ is better here?
Sure I will change this for register names and drop S3C_ from bit definitions.
>
>
>> +#define S3C_PHYPWR_NORMAL_MASK                       (0x19 << 0)
>> +#define S3C_PHYPWR_OTG_DISABLE                       (1 << 4)
>> +#define S3C_PHYPWR_ANALOG_POWERDOWN          (1 << 3)
>> +#define S3C_PHYPWR_FORCE_SUSPEND             (1 << 1)
>> +/* For Exynos4 */
>> +#define EXYNOS4_PHYPWR_NORMAL_MASK           (0x39 << 0)
>
> Hmm...is this right? If so, need to use exact name for the definition.
Name should be changed, will do that.
>
> See arch/arm/mach-exynos/include/mach/regs-usb-phy.h
>
>> +#define EXYNOS4_PHYPWR_SLEEP                 (1 << 5)
>
> Ditto.
>
>> +
>> +#define S3C_PHYCLK                           (0x04)
>> +
>> +#define S3C_PHYCLK_MODE_SERIAL                       (1 << 6)
>
> MODE_USB11?
Yes! Will update this as well.
>
>> +#define S3C_PHYCLK_EXT_OSC                   (1 << 5)
>> +#define S3C_PHYCLK_COMMON_ON_N                       (1 << 4)
>
> There are Samsung SoCs which is having two PHYs, so I think, we need to
> design this with considering it.
Yes! I do plan to add support for other SoCs. We will have to update
the register definition accordingly for PHY0 and PHY1.
>
>> +#define S3C_PHYCLK_ID_PULL                   (1 << 2)
>> +#define S3C_PHYCLK_CLKSEL_MASK                       (0x3 << 0)
>> +#define S3C_PHYCLK_CLKSEL_SHIFT                      (0)
>> +#define S3C_PHYCLK_CLKSEL_48M                        (0x0 << 0)
>> +#define S3C_PHYCLK_CLKSEL_12M                        (0x2 << 0)
>> +#define S3C_PHYCLK_CLKSEL_24M                        (0x3 << 0)
>
> As you know, the values for CLKSEL are different on each Samsung SoCs...if
Yeah those bit definitions have to be added here, just as they are in
the file you mentioned.
See arch/arm/mach-exynos/include/mach/regs-usb-phy.h
> we use this patch, we need to implement for other SoCs many things. In
> addition, this patch says can support EXYNOS4210 but not actually...
I have tested on SMDKV310 and SMDK6410 with s3c-hsotg. So, host phy
control support is yet to be added.

>
>> +
>> +#define S3C_RSTCON                           (0x08)
>> +
>> +#define S3C_RSTCON_PHYCLK                    (1 << 2)
>> +#define S3C_RSTCON_HCLK                              (1 << 1)
>> +#define S3C_RSTCON_PHY                               (1 << 0)
>> +
>> +#ifndef MHZ
>> +#define MHZ (1000*1000)
>> +#endif
>> +
>> +enum samsung_cpu_type {
>> +     TYPE_S3C64XX,
>> +     TYPE_EXYNOS4210,
>> +};
>> +
>> +/*
>> + * struct samsung_usbphy - transceiver driver state
>> + * @phy: transceiver structure
>> + * @plat: platform data
>> + * @dev: The parent device supplied to the probe function
>> + * @clk: usb phy clock
>> + * @regs: usb phy register memory base
>> + * @ref_clk_freq: reference clock frequency selection
>> + * @cpu_type: machine identifier
>> + */
>> +struct samsung_usbphy {
>> +     struct usb_phy  phy;
>> +     struct samsung_usbphy_data *plat;
>> +     struct device   *dev;
>> +     struct clk      *clk;
>> +     void __iomem    *regs;
>> +     int             ref_clk_freq;
>> +     int             cpu_type;
>> +};
>> +
>> +#define phy_to_sphy(x)               container_of((x), struct
> samsung_usbphy,
>> phy)
>> +
>> +/*
>> + * Returns reference clock frequency selection value
>> + */
>> +static int samsung_usbphy_get_refclk_freq(struct samsung_usbphy *sphy)
>> +{
>> +     struct clk *ref_clk;
>> +     int refclk_freq = 0;
>> +
>> +     ref_clk = clk_get(sphy->dev, "xusbxti");
>> +     if (IS_ERR(ref_clk)) {
>
> IS_ERR_OR_NULL(ref_clk)?
sure
>
>> +             dev_err(sphy->dev, "Failed to get reference clock\n");
>> +             return PTR_ERR(ref_clk);
>> +     }
>> +
>> +     switch (clk_get_rate(ref_clk)) {
>> +     case 12 * MHZ:
>> +             refclk_freq |= S3C_PHYCLK_CLKSEL_12M;
>
> Just,
>
> +               refclk_freq = S3C_PHYCLK_CLKSEL_12M;
>
> because its defalut value is 0...BTW, how do you think to support other SoCs
> such as EXYNOS4210, EXYNOS4X12?
Will make use of sphy->cpu_type here. No?
>
>> +             break;
>> +     case 24 * MHZ:
>> +             refclk_freq |= S3C_PHYCLK_CLKSEL_24M;
>
> Ditto.
>
>> +             break;
>> +     default:
>> +     case 48 * MHZ:
>> +             /* default reference clock */
>> +             refclk_freq |= S3C_PHYCLK_CLKSEL_48M;
>
> Ditto...and default refernec clock for EXYNOS4 is 24MHz...
Okay! So it needs an if statement here then.
>
>> +             break;
>> +     }
>> +     clk_put(ref_clk);
>> +
>> +     return refclk_freq;
>> +}
>> +
>
> Hmm...I need more time to look at this again...
Thank you :)
In that case, I will wait for further comments from you and then only
send my subsequent patches.

Regards,
Praveen
>
> Thanks.
>
> Best regards,
> Kgene.
> --
> Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
> SW Solution Development Team, Samsung Electronics Co., Ltd.
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-usb" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
Russell King - ARM Linux Oct. 17, 2012, 7:13 p.m. UTC | #6 
On Wed, Oct 17, 2012 at 08:00:00PM +0900, Kukjin Kim wrote:
> > +static int samsung_usbphy_get_refclk_freq(struct samsung_usbphy *sphy)
> > +{
> > +	struct clk *ref_clk;
> > +	int refclk_freq = 0;
> > +
> > +	ref_clk = clk_get(sphy->dev, "xusbxti");
> > +	if (IS_ERR(ref_clk)) {
> 
> IS_ERR_OR_NULL(ref_clk)?

For the N'th time, NO.  IS_ERR is correct here.

> > +		dev_err(sphy->dev, "Failed to get reference clock\n");
> > +		return PTR_ERR(ref_clk);

Look, it's the ABI.  Not only that but it's also TOTALLY AND UTTERLY WRONG
to use IS_ERR_OR_NULL(foo) and then follow it with return PTR_ERR(foo).
You end up returning ZERO.

Stop telling people to use IS_ERR_OR_NULL without properly thinking about
it first.  Virtually every single one of these done this way is a BUG.

Are we clear on this?
Pavel Machek Oct. 20, 2012, 7:19 p.m. UTC | #7 
Hi!

> > +#define S3C_PHYPWR				(0x00)
...
> > +#define S3C_PHYCLK				(0x04)
> > +
> > +#define S3C_PHYCLK_MODE_SERIAL			(1 << 6)
> > +#define S3C_PHYCLK_EXT_OSC			(1 << 5)
> > +#define S3C_PHYCLK_COMMON_ON_N			(1 << 4)
> > +#define S3C_PHYCLK_ID_PULL			(1 << 2)
> > +#define S3C_PHYCLK_CLKSEL_MASK			(0x3 << 0)
> > +#define S3C_PHYCLK_CLKSEL_SHIFT			(0)
> > +#define S3C_PHYCLK_CLKSEL_48M			(0x0 << 0)
> > +#define S3C_PHYCLK_CLKSEL_12M			(0x2 << 0)
> > +#define S3C_PHYCLK_CLKSEL_24M			(0x3 << 0)

I believe these 0x 's should be removed. Ouch and << 0 is interesting,
too, just remove it.

									Pavel
Domenico Andreoli Oct. 21, 2012, 7:16 a.m. UTC | #8 
On Wed, Oct 17, 2012 at 08:13:01PM +0100, Russell King - ARM Linux wrote:
> On Wed, Oct 17, 2012 at 08:00:00PM +0900, Kukjin Kim wrote:
> > > +static int samsung_usbphy_get_refclk_freq(struct samsung_usbphy *sphy)
> > > +{
> > > +	struct clk *ref_clk;
> > > +	int refclk_freq = 0;
> > > +
> > > +	ref_clk = clk_get(sphy->dev, "xusbxti");
> > > +	if (IS_ERR(ref_clk)) {
> > 
> > IS_ERR_OR_NULL(ref_clk)?
> 
> For the N'th time, NO.  IS_ERR is correct here.
> 
> > > +		dev_err(sphy->dev, "Failed to get reference clock\n");
> > > +		return PTR_ERR(ref_clk);
> 
> Look, it's the ABI.  Not only that but it's also TOTALLY AND UTTERLY WRONG
> to use IS_ERR_OR_NULL(foo) and then follow it with return PTR_ERR(foo).
> You end up returning ZERO.
> 
> Stop telling people to use IS_ERR_OR_NULL without properly thinking about
> it first.  Virtually every single one of these done this way is a BUG.
> 
> Are we clear on this?

Wouldn't be much easier to define PTR_ERR() to return -Esomething when
its argument is NULL?

This would end the whole issue of "should I use IS_ERR*/PTR_ERR or look into
the pointer myself?" story.  One could simply always use IS_ERR*/PTR_ERR
and have the right thing done in whatever case.

Regards,
Domenico
p.paneri@samsung.com Oct. 22, 2012, 5:43 a.m. UTC | #9 
Hi,

On Sun, Oct 21, 2012 at 12:49 AM, Pavel Machek <pavel@ucw.cz> wrote:
> Hi!
>
>> > +#define S3C_PHYPWR                         (0x00)
> ...
>> > +#define S3C_PHYCLK                         (0x04)
>> > +
>> > +#define S3C_PHYCLK_MODE_SERIAL                     (1 << 6)
>> > +#define S3C_PHYCLK_EXT_OSC                 (1 << 5)
>> > +#define S3C_PHYCLK_COMMON_ON_N                     (1 << 4)
>> > +#define S3C_PHYCLK_ID_PULL                 (1 << 2)
>> > +#define S3C_PHYCLK_CLKSEL_MASK                     (0x3 << 0)
>> > +#define S3C_PHYCLK_CLKSEL_SHIFT                    (0)
>> > +#define S3C_PHYCLK_CLKSEL_48M                      (0x0 << 0)
>> > +#define S3C_PHYCLK_CLKSEL_12M                      (0x2 << 0)
>> > +#define S3C_PHYCLK_CLKSEL_24M                      (0x3 << 0)
>
> I believe these 0x 's should be removed. Ouch and << 0 is interesting,
> too, just remove it.
Yes it makes sense to maintain a uniform pattern across all the
definition. How about maintaining hex values everywhere instead of
dropping 0x's? It will make it easier to add big values to the
definitions tomorrow, if needed.
About "<< 0", IMHO people must have started using it to maintain a
parallelism with other definitions. I do not mind changing it if you
still feel that it's very much needed
thanks :)

Praveen
>
>                                                                         Pavel
> --
> (english) http://www.livejournal.com/~pavelmachek
> (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
diff mbox

Patch

diff --git a/Documentation/devicetree/bindings/usb/samsung-usbphy.txt b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
new file mode 100644
index 0000000..7b26e2d
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
@@ -0,0 +1,11 @@ 
+* Samsung's usb phy transceiver
+
+The Samsung's phy transceiver is used for controlling usb otg phy for
+s3c-hsotg usb device controller.
+TODO: Adding the PHY binding with controller(s) according to the under
+developement generic PHY driver.
+
+Required properties:
+- compatible : should be "samsung,exynos4210-usbphy"
+- reg : base physical address of the phy registers and length of memory mapped
+	region.
diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
index 63c339b..313685f 100644
--- a/drivers/usb/phy/Kconfig
+++ b/drivers/usb/phy/Kconfig
@@ -32,3 +32,11 @@  config MV_U3D_PHY
 	help
 	  Enable this to support Marvell USB 3.0 phy controller for Marvell
 	  SoC.
+
+config SAMSUNG_USBPHY
+	bool "Samsung USB PHY controller Driver"
+	depends on USB_S3C_HSOTG
+	select USB_OTG_UTILS
+	help
+	  Enable this to support Samsung USB phy controller for samsung
+	  SoCs.
diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
index b069f29..55dcfc1 100644
--- a/drivers/usb/phy/Makefile
+++ b/drivers/usb/phy/Makefile
@@ -8,3 +8,4 @@  obj-$(CONFIG_OMAP_USB2)			+= omap-usb2.o
 obj-$(CONFIG_USB_ISP1301)		+= isp1301.o
 obj-$(CONFIG_MV_U3D_PHY)		+= mv_u3d_phy.o
 obj-$(CONFIG_USB_EHCI_TEGRA)	+= tegra_usb_phy.o
+obj-$(CONFIG_SAMSUNG_USBPHY)		+= samsung-usbphy.o
diff --git a/drivers/usb/phy/samsung-usbphy.c b/drivers/usb/phy/samsung-usbphy.c
new file mode 100644
index 0000000..14c182f
--- /dev/null
+++ b/drivers/usb/phy/samsung-usbphy.c
@@ -0,0 +1,357 @@ 
+/* linux/drivers/usb/phy/samsung-usbphy.c
+ *
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Author: Praveen Paneri <p.paneri@samsung.com>
+ *
+ * Samsung USB2.0 High-speed OTG transceiver, talks to S3C HS OTG controller
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/usb/otg.h>
+#include <linux/platform_data/samsung-usbphy.h>
+
+/* Register definitions */
+
+#define S3C_PHYPWR				(0x00)
+
+#define S3C_PHYPWR_NORMAL_MASK			(0x19 << 0)
+#define S3C_PHYPWR_OTG_DISABLE			(1 << 4)
+#define S3C_PHYPWR_ANALOG_POWERDOWN		(1 << 3)
+#define S3C_PHYPWR_FORCE_SUSPEND		(1 << 1)
+/* For Exynos4 */
+#define EXYNOS4_PHYPWR_NORMAL_MASK		(0x39 << 0)
+#define EXYNOS4_PHYPWR_SLEEP			(1 << 5)
+
+#define S3C_PHYCLK				(0x04)
+
+#define S3C_PHYCLK_MODE_SERIAL			(1 << 6)
+#define S3C_PHYCLK_EXT_OSC			(1 << 5)
+#define S3C_PHYCLK_COMMON_ON_N			(1 << 4)
+#define S3C_PHYCLK_ID_PULL			(1 << 2)
+#define S3C_PHYCLK_CLKSEL_MASK			(0x3 << 0)
+#define S3C_PHYCLK_CLKSEL_SHIFT			(0)
+#define S3C_PHYCLK_CLKSEL_48M			(0x0 << 0)
+#define S3C_PHYCLK_CLKSEL_12M			(0x2 << 0)
+#define S3C_PHYCLK_CLKSEL_24M			(0x3 << 0)
+
+#define S3C_RSTCON				(0x08)
+
+#define S3C_RSTCON_PHYCLK			(1 << 2)
+#define S3C_RSTCON_HCLK				(1 << 1)
+#define S3C_RSTCON_PHY				(1 << 0)
+
+#ifndef MHZ
+#define MHZ (1000*1000)
+#endif
+
+enum samsung_cpu_type {
+	TYPE_S3C64XX,
+	TYPE_EXYNOS4210,
+};
+
+/*
+ * struct samsung_usbphy - transceiver driver state
+ * @phy: transceiver structure
+ * @plat: platform data
+ * @dev: The parent device supplied to the probe function
+ * @clk: usb phy clock
+ * @regs: usb phy register memory base
+ * @ref_clk_freq: reference clock frequency selection
+ * @cpu_type: machine identifier
+ */
+struct samsung_usbphy {
+	struct usb_phy	phy;
+	struct samsung_usbphy_data *plat;
+	struct device	*dev;
+	struct clk	*clk;
+	void __iomem	*regs;
+	int		ref_clk_freq;
+	int		cpu_type;
+};
+
+#define phy_to_sphy(x)		container_of((x), struct samsung_usbphy, phy)
+
+/*
+ * Returns reference clock frequency selection value
+ */
+static int samsung_usbphy_get_refclk_freq(struct samsung_usbphy *sphy)
+{
+	struct clk *ref_clk;
+	int refclk_freq = 0;
+
+	ref_clk = clk_get(sphy->dev, "xusbxti");
+	if (IS_ERR(ref_clk)) {
+		dev_err(sphy->dev, "Failed to get reference clock\n");
+		return PTR_ERR(ref_clk);
+	}
+
+	switch (clk_get_rate(ref_clk)) {
+	case 12 * MHZ:
+		refclk_freq |= S3C_PHYCLK_CLKSEL_12M;
+		break;
+	case 24 * MHZ:
+		refclk_freq |= S3C_PHYCLK_CLKSEL_24M;
+		break;
+	default:
+	case 48 * MHZ:
+		/* default reference clock */
+		refclk_freq |= S3C_PHYCLK_CLKSEL_48M;
+		break;
+	}
+	clk_put(ref_clk);
+
+	return refclk_freq;
+}
+
+static void samsung_usbphy_enable(struct samsung_usbphy *sphy)
+{
+	void __iomem *regs = sphy->regs;
+	u32 phypwr;
+	u32 phyclk;
+	u32 rstcon;
+
+	/* set clock frequency for PLL */
+	phyclk = sphy->ref_clk_freq;
+	phypwr = readl(regs + S3C_PHYPWR);
+	rstcon = readl(regs + S3C_RSTCON);
+
+	switch (sphy->cpu_type) {
+	case TYPE_S3C64XX:
+		phyclk &= ~(S3C_PHYCLK_COMMON_ON_N);
+		phypwr &= ~S3C_PHYPWR_NORMAL_MASK;
+		rstcon |= S3C_RSTCON_PHY;
+		break;
+	case TYPE_EXYNOS4210:
+		phypwr &= ~EXYNOS4_PHYPWR_NORMAL_MASK;
+		rstcon |= S3C_RSTCON_PHY;
+	default:
+		break;
+	}
+
+	writel(phyclk, regs + S3C_PHYCLK);
+	/* set to normal of PHY0 */
+	writel(phypwr, regs + S3C_PHYPWR);
+	/* reset all ports of PHY and Link */
+	writel(rstcon, regs + S3C_RSTCON);
+	udelay(10);
+	rstcon &= ~S3C_RSTCON_PHY;
+	writel(rstcon, regs + S3C_RSTCON);
+}
+
+static void samsung_usbphy_disable(struct samsung_usbphy *sphy)
+{
+	void __iomem *regs = sphy->regs;
+	u32 phypwr;
+
+	phypwr = readl(regs + S3C_PHYPWR);
+
+	switch (sphy->cpu_type) {
+	case TYPE_S3C64XX:
+		phypwr |= S3C_PHYPWR_NORMAL_MASK;
+		break;
+	case TYPE_EXYNOS4210:
+		phypwr |= EXYNOS4_PHYPWR_NORMAL_MASK;
+	default:
+		break;
+	}
+
+	/* unset to normal of PHY0 */
+	writel(phypwr, regs + S3C_PHYPWR);
+}
+
+/*
+ * The function passed to the usb driver for phy initialization
+ */
+static int samsung_usbphy_init(struct usb_phy *phy)
+{
+	struct samsung_usbphy *sphy;
+	int ret = 0;
+
+	sphy = phy_to_sphy(phy);
+
+	/* Enable the phy clock */
+	ret = clk_prepare_enable(sphy->clk);
+	if (ret) {
+		dev_err(sphy->dev, "%s: clk_prepare_enable failed\n", __func__);
+		return ret;
+	}
+
+	/* Disable phy isolation */
+	if (sphy->plat && sphy->plat->pmu_isolation)
+		sphy->plat->pmu_isolation(false);
+
+	/* Initialize usb phy registers */
+	samsung_usbphy_enable(sphy);
+
+	/* Disable the phy clock */
+	clk_disable_unprepare(sphy->clk);
+	return ret;
+}
+
+/*
+ * The function passed to the usb driver for phy shutdown
+ */
+static void samsung_usbphy_shutdown(struct usb_phy *phy)
+{
+	struct samsung_usbphy *sphy;
+
+	sphy = phy_to_sphy(phy);
+
+	if (clk_prepare_enable(sphy->clk)) {
+		dev_err(sphy->dev, "%s: clk_prepare_enable failed\n", __func__);
+		return;
+	}
+
+	/* De-initialize usb phy registers */
+	samsung_usbphy_disable(sphy);
+
+	/* Enable phy isolation */
+	if (sphy->plat && sphy->plat->pmu_isolation)
+		sphy->plat->pmu_isolation(true);
+
+	clk_disable_unprepare(sphy->clk);
+}
+
+static const struct of_device_id samsung_usbphy_dt_match[];
+
+static inline int samsung_usbphy_get_driver_data(struct platform_device *pdev)
+{
+	if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
+		int data;
+		const struct of_device_id *match;
+		match = of_match_node(samsung_usbphy_dt_match,
+							pdev->dev.of_node);
+		data = (int) match->data;
+		return data;
+	}
+
+	return platform_get_device_id(pdev)->driver_data;
+}
+
+static int __devinit samsung_usbphy_probe(struct platform_device *pdev)
+{
+	struct samsung_usbphy *sphy;
+	struct samsung_usbphy_data *pdata;
+	struct device *dev = &pdev->dev;
+	struct resource *phy_mem;
+	void __iomem	*phy_base;
+	struct clk *clk;
+	int	ret = 0;
+
+	pdata = pdev->dev.platform_data;
+	if (!pdata) {
+		dev_err(&pdev->dev, "%s: no platform data defined\n", __func__);
+		return -EINVAL;
+	}
+
+	phy_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (!phy_mem) {
+		dev_err(dev, "%s: missing mem resource\n", __func__);
+		return -ENODEV;
+	}
+
+	phy_base = devm_request_and_ioremap(dev, phy_mem);
+	if (!phy_base) {
+		dev_err(dev, "%s: register mapping failed\n", __func__);
+		return -ENXIO;
+	}
+
+	sphy = devm_kzalloc(dev, sizeof(*sphy), GFP_KERNEL);
+	if (!sphy)
+		return -ENOMEM;
+
+	clk = devm_clk_get(dev, "otg");
+	if (IS_ERR(clk)) {
+		dev_err(dev, "Failed to get otg clock\n");
+		return PTR_ERR(clk);
+	}
+
+	sphy->dev		= &pdev->dev;
+	sphy->plat		= pdata;
+	sphy->regs		= phy_base;
+	sphy->clk		= clk;
+	sphy->phy.dev		= sphy->dev;
+	sphy->phy.label		= "samsung-usbphy";
+	sphy->phy.init		= samsung_usbphy_init;
+	sphy->phy.shutdown	= samsung_usbphy_shutdown;
+	sphy->cpu_type		= samsung_usbphy_get_driver_data(pdev);
+	sphy->ref_clk_freq	= samsung_usbphy_get_refclk_freq(sphy);
+
+	platform_set_drvdata(pdev, sphy);
+
+	ret = usb_add_phy(&sphy->phy, USB_PHY_TYPE_USB2);
+	return ret;
+}
+
+static int __exit samsung_usbphy_remove(struct platform_device *pdev)
+{
+	struct samsung_usbphy *sphy = platform_get_drvdata(pdev);
+
+	usb_remove_phy(&sphy->phy);
+
+	return 0;
+}
+
+#ifdef CONFIG_OF
+static const struct of_device_id samsung_usbphy_dt_match[] = {
+	{
+		.compatible = "samsung,s3c64xx-usbphy",
+		.data = (void *)TYPE_S3C64XX,
+	}, {
+		.compatible = "samsung,exynos4210-usbphy",
+		.data = (void *)TYPE_EXYNOS4210,
+	},
+	{},
+};
+MODULE_DEVICE_TABLE(of, samsung_usbphy_dt_match);
+#else
+#define samsung_usbphy_dt_match NULL
+#endif
+
+static struct platform_device_id samsung_usbphy_driver_ids[] = {
+	{
+		.name		= "s3c64xx-usbphy",
+		.driver_data	= TYPE_S3C64XX,
+	}, {
+		.name		= "exynos4210-usbphy",
+		.driver_data	= TYPE_EXYNOS4210,
+	},
+	{},
+};
+
+MODULE_DEVICE_TABLE(platform, samsung_usbphy_driver_ids);
+
+static struct platform_driver samsung_usbphy_driver = {
+	.probe		= samsung_usbphy_probe,
+	.remove		= __devexit_p(samsung_usbphy_remove),
+	.id_table	= samsung_usbphy_driver_ids,
+	.driver		= {
+		.name	= "samsung-usbphy",
+		.owner	= THIS_MODULE,
+		.of_match_table = samsung_usbphy_dt_match,
+	},
+};
+
+module_platform_driver(samsung_usbphy_driver);
+
+MODULE_DESCRIPTION("Samsung USB phy controller");
+MODULE_AUTHOR("Praveen Paneri <p.paneri@samsung.com>");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:samsung-usbphy");
diff --git a/include/linux/platform_data/samsung-usbphy.h b/include/linux/platform_data/samsung-usbphy.h
new file mode 100644
index 0000000..1bd24cb
--- /dev/null
+++ b/include/linux/platform_data/samsung-usbphy.h
@@ -0,0 +1,27 @@ 
+/*
+ * Copyright (C) 2012 Samsung Electronics Co.Ltd
+ *		http://www.samsung.com/
+ * Author: Praveen Paneri <p.paneri@samsung.com>
+ *
+ * Defines platform data for samsung usb phy driver.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#ifndef __SAMSUNG_USBPHY_PLATFORM_H
+#define __SAMSUNG_USBPHY_PLATFORM_H
+
+/**
+ * samsung_usbphy_data - Platform data for USB PHY driver.
+ * @pmu_isolation: Function to control usb phy isolation in PMU.
+ */
+struct samsung_usbphy_data {
+	void (*pmu_isolation)(int on);
+};
+
+extern void samsung_usbphy_set_pdata(struct samsung_usbphy_data *pd);
+
+#endif /* __SAMSUNG_USBPHY_PLATFORM_H */