| Message ID | 1350242593-17761-6-git-send-email-rabin@rab.in (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 10/14, Rabin Vincent wrote: > > Flush the cache so that the instructions written to the XOL area are > visible. > > Signed-off-by: Rabin Vincent <rabin@rab.in> > --- > kernel/events/uprobes.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/kernel/events/uprobes.c b/kernel/events/uprobes.c > index ca000a9..8c52f93 100644 > --- a/kernel/events/uprobes.c > +++ b/kernel/events/uprobes.c > @@ -1246,6 +1246,7 @@ static unsigned long xol_get_insn_slot(struct uprobe *uprobe, unsigned long slot > offset = current->utask->xol_vaddr & ~PAGE_MASK; > vaddr = kmap_atomic(area->page); > arch_uprobe_xol_copy(&uprobe->arch, vaddr + offset); > + flush_dcache_page(area->page); > kunmap_atomic(vaddr); I agree... but why under kmap_atomic? Oleg.
2012/10/15 Oleg Nesterov <oleg@redhat.com>: > On 10/14, Rabin Vincent wrote: >> Flush the cache so that the instructions written to the XOL area are >> visible. >> >> Signed-off-by: Rabin Vincent <rabin@rab.in> >> --- >> kernel/events/uprobes.c | 1 + >> 1 file changed, 1 insertion(+) >> >> diff --git a/kernel/events/uprobes.c b/kernel/events/uprobes.c >> index ca000a9..8c52f93 100644 >> --- a/kernel/events/uprobes.c >> +++ b/kernel/events/uprobes.c >> @@ -1246,6 +1246,7 @@ static unsigned long xol_get_insn_slot(struct uprobe *uprobe, unsigned long slot >> offset = current->utask->xol_vaddr & ~PAGE_MASK; >> vaddr = kmap_atomic(area->page); >> arch_uprobe_xol_copy(&uprobe->arch, vaddr + offset); >> + flush_dcache_page(area->page); >> kunmap_atomic(vaddr); > > I agree... but why under kmap_atomic? No real reason; I'll move it to after the unmap.
On 10/16, Rabin Vincent wrote: > > 2012/10/15 Oleg Nesterov <oleg@redhat.com>: > > On 10/14, Rabin Vincent wrote: > >> Flush the cache so that the instructions written to the XOL area are > >> visible. > >> > >> Signed-off-by: Rabin Vincent <rabin@rab.in> > >> --- > >> kernel/events/uprobes.c | 1 + > >> 1 file changed, 1 insertion(+) > >> > >> diff --git a/kernel/events/uprobes.c b/kernel/events/uprobes.c > >> index ca000a9..8c52f93 100644 > >> --- a/kernel/events/uprobes.c > >> +++ b/kernel/events/uprobes.c > >> @@ -1246,6 +1246,7 @@ static unsigned long xol_get_insn_slot(struct uprobe *uprobe, unsigned long slot > >> offset = current->utask->xol_vaddr & ~PAGE_MASK; > >> vaddr = kmap_atomic(area->page); > >> arch_uprobe_xol_copy(&uprobe->arch, vaddr + offset); > >> + flush_dcache_page(area->page); > >> kunmap_atomic(vaddr); > > > > I agree... but why under kmap_atomic? > > No real reason; I'll move it to after the unmap. OK. I assume you will send v2. But this patch looks like a bugfix, flush_dcache_page() is not a nop on powerpc. So perhaps we should apply this fix right now? OTOH, I do not understand this stuff, everything is nop on x86. And when I look into Documentation/cachetlb.txt I am starting to think that may be this needs flush_icache_user_range instead? Rabin, Ananth could you clarify this? Oleg.
On Thu, Oct 25, 2012 at 04:58:39PM +0200, Oleg Nesterov wrote: > On 10/16, Rabin Vincent wrote: > > > > 2012/10/15 Oleg Nesterov <oleg@redhat.com>: > > > On 10/14, Rabin Vincent wrote: > > >> Flush the cache so that the instructions written to the XOL area are > > >> visible. > > >> > > >> Signed-off-by: Rabin Vincent <rabin@rab.in> > > >> --- > > >> kernel/events/uprobes.c | 1 + > > >> 1 file changed, 1 insertion(+) > > >> > > >> diff --git a/kernel/events/uprobes.c b/kernel/events/uprobes.c > > >> index ca000a9..8c52f93 100644 > > >> --- a/kernel/events/uprobes.c > > >> +++ b/kernel/events/uprobes.c > > >> @@ -1246,6 +1246,7 @@ static unsigned long xol_get_insn_slot(struct uprobe *uprobe, unsigned long slot > > >> offset = current->utask->xol_vaddr & ~PAGE_MASK; > > >> vaddr = kmap_atomic(area->page); > > >> arch_uprobe_xol_copy(&uprobe->arch, vaddr + offset); > > >> + flush_dcache_page(area->page); > > >> kunmap_atomic(vaddr); > > > > > > I agree... but why under kmap_atomic? > > > > No real reason; I'll move it to after the unmap. > > OK. I assume you will send v2. > > But this patch looks like a bugfix, flush_dcache_page() is not a nop > on powerpc. So perhaps we should apply this fix right now? Starting Power5, all Power processers have coherent caches. > OTOH, I do not understand this stuff, everything is nop on x86. And > when I look into Documentation/cachetlb.txt I am starting to think > that may be this needs flush_icache_user_range instead? > > Rabin, Ananth could you clarify this? Yes. We need flush_icache_user_range(). Though for x86 its always been a nop, one never knows if there is some Power4 or older machine out there that is still being used. We are fine for Power5 and later. Ananth
On 10/26, Ananth N Mavinakayanahalli wrote: > > On Thu, Oct 25, 2012 at 04:58:39PM +0200, Oleg Nesterov wrote: > > On 10/16, Rabin Vincent wrote: > > > > > > >> --- a/kernel/events/uprobes.c > > > >> +++ b/kernel/events/uprobes.c > > > >> @@ -1246,6 +1246,7 @@ static unsigned long xol_get_insn_slot(struct uprobe *uprobe, unsigned long slot > > > >> offset = current->utask->xol_vaddr & ~PAGE_MASK; > > > >> vaddr = kmap_atomic(area->page); > > > >> arch_uprobe_xol_copy(&uprobe->arch, vaddr + offset); > > > >> + flush_dcache_page(area->page); > > > >> kunmap_atomic(vaddr); > > > > > > > > I agree... but why under kmap_atomic? > > > > > > No real reason; I'll move it to after the unmap. > > > > OK. I assume you will send v2. > > > > But this patch looks like a bugfix, flush_dcache_page() is not a nop > > on powerpc. So perhaps we should apply this fix right now? > > Starting Power5, all Power processers have coherent caches. > > > OTOH, I do not understand this stuff, everything is nop on x86. And > > when I look into Documentation/cachetlb.txt I am starting to think > > that may be this needs flush_icache_user_range instead? > > > > Rabin, Ananth could you clarify this? > > Yes. We need flush_icache_user_range(). Though for x86 its always been a > nop, one never knows if there is some Power4 or older machine out there > that is still being used. We are fine for Power5 and later. This is bad... flush_icache_user needs vma. perhaps just to check VM_EXEC... So let me repeat to be sure I really understand, do you confirm that _in general_ flush_dcache_page() is not enough? Oleg.
On Fri, Oct 26, 2012 at 06:39:51PM +0200, Oleg Nesterov wrote: > On 10/26, Ananth N Mavinakayanahalli wrote: > > > > On Thu, Oct 25, 2012 at 04:58:39PM +0200, Oleg Nesterov wrote: > > > On 10/16, Rabin Vincent wrote: > > > > > > > > >> --- a/kernel/events/uprobes.c > > > > >> +++ b/kernel/events/uprobes.c > > > > >> @@ -1246,6 +1246,7 @@ static unsigned long xol_get_insn_slot(struct uprobe *uprobe, unsigned long slot > > > > >> offset = current->utask->xol_vaddr & ~PAGE_MASK; > > > > >> vaddr = kmap_atomic(area->page); > > > > >> arch_uprobe_xol_copy(&uprobe->arch, vaddr + offset); > > > > >> + flush_dcache_page(area->page); > > > > >> kunmap_atomic(vaddr); > > > > > > > > > > I agree... but why under kmap_atomic? > > > > > > > > No real reason; I'll move it to after the unmap. > > > > > > OK. I assume you will send v2. > > > > > > But this patch looks like a bugfix, flush_dcache_page() is not a nop > > > on powerpc. So perhaps we should apply this fix right now? > > > > Starting Power5, all Power processers have coherent caches. > > > > > OTOH, I do not understand this stuff, everything is nop on x86. And > > > when I look into Documentation/cachetlb.txt I am starting to think > > > that may be this needs flush_icache_user_range instead? > > > > > > Rabin, Ananth could you clarify this? > > > > Yes. We need flush_icache_user_range(). Though for x86 its always been a > > nop, one never knows if there is some Power4 or older machine out there > > that is still being used. We are fine for Power5 and later. > > This is bad... > > flush_icache_user needs vma. perhaps just to check VM_EXEC... > > So let me repeat to be sure I really understand, do you confirm that > _in general_ flush_dcache_page() is not enough? flush_dcache_page() on powerpc already checks for CPU_FTR_COHERENT_ICACHE. So, yes, that is enough. Ananth
diff --git a/kernel/events/uprobes.c b/kernel/events/uprobes.c index ca000a9..8c52f93 100644 --- a/kernel/events/uprobes.c +++ b/kernel/events/uprobes.c @@ -1246,6 +1246,7 @@ static unsigned long xol_get_insn_slot(struct uprobe *uprobe, unsigned long slot offset = current->utask->xol_vaddr & ~PAGE_MASK; vaddr = kmap_atomic(area->page); arch_uprobe_xol_copy(&uprobe->arch, vaddr + offset); + flush_dcache_page(area->page); kunmap_atomic(vaddr); return current->utask->xol_vaddr;
Flush the cache so that the instructions written to the XOL area are visible. Signed-off-by: Rabin Vincent <rabin@rab.in> --- kernel/events/uprobes.c | 1 + 1 file changed, 1 insertion(+)