diff mbox

ARM: EXYNOS5: Remove wrongly placed usb2.0 PHY_CFG definition from PMU_REG

Message ID 1349443590-29901-1-git-send-email-gautam.vivek@samsung.com (mailing list archive)
State New, archived
Headers show

Commit Message

Vivek Gautam Oct. 5, 2012, 1:26 p.m. UTC
EXYNOS5_USB_CFG macro should actually point to USB20PHY_CFG
system register (base addr + 0x230). It's wrongly placed in regs-pmu.
Actual register at offset 0x230 in PMU is SEQ_TRANSITION4.

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
---
 arch/arm/mach-exynos/include/mach/regs-pmu.h |    2 --
 1 files changed, 0 insertions(+), 2 deletions(-)

Comments

Jingoo Han Oct. 9, 2012, 8:34 a.m. UTC | #1
On Friday, October 05, 2012 10:27 PM Vivek Gautam wrote
> 
> EXYNOS5_USB_CFG macro should actually point to USB20PHY_CFG
> system register (base addr + 0x230). It's wrongly placed in regs-pmu.
> Actual register at offset 0x230 in PMU is SEQ_TRANSITION4.
> 
> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>

As you mentioned, this definition is wrong.
So, it should be removed.

Reviewed-by: Jingoo Han <jg1.han@samsung.com>


> ---
>  arch/arm/mach-exynos/include/mach/regs-pmu.h |    2 --
>  1 files changed, 0 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/mach-exynos/include/mach/regs-pmu.h b/arch/arm/mach-exynos/include/mach/regs-pmu.h
> index d4e392b..70b2795 100644
> --- a/arch/arm/mach-exynos/include/mach/regs-pmu.h
> +++ b/arch/arm/mach-exynos/include/mach/regs-pmu.h
> @@ -230,8 +230,6 @@
> 
>  /* For EXYNOS5 */
> 
> -#define EXYNOS5_USB_CFG						S5P_PMUREG(0x0230)
> -
>  #define EXYNOS5_AUTO_WDTRESET_DISABLE				S5P_PMUREG(0x0408)
>  #define EXYNOS5_MASK_WDTRESET_REQUEST				S5P_PMUREG(0x040C)
> 
> --
> 1.7.6.5
> 
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Vivek Gautam Oct. 31, 2012, 5:47 a.m. UTC | #2
Hi all,

On Tue, Oct 9, 2012 at 2:04 PM, Jingoo Han <jg1.han@samsung.com> wrote:
> On Friday, October 05, 2012 10:27 PM Vivek Gautam wrote
>>
>> EXYNOS5_USB_CFG macro should actually point to USB20PHY_CFG
>> system register (base addr + 0x230). It's wrongly placed in regs-pmu.
>> Actual register at offset 0x230 in PMU is SEQ_TRANSITION4.
>>
>> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
>
> As you mentioned, this definition is wrong.
> So, it should be removed.
>
> Reviewed-by: Jingoo Han <jg1.han@samsung.com>
>
>
>> ---
>>  arch/arm/mach-exynos/include/mach/regs-pmu.h |    2 --
>>  1 files changed, 0 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/arm/mach-exynos/include/mach/regs-pmu.h b/arch/arm/mach-exynos/include/mach/regs-pmu.h
>> index d4e392b..70b2795 100644
>> --- a/arch/arm/mach-exynos/include/mach/regs-pmu.h
>> +++ b/arch/arm/mach-exynos/include/mach/regs-pmu.h
>> @@ -230,8 +230,6 @@
>>
>>  /* For EXYNOS5 */
>>
>> -#define EXYNOS5_USB_CFG                                              S5P_PMUREG(0x0230)
>> -

Any thoughts about this please.

>>  #define EXYNOS5_AUTO_WDTRESET_DISABLE                                S5P_PMUREG(0x0408)
>>  #define EXYNOS5_MASK_WDTRESET_REQUEST                                S5P_PMUREG(0x040C)
>>
>> --
>> 1.7.6.5
>>
Kim Kukjin Nov. 8, 2012, 4:52 a.m. UTC | #3
Jingoo Han wrote:
> 
> On Friday, October 05, 2012 10:27 PM Vivek Gautam wrote
> >
> > EXYNOS5_USB_CFG macro should actually point to USB20PHY_CFG
> > system register (base addr + 0x230). It's wrongly placed in regs-pmu.
> > Actual register at offset 0x230 in PMU is SEQ_TRANSITION4.
> >
> > Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
> 
> As you mentioned, this definition is wrong.
> So, it should be removed.
> 
> Reviewed-by: Jingoo Han <jg1.han@samsung.com>
> 
Applied, thanks.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
diff mbox

Patch

diff --git a/arch/arm/mach-exynos/include/mach/regs-pmu.h b/arch/arm/mach-exynos/include/mach/regs-pmu.h
index d4e392b..70b2795 100644
--- a/arch/arm/mach-exynos/include/mach/regs-pmu.h
+++ b/arch/arm/mach-exynos/include/mach/regs-pmu.h
@@ -230,8 +230,6 @@ 
 
 /* For EXYNOS5 */
 
-#define EXYNOS5_USB_CFG						S5P_PMUREG(0x0230)
-
 #define EXYNOS5_AUTO_WDTRESET_DISABLE				S5P_PMUREG(0x0408)
 #define EXYNOS5_MASK_WDTRESET_REQUEST				S5P_PMUREG(0x040C)