| Message ID | 1348739790-21253-1-git-send-email-Barry.Song@csr.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Thu, Sep 27, 2012 at 11:56 AM, Barry Song <Barry.Song@csr.com> wrote: > From: Barry Song <Baohua.Song@csr.com> > > The driver supports old up SiRFprimaII SoCs, this patch makes it support > the new SiRFmarco as well. > SiRFmarco, as a SMP SoC, adds new SIRFSOC_GPIO_PAD_EN_CLR registers, to > disable GPIO pad, we should write 1 to the corresponding bit in the new > CLEAR register instead of writing 0 to SIRFSOC_GPIO_PAD_EN. > > Signed-off-by: Barry Song <Baohua.Song@csr.com> This doesn't apply to my tree, you must have some other changes that are not included in the patch set... Can you pls try to generate and test the patch against the pinctrl tree? I might apply it as per the "new driver" rule if I can convince myself that it doesn't destabilize the current driver. Yours, Linus Walleij
Hi linus, thanks very much! 2012/9/28 Linus Walleij <linus.walleij@linaro.org>: > On Thu, Sep 27, 2012 at 11:56 AM, Barry Song <Barry.Song@csr.com> wrote: > >> From: Barry Song <Baohua.Song@csr.com> >> >> The driver supports old up SiRFprimaII SoCs, this patch makes it support >> the new SiRFmarco as well. >> SiRFmarco, as a SMP SoC, adds new SIRFSOC_GPIO_PAD_EN_CLR registers, to >> disable GPIO pad, we should write 1 to the corresponding bit in the new >> CLEAR register instead of writing 0 to SIRFSOC_GPIO_PAD_EN. >> >> Signed-off-by: Barry Song <Baohua.Song@csr.com> > > This doesn't apply to my tree, you must have some other changes that > are not included in the patch set... > > Can you pls try to generate and test the patch against the pinctrl tree? > > I might apply it as per the "new driver" rule if I can convince myself that it > doesn't destabilize the current driver. this one actually depends on: http://git.kernel.org/?p=linux/kernel/git/arm/arm-soc.git;a=commitdiff;h=056876f6c73406c06d530d16d020177f5ec4a0bd which was applied to arm soc tree. the only conflict comes from: static const struct of_device_id pinmux_ids[] __devinitconst = { { .compatible = "sirf,prima2-pinctrl" }, + { .compatible = "sirf,marco-pinctrl" }, {} }; as commit 056876f6c73406c0 renamed the old static const struct of_device_id pinmux_ids[] __devinitconst = { { .compatible = "sirf,prima2-gpio-pinmux" }, {} }; to static const struct of_device_id pinmux_ids[] __devinitconst = { { .compatible = "sirf,sirf,prima2-pinctrl" }, {} }; so i think the best way is we hold on this patch for the moment, and wait for 3.7-rc1. all other 5 are critical fixes and have no merge conflict with arm-soc tree as i have tried. > Yours, > Linus Walleij Thanks barry
2012/9/28 Barry Song <21cnbao@gmail.com>: > Hi linus, > thanks very much! > > 2012/9/28 Linus Walleij <linus.walleij@linaro.org>: >> On Thu, Sep 27, 2012 at 11:56 AM, Barry Song <Barry.Song@csr.com> wrote: >> >>> From: Barry Song <Baohua.Song@csr.com> >>> >>> The driver supports old up SiRFprimaII SoCs, this patch makes it support >>> the new SiRFmarco as well. >>> SiRFmarco, as a SMP SoC, adds new SIRFSOC_GPIO_PAD_EN_CLR registers, to >>> disable GPIO pad, we should write 1 to the corresponding bit in the new >>> CLEAR register instead of writing 0 to SIRFSOC_GPIO_PAD_EN. >>> >>> Signed-off-by: Barry Song <Baohua.Song@csr.com> >> >> This doesn't apply to my tree, you must have some other changes that >> are not included in the patch set... >> >> Can you pls try to generate and test the patch against the pinctrl tree? >> >> I might apply it as per the "new driver" rule if I can convince myself that it >> doesn't destabilize the current driver. > > this one actually depends on: > > http://git.kernel.org/?p=linux/kernel/git/arm/arm-soc.git;a=commitdiff;h=056876f6c73406c06d530d16d020177f5ec4a0bd > which was applied to arm soc tree. > > the only conflict comes from: > static const struct of_device_id pinmux_ids[] __devinitconst = { > { .compatible = "sirf,prima2-pinctrl" }, > + { .compatible = "sirf,marco-pinctrl" }, > {} > }; > > as commit 056876f6c73406c0 renamed the old > static const struct of_device_id pinmux_ids[] __devinitconst = { > { .compatible = "sirf,prima2-gpio-pinmux" }, > {} > }; > to > static const struct of_device_id pinmux_ids[] __devinitconst = { > { .compatible = "sirf,sirf,prima2-pinctrl" }, > {} > }; > > so i think the best way is we hold on this patch for the moment, and > wait for 3.7-rc1. > all other 5 are critical fixes and have no merge conflict with arm-soc > tree as i have tried. Hi Linus, this one can be applied now. would you apply? as i have tried, now it can be applied directly againest 3.7-rc3: barry@barry-VirtualBox:~/development/linux-2.6$ git log commit 5e0ca7b04ab1a5e4ca778045fdc6b97c1bd2ea3f Author: Barry Song <Baohua.Song@csr.com> Date: Thu Sep 27 17:56:30 2012 +0800 pinctrl: sirf: enable the driver support new SiRFmarco SoC The driver supports old up SiRFprimaII SoCs, this patch makes it support the new SiRFmarco as well. SiRFmarco, as a SMP SoC, adds new SIRFSOC_GPIO_PAD_EN_CLR registers, to disable GPIO pad, we should write 1 to the corresponding bit in the new CLEAR register instead of writing 0 to SIRFSOC_GPIO_PAD_EN. Signed-off-by: Barry Song <Baohua.Song@csr.com> commit 8f0d8163b50e01f398b14bcd4dc039ac5ab18d64 Author: Linus Torvalds <torvalds@linux-foundation.org> Date: Sun Oct 28 12:24:48 2012 -0700 Linux 3.7-rc3 commit 5a5210c6adaddbed823162eb76dfdbac72bdb802 Merge: 8e99165 8bc5e4e Author: Linus Torvalds <torvalds@linux-foundation.org> Date: Sun Oct 28 11:14:52 2012 -0700 > >> Yours, >> Linus Walleij -barry
On Thu, Nov 1, 2012 at 4:04 PM, Barry Song <21cnbao@gmail.com> wrote: > Hi Linus, > this one can be applied now. would you apply? as i have tried, now it > can be applied directly againest 3.7-rc3: Yes works like a charm, patch applied! Thanks Barry, Linus Walleij
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index 54e3588..78ed93f 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -111,8 +111,8 @@ config PINCTRL_SINGLE This selects the device tree based generic pinctrl driver. config PINCTRL_SIRF - bool "CSR SiRFprimaII pin controller driver" - depends on ARCH_PRIMA2 + bool "CSR SiRFprimaII/SiRFmarco pin controller driver" + depends on ARCH_SIRF select PINMUX config PINCTRL_TEGRA diff --git a/drivers/pinctrl/pinctrl-sirf.c b/drivers/pinctrl/pinctrl-sirf.c index 675497c..29f611d 100644 --- a/drivers/pinctrl/pinctrl-sirf.c +++ b/drivers/pinctrl/pinctrl-sirf.c @@ -32,10 +32,10 @@ #define SIRFSOC_NUM_PADS 622 #define SIRFSOC_RSC_PIN_MUX 0x4 -#define SIRFSOC_GPIO_PAD_EN(g) ((g)*0x100 + 0x84) +#define SIRFSOC_GPIO_PAD_EN(g) ((g)*0x100 + 0x84) +#define SIRFSOC_GPIO_PAD_EN_CLR(g) ((g)*0x100 + 0x90) #define SIRFSOC_GPIO_CTRL(g, i) ((g)*0x100 + (i)*4) #define SIRFSOC_GPIO_DSP_EN0 (0x80) -#define SIRFSOC_GPIO_PAD_EN(g) ((g)*0x100 + 0x84) #define SIRFSOC_GPIO_INT_STATUS(g) ((g)*0x100 + 0x8C) #define SIRFSOC_GPIO_CTL_INTR_LOW_MASK 0x1 @@ -60,6 +60,7 @@ struct sirfsoc_gpio_bank { int id; int parent_irq; spinlock_t lock; + bool is_marco; /* for marco, some registers are different with prima2 */ }; static struct sirfsoc_gpio_bank sgpio_bank[SIRFSOC_GPIO_NO_OF_BANKS]; @@ -191,6 +192,7 @@ struct sirfsoc_pmx { struct pinctrl_dev *pmx; void __iomem *gpio_virtbase; void __iomem *rsc_virtbase; + bool is_marco; }; /* SIRFSOC_GPIO_PAD_EN set */ @@ -1088,12 +1090,21 @@ static void sirfsoc_pinmux_endisable(struct sirfsoc_pmx *spmx, unsigned selector for (i = 0; i < mux->muxmask_counts; i++) { u32 muxval; - muxval = readl(spmx->gpio_virtbase + SIRFSOC_GPIO_PAD_EN(mask[i].group)); - if (enable) - muxval = muxval & ~mask[i].mask; - else - muxval = muxval | mask[i].mask; - writel(muxval, spmx->gpio_virtbase + SIRFSOC_GPIO_PAD_EN(mask[i].group)); + if (!spmx->is_marco) { + muxval = readl(spmx->gpio_virtbase + SIRFSOC_GPIO_PAD_EN(mask[i].group)); + if (enable) + muxval = muxval & ~mask[i].mask; + else + muxval = muxval | mask[i].mask; + writel(muxval, spmx->gpio_virtbase + SIRFSOC_GPIO_PAD_EN(mask[i].group)); + } else { + if (enable) + writel(mask[i].mask, spmx->gpio_virtbase + + SIRFSOC_GPIO_PAD_EN_CLR(mask[i].group)); + else + writel(mask[i].mask, spmx->gpio_virtbase + + SIRFSOC_GPIO_PAD_EN(mask[i].group)); + } } if (mux->funcmask && enable) { @@ -1158,9 +1169,14 @@ static int sirfsoc_pinmux_request_gpio(struct pinctrl_dev *pmxdev, spmx = pinctrl_dev_get_drvdata(pmxdev); - muxval = readl(spmx->gpio_virtbase + SIRFSOC_GPIO_PAD_EN(group)); - muxval = muxval | (1 << (offset - range->pin_base)); - writel(muxval, spmx->gpio_virtbase + SIRFSOC_GPIO_PAD_EN(group)); + if (!spmx->is_marco) { + muxval = readl(spmx->gpio_virtbase + SIRFSOC_GPIO_PAD_EN(group)); + muxval = muxval | (1 << (offset - range->pin_base)); + writel(muxval, spmx->gpio_virtbase + SIRFSOC_GPIO_PAD_EN(group)); + } else { + writel(1 << (offset - range->pin_base), spmx->gpio_virtbase + + SIRFSOC_GPIO_PAD_EN(group)); + } return 0; } @@ -1218,6 +1234,7 @@ static void __iomem *sirfsoc_rsc_of_iomap(void) { const struct of_device_id rsc_ids[] = { { .compatible = "sirf,prima2-rsc" }, + { .compatible = "sirf,marco-rsc" }, {} }; struct device_node *np; @@ -1259,6 +1276,9 @@ static int __devinit sirfsoc_pinmux_probe(struct platform_device *pdev) goto out_no_rsc_remap; } + if (of_device_is_compatible(np, "sirf,marco-pinctrl")) + spmx->is_marco = 1; + /* Now register the pin controller and all pins it handles */ spmx->pmx = pinctrl_register(&sirfsoc_pinmux_desc, &pdev->dev, spmx); if (!spmx->pmx) { @@ -1287,6 +1307,7 @@ out_no_gpio_remap: static const struct of_device_id pinmux_ids[] __devinitconst = { { .compatible = "sirf,prima2-pinctrl" }, + { .compatible = "sirf,marco-pinctrl" }, {} }; @@ -1683,6 +1704,7 @@ static int __devinit sirfsoc_gpio_probe(struct device_node *np) struct sirfsoc_gpio_bank *bank; void *regs; struct platform_device *pdev; + bool is_marco = false; pdev = of_find_device_by_node(np); if (!pdev) @@ -1692,6 +1714,9 @@ static int __devinit sirfsoc_gpio_probe(struct device_node *np) if (!regs) return -ENOMEM; + if (of_device_is_compatible(np, "sirf,marco-pinctrl")) + is_marco = 1; + for (i = 0; i < SIRFSOC_GPIO_NO_OF_BANKS; i++) { bank = &sgpio_bank[i]; spin_lock_init(&bank->lock); @@ -1708,6 +1733,7 @@ static int __devinit sirfsoc_gpio_probe(struct device_node *np) bank->chip.gc.of_node = np; bank->chip.regs = regs; bank->id = i; + bank->is_marco = is_marco; bank->parent_irq = platform_get_irq(pdev, i); if (bank->parent_irq < 0) { err = bank->parent_irq;