diff mbox

[v3] Enable A20 using KBC for some MSI laptops to fix S3 resume

Message ID 201212112129.13248.linux@rainbow-software.org (mailing list archive)
State Superseded, archived
Headers show

Commit Message

Ondrej Zary Dec. 11, 2012, 8:29 p.m. UTC 
On Tuesday 11 December 2012 20:07:50 H. Peter Anvin wrote:
> On 12/11/2012 10:59 AM, Ondrej Zary wrote:
> > As I said before, the BIOS probably breaks on resume before any Linux
> > code is executed. So any fix must be done before suspending.
>
> Well, that code should be independent of A20, being in low memory, but
> if the BIOS itself crashes, then that's... yeah.
>
> > I hate quirks too. A general solution would be to always enable A20 using
> > KBC (if KBC is present) but that's probably not acceptable.
>
> I don't see why not.  If so we could just do it as part of the
> initialization of the i8042 driver.

Something like this? (It works.)

Comments

H. Peter Anvin Dec. 11, 2012, 8:36 p.m. UTC | #1 
On 12/11/2012 12:29 PM, Ondrej Zary wrote:
> 
> Something like this? (It works.)
> 

Something like that.  We need to make sure we send the proper sequence,
though, or it might break some SMM firmware...

> diff --git a/drivers/input/serio/i8042-x86ia64io.h b/drivers/input/serio/i8042-x86ia64io.h
> index d6cc77a..0807ac7 100644
> --- a/drivers/input/serio/i8042-x86ia64io.h
> +++ b/drivers/input/serio/i8042-x86ia64io.h
> @@ -921,6 +921,7 @@ static int __init i8042_platform_init(void)
>  	int retval;
>  
>  #ifdef CONFIG_X86
> +	u8 a20_on = 0xdf;
>  	/* Just return if pre-detection shows no i8042 controller exist */
>  	if (!x86_platform.i8042_detect())
>  		return -ENODEV;
> @@ -960,6 +961,13 @@ static int __init i8042_platform_init(void)
>  
>  	if (dmi_check_system(i8042_dmi_dritek_table))
>  		i8042_dritek = true;
> +
> +	/*
> +	 * A20 was already enabled during early kernel init. But some buggy
> +	 * BIOSes (in MSI Laptops) require A20 to be enabled using 8042 to
> +	 * resume from S3. So we do it here and hope that nothing breaks.
> +	 */
> +	i8042_command(&a20_on, 0x10d1);
>  #endif /* CONFIG_X86 */
>  
>  	return retval;
> 

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Ondrej Zary Dec. 11, 2012, 8:50 p.m. UTC | #2 
On Tuesday 11 December 2012 21:36:46 H. Peter Anvin wrote:
> On 12/11/2012 12:29 PM, Ondrej Zary wrote:
> > Something like this? (It works.)
>
> Something like that.  We need to make sure we send the proper sequence,
> though, or it might break some SMM firmware...

Could you please create proper patch? You're the x86 expert (and I'm not).

I've read that 0xd1 command with 0xdf data is often used to enable A20. But I 
don't know when this must be done or what else needs to be done for the SMM 
to not break.

> > diff --git a/drivers/input/serio/i8042-x86ia64io.h
> > b/drivers/input/serio/i8042-x86ia64io.h index d6cc77a..0807ac7 100644
> > --- a/drivers/input/serio/i8042-x86ia64io.h
> > +++ b/drivers/input/serio/i8042-x86ia64io.h
> > @@ -921,6 +921,7 @@ static int __init i8042_platform_init(void)
> >  	int retval;
> >
> >  #ifdef CONFIG_X86
> > +	u8 a20_on = 0xdf;
> >  	/* Just return if pre-detection shows no i8042 controller exist */
> >  	if (!x86_platform.i8042_detect())
> >  		return -ENODEV;
> > @@ -960,6 +961,13 @@ static int __init i8042_platform_init(void)
> >
> >  	if (dmi_check_system(i8042_dmi_dritek_table))
> >  		i8042_dritek = true;
> > +
> > +	/*
> > +	 * A20 was already enabled during early kernel init. But some buggy
> > +	 * BIOSes (in MSI Laptops) require A20 to be enabled using 8042 to
> > +	 * resume from S3. So we do it here and hope that nothing breaks.
> > +	 */
> > +	i8042_command(&a20_on, 0x10d1);
> >  #endif /* CONFIG_X86 */
> >
> >  	return retval;
H. Peter Anvin Dec. 11, 2012, 8:56 p.m. UTC | #3 
On 12/11/2012 12:50 PM, Ondrej Zary wrote:
> On Tuesday 11 December 2012 21:36:46 H. Peter Anvin wrote:
>> On 12/11/2012 12:29 PM, Ondrej Zary wrote:
>>> Something like this? (It works.)
>>
>> Something like that.  We need to make sure we send the proper sequence,
>> though, or it might break some SMM firmware...
>
> Could you please create proper patch? You're the x86 expert (and I'm not).
>
> I've read that 0xd1 command with 0xdf data is often used to enable A20. But I
> don't know when this must be done or what else needs to be done for the SMM
> to not break.
>

You need to send an FF dummy command afterwards, that's all.
diff mbox

Patch

diff --git a/drivers/input/serio/i8042-x86ia64io.h b/drivers/input/serio/i8042-x86ia64io.h
index d6cc77a..0807ac7 100644
--- a/drivers/input/serio/i8042-x86ia64io.h
+++ b/drivers/input/serio/i8042-x86ia64io.h
@@ -921,6 +921,7 @@  static int __init i8042_platform_init(void)
 	int retval;
 
 #ifdef CONFIG_X86
+	u8 a20_on = 0xdf;
 	/* Just return if pre-detection shows no i8042 controller exist */
 	if (!x86_platform.i8042_detect())
 		return -ENODEV;
@@ -960,6 +961,13 @@  static int __init i8042_platform_init(void)
 
 	if (dmi_check_system(i8042_dmi_dritek_table))
 		i8042_dritek = true;
+
+	/*
+	 * A20 was already enabled during early kernel init. But some buggy
+	 * BIOSes (in MSI Laptops) require A20 to be enabled using 8042 to
+	 * resume from S3. So we do it here and hope that nothing breaks.
+	 */
+	i8042_command(&a20_on, 0x10d1);
 #endif /* CONFIG_X86 */
 
 	return retval;