Message ID | 1355348588-22318-3-git-send-email-jon-hunter@ti.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Wed, Dec 12, 2012 at 09:43:05PM +0000, Jon Hunter wrote: > Adds a device-tree binding for the ARM Cross Trigger Interface (CTI). > The ARM Cross Trigger Interface provides a way to route events between > processor modules. For example, on OMAP4430 we use the CTI module to > route PMU events to the GIC interrupt module. > > Signed-off-by: Jon Hunter <jon-hunter@ti.com> > --- > Documentation/devicetree/bindings/arm/cti.txt | 32 +++++++++++++++++++++++++ > 1 file changed, 32 insertions(+) > create mode 100644 Documentation/devicetree/bindings/arm/cti.txt > > diff --git a/Documentation/devicetree/bindings/arm/cti.txt b/Documentation/devicetree/bindings/arm/cti.txt > new file mode 100644 > index 0000000..4a0e2d3 > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/cti.txt > @@ -0,0 +1,32 @@ > +* ARM Cross Trigger Interface (CTI) > + > +The ARM Cross Trigger Interface provides a way to route events between > +processor modules. For example, debug events from one processor can be > +broadcasted to other processors. The events that can be routed between > +processors are specific to the device. > + > +Required properties: > + > +- compatible: Should be "arm,primecell". > +- interrupts: Interrupt associated with CTI module. > +- reg: Contains timer register address range (base > + address and length). > +- arm,cti-name: A unique name for the CTI module, that will be > + used when requesting the CTI module instance. > + > + > +Optional properties: > + > +- arm-primecell-periphid: Primecell peripheral ID associated with CTI > + module. For multi-cluster systems, I wouldn't be surprised to see multiple CTI instances, each with different CPU affinities. Can we include an affinity property following Mark's proposed binding? http://lists.infradead.org/pipermail/linux-arm-kernel/2012-December/137290.html Will
On 12/13/2012 11:41 AM, Will Deacon wrote: > On Wed, Dec 12, 2012 at 09:43:05PM +0000, Jon Hunter wrote: >> Adds a device-tree binding for the ARM Cross Trigger Interface (CTI). >> The ARM Cross Trigger Interface provides a way to route events between >> processor modules. For example, on OMAP4430 we use the CTI module to >> route PMU events to the GIC interrupt module. >> >> Signed-off-by: Jon Hunter <jon-hunter@ti.com> >> --- >> Documentation/devicetree/bindings/arm/cti.txt | 32 +++++++++++++++++++++++++ >> 1 file changed, 32 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/arm/cti.txt >> >> diff --git a/Documentation/devicetree/bindings/arm/cti.txt b/Documentation/devicetree/bindings/arm/cti.txt >> new file mode 100644 >> index 0000000..4a0e2d3 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/arm/cti.txt >> @@ -0,0 +1,32 @@ >> +* ARM Cross Trigger Interface (CTI) >> + >> +The ARM Cross Trigger Interface provides a way to route events between >> +processor modules. For example, debug events from one processor can be >> +broadcasted to other processors. The events that can be routed between >> +processors are specific to the device. >> + >> +Required properties: >> + >> +- compatible: Should be "arm,primecell". >> +- interrupts: Interrupt associated with CTI module. >> +- reg: Contains timer register address range (base >> + address and length). >> +- arm,cti-name: A unique name for the CTI module, that will be >> + used when requesting the CTI module instance. >> + >> + >> +Optional properties: >> + >> +- arm-primecell-periphid: Primecell peripheral ID associated with CTI >> + module. > > For multi-cluster systems, I wouldn't be surprised to see multiple CTI > instances, each with different CPU affinities. Can we include an affinity > property following Mark's proposed binding? > > http://lists.infradead.org/pipermail/linux-arm-kernel/2012-December/137290.html Yes I can take a look. Would something like that be applicable to pmu as well or is that unlikely to have different affinities? I am just wondering if there is something that we should implement in general for the various primecell components. Cheers Jon
On 12/12/2012 05:23 PM, Jon Hunter wrote: > > On 12/12/2012 04:12 PM, Rob Herring wrote: >> On 12/12/2012 03:43 PM, Jon Hunter wrote: >>> Adds a device-tree binding for the ARM Cross Trigger Interface (CTI). >>> The ARM Cross Trigger Interface provides a way to route events between >>> processor modules. For example, on OMAP4430 we use the CTI module to >>> route PMU events to the GIC interrupt module. >> >> Do you need to describe the PMU-CTI-GIC connection in DT? > > We definitely could. This is achieved by mapping a trigger-input to a > trigger-output. So we could list the trigger outputs and inputs in the > binding. For omap4430 we would have ... > > arm,cti-trigin = <0 1 2 3 4 5 6>; I'd prefer to just spell it out: arm,cti-trigger-in > arm,cti-trigin-names = "dbgack", "pmuirq", "ptmextout0", > "ptmextout1", "commtx", "commrx", > "ptmtrigger"; > arm,cti-trigout = <0 1 2 3 4 6 7>; > arm,cti-trigout-names = "edbgreq", "ptmextin0", "ptmextin1", > "ptmextin2", "ptmextin3","mpuirq", > "dbgrestart"; > > So to map the PMU to GIC, we would map the "pmuirq" trigger input to the > "mpuirq" trigger output. Then we could setup the mapping by name instead > of index. I'm not crazy about the name strings and would prefer something with phandles. The above binding doesn't really describe the connection of the CTI to the GIC. The GIC node would need to define some inputs and then you show the connection to the CTI outputs. This may be similar to an interrupt nexus node. Rob
On Thu, Dec 13, 2012 at 07:21:30PM +0000, Jon Hunter wrote: > > On 12/13/2012 11:41 AM, Will Deacon wrote: > > On Wed, Dec 12, 2012 at 09:43:05PM +0000, Jon Hunter wrote: > >> Adds a device-tree binding for the ARM Cross Trigger Interface (CTI). > >> The ARM Cross Trigger Interface provides a way to route events between > >> processor modules. For example, on OMAP4430 we use the CTI module to > >> route PMU events to the GIC interrupt module. > >> > >> Signed-off-by: Jon Hunter <jon-hunter@ti.com> > >> --- > >> Documentation/devicetree/bindings/arm/cti.txt | 32 +++++++++++++++++++++++++ > >> 1 file changed, 32 insertions(+) > >> create mode 100644 Documentation/devicetree/bindings/arm/cti.txt > >> > >> diff --git a/Documentation/devicetree/bindings/arm/cti.txt b/Documentation/devicetree/bindings/arm/cti.txt > >> new file mode 100644 > >> index 0000000..4a0e2d3 > >> --- /dev/null > >> +++ b/Documentation/devicetree/bindings/arm/cti.txt > >> @@ -0,0 +1,32 @@ > >> +* ARM Cross Trigger Interface (CTI) > >> + > >> +The ARM Cross Trigger Interface provides a way to route events between > >> +processor modules. For example, debug events from one processor can be > >> +broadcasted to other processors. The events that can be routed between > >> +processors are specific to the device. > >> + > >> +Required properties: > >> + > >> +- compatible: Should be "arm,primecell". > >> +- interrupts: Interrupt associated with CTI module. > >> +- reg: Contains timer register address range (base > >> + address and length). > >> +- arm,cti-name: A unique name for the CTI module, that will be > >> + used when requesting the CTI module instance. > >> + > >> + > >> +Optional properties: > >> + > >> +- arm-primecell-periphid: Primecell peripheral ID associated with CTI > >> + module. > > > > For multi-cluster systems, I wouldn't be surprised to see multiple CTI > > instances, each with different CPU affinities. Can we include an affinity > > property following Mark's proposed binding? > > > > http://lists.infradead.org/pipermail/linux-arm-kernel/2012-December/137290.html > > Yes I can take a look. Would something like that be applicable to pmu as > well or is that unlikely to have different affinities? I am just > wondering if there is something that we should implement in general for > the various primecell components. Do you mean for describing the PMU's affinity to the perf subsystem or its wiring to the CTI? It's certainly applicable for the former; I've been working on a series to enable support for the PMUs in both clusters in a A15x2 A7x3 coretile using the binding, and I intend to post a series shortly. I'm not sure about the latter, as I don't have much of an understanding about the CTI. I'm not sure how many other components have affinity concerns, but the intention is for the binding to be reusable. > > Cheers > Jon > Thanks, Mark.
On 12/17/2012 10:20 AM, Mark Rutland wrote: > On Thu, Dec 13, 2012 at 07:21:30PM +0000, Jon Hunter wrote: >> >> On 12/13/2012 11:41 AM, Will Deacon wrote: >>> On Wed, Dec 12, 2012 at 09:43:05PM +0000, Jon Hunter wrote: >>>> Adds a device-tree binding for the ARM Cross Trigger Interface (CTI). >>>> The ARM Cross Trigger Interface provides a way to route events between >>>> processor modules. For example, on OMAP4430 we use the CTI module to >>>> route PMU events to the GIC interrupt module. >>>> >>>> Signed-off-by: Jon Hunter <jon-hunter@ti.com> >>>> --- >>>> Documentation/devicetree/bindings/arm/cti.txt | 32 +++++++++++++++++++++++++ >>>> 1 file changed, 32 insertions(+) >>>> create mode 100644 Documentation/devicetree/bindings/arm/cti.txt >>>> >>>> diff --git a/Documentation/devicetree/bindings/arm/cti.txt b/Documentation/devicetree/bindings/arm/cti.txt >>>> new file mode 100644 >>>> index 0000000..4a0e2d3 >>>> --- /dev/null >>>> +++ b/Documentation/devicetree/bindings/arm/cti.txt >>>> @@ -0,0 +1,32 @@ >>>> +* ARM Cross Trigger Interface (CTI) >>>> + >>>> +The ARM Cross Trigger Interface provides a way to route events between >>>> +processor modules. For example, debug events from one processor can be >>>> +broadcasted to other processors. The events that can be routed between >>>> +processors are specific to the device. >>>> + >>>> +Required properties: >>>> + >>>> +- compatible: Should be "arm,primecell". >>>> +- interrupts: Interrupt associated with CTI module. >>>> +- reg: Contains timer register address range (base >>>> + address and length). >>>> +- arm,cti-name: A unique name for the CTI module, that will be >>>> + used when requesting the CTI module instance. >>>> + >>>> + >>>> +Optional properties: >>>> + >>>> +- arm-primecell-periphid: Primecell peripheral ID associated with CTI >>>> + module. >>> >>> For multi-cluster systems, I wouldn't be surprised to see multiple CTI >>> instances, each with different CPU affinities. Can we include an affinity >>> property following Mark's proposed binding? >>> >>> http://lists.infradead.org/pipermail/linux-arm-kernel/2012-December/137290.html >> >> Yes I can take a look. Would something like that be applicable to pmu as >> well or is that unlikely to have different affinities? I am just >> wondering if there is something that we should implement in general for >> the various primecell components. > > Do you mean for describing the PMU's affinity to the perf subsystem or its > wiring to the CTI? Yes the PMU's affinity in general, ignoring CTI for now. > It's certainly applicable for the former; I've been working on a series to > enable support for the PMUs in both clusters in a A15x2 A7x3 coretile using the > binding, and I intend to post a series shortly. I'm not sure about the latter, > as I don't have much of an understanding about the CTI. Ok great. I think that this use-case of PMU+CTI is a special case for OMAP. CTI could be used for many things and for some reason TI hooked up the PMU interrupt via the CTI on OMAP4430 (which has been giving me grief ;-) So if there is a general way to describe the affinity of a module, such as PMU, I could re-use this and add to the CTI binding as Will suggested. > I'm not sure how many other components have affinity concerns, but the > intention is for the binding to be reusable. Great. Thanks Jon
diff --git a/Documentation/devicetree/bindings/arm/cti.txt b/Documentation/devicetree/bindings/arm/cti.txt new file mode 100644 index 0000000..4a0e2d3 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/cti.txt @@ -0,0 +1,32 @@ +* ARM Cross Trigger Interface (CTI) + +The ARM Cross Trigger Interface provides a way to route events between +processor modules. For example, debug events from one processor can be +broadcasted to other processors. The events that can be routed between +processors are specific to the device. + +Required properties: + +- compatible: Should be "arm,primecell". +- interrupts: Interrupt associated with CTI module. +- reg: Contains timer register address range (base + address and length). +- arm,cti-name: A unique name for the CTI module, that will be + used when requesting the CTI module instance. + + +Optional properties: + +- arm-primecell-periphid: Primecell peripheral ID associated with CTI + module. + + +Example: + +cti0: cti@0x54148000 { + compatible = "arm,primecell"; + interrupts = <0 1 0x4>; + reg = <0x54148000 0x1000>; + arm,cti-name = "cti0"; + arm,primecell-periphid = <0x003bb906>; +};
Adds a device-tree binding for the ARM Cross Trigger Interface (CTI). The ARM Cross Trigger Interface provides a way to route events between processor modules. For example, on OMAP4430 we use the CTI module to route PMU events to the GIC interrupt module. Signed-off-by: Jon Hunter <jon-hunter@ti.com> --- Documentation/devicetree/bindings/arm/cti.txt | 32 +++++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/cti.txt