| Message ID | 1358455524-5331-7-git-send-email-ben@bwidawsk.net (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Thu, Jan 17, 2013 at 12:45:17PM -0800, Ben Widawsky wrote: > Mappable_end, ie. size is almost always what you want as opposed to the > number of entries. Since we already have that information, we can scrap > the number of entries and only calculate it when needed. > > If gtt_start is !0, this will have slightly different behavior. This > difference can only occur in DRI1, and exists when we try to kick out > the firmware fb. The new code seems like a bugfix to me. > > The other case where we've changed the behavior is during init we check > the mappable region against our current known upper and lower limits > (64MB, and 512MB). This now matches the comment, and makes things more > convenient after removing gtt_mappable_entries. > > Also worth noting is the setting of mappable_end is taken out of setup > because we do it earlier now in the DRI2 case and therefore need to add > that tiny hunk to support the DRI1 IOCTL. > > v2: Move up mappable end to before legacy AGP init > > v3: Add the dev_priv inclusion here from previous rebase error in patch > 5 > > Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> (v2) > Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Merged up to here to dinq, thanks for the patches. I haven't completed testing on older platforms yet, so still a chance I'll have to drop a few ... Hence I'll wait a bit with rebasing the internal trees until this settles. -Daniel > --- > drivers/gpu/drm/i915/i915_dma.c | 8 ++++---- > drivers/gpu/drm/i915/i915_gem.c | 2 ++ > drivers/gpu/drm/i915/i915_gem_gtt.c | 15 +++++++-------- > drivers/gpu/drm/i915/intel_fb.c | 3 +-- > 4 files changed, 14 insertions(+), 14 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c > index 468d2a0..3f70178 100644 > --- a/drivers/gpu/drm/i915/i915_dma.c > +++ b/drivers/gpu/drm/i915/i915_dma.c > @@ -1427,8 +1427,8 @@ static void i915_kick_out_firmware_fb(struct drm_i915_private *dev_priv) > return; > > ap->ranges[0].base = dev_priv->gtt.mappable_base; > - ap->ranges[0].size = > - dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT; > + ap->ranges[0].size = dev_priv->gtt.mappable_end - dev_priv->gtt.start; > + > primary = > pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; > > @@ -1542,7 +1542,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) > goto put_gmch; > } > > - aperture_size = dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT; > + aperture_size = dev_priv->gtt.mappable_end; > > dev_priv->gtt.mappable = > io_mapping_create_wc(dev_priv->gtt.mappable_base, > @@ -1699,7 +1699,7 @@ int i915_driver_unload(struct drm_device *dev) > if (dev_priv->mm.gtt_mtrr >= 0) { > mtrr_del(dev_priv->mm.gtt_mtrr, > dev_priv->gtt.mappable_base, > - dev_priv->mm.gtt->gtt_mappable_entries * PAGE_SIZE); > + dev_priv->gtt.mappable_end); > dev_priv->mm.gtt_mtrr = -1; > } > > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c > index 8f74f3e..9265c0c 100644 > --- a/drivers/gpu/drm/i915/i915_gem.c > +++ b/drivers/gpu/drm/i915/i915_gem.c > @@ -149,6 +149,7 @@ int > i915_gem_init_ioctl(struct drm_device *dev, void *data, > struct drm_file *file) > { > + struct drm_i915_private *dev_priv = dev->dev_private; > struct drm_i915_gem_init *args = data; > > if (drm_core_check_feature(dev, DRIVER_MODESET)) > @@ -165,6 +166,7 @@ i915_gem_init_ioctl(struct drm_device *dev, void *data, > mutex_lock(&dev->struct_mutex); > i915_gem_setup_global_gtt(dev, args->gtt_start, args->gtt_end, > args->gtt_end); > + dev_priv->gtt.mappable_end = args->gtt_end; > mutex_unlock(&dev->struct_mutex); > > return 0; > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c > index 0b89305..0f0db02 100644 > --- a/drivers/gpu/drm/i915/i915_gem_gtt.c > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c > @@ -557,7 +557,6 @@ void i915_gem_setup_global_gtt(struct drm_device *dev, > } > > dev_priv->gtt.start = start; > - dev_priv->gtt.mappable_end = mappable_end; > dev_priv->gtt.total = end - start; > > /* Clear any non-preallocated blocks */ > @@ -596,7 +595,7 @@ void i915_gem_init_global_gtt(struct drm_device *dev) > int ret; > > gtt_size = dev_priv->mm.gtt->gtt_total_entries << PAGE_SHIFT; > - mappable_size = dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT; > + mappable_size = dev_priv->gtt.mappable_end; > > if (intel_enable_ppgtt(dev) && HAS_ALIASING_PPGTT(dev)) { > /* PPGTT pdes are stolen from global gtt ptes, so shrink the > @@ -692,6 +691,7 @@ int i915_gem_gtt_init(struct drm_device *dev) > int ret; > > dev_priv->gtt.mappable_base = pci_resource_start(dev->pdev, 2); > + dev_priv->gtt.mappable_end = pci_resource_len(dev->pdev, 2); > > /* On modern platforms we need not worry ourself with the legacy > * hostbridge query stuff. Skip it entirely > @@ -735,14 +735,13 @@ int i915_gem_gtt_init(struct drm_device *dev) > else > dev_priv->mm.gtt->stolen_size = gen7_get_stolen_size(snb_gmch_ctl); > > - dev_priv->mm.gtt->gtt_mappable_entries = pci_resource_len(dev->pdev, 2) >> PAGE_SHIFT; > /* 64/512MB is the current min/max we actually know of, but this is just a > * coarse sanity check. > */ > - if ((dev_priv->mm.gtt->gtt_mappable_entries >> 8) < 64 || > - dev_priv->mm.gtt->gtt_mappable_entries > dev_priv->mm.gtt->gtt_total_entries) { > - DRM_ERROR("Unknown GMADR entries (%d)\n", > - dev_priv->mm.gtt->gtt_mappable_entries); > + if ((dev_priv->gtt.mappable_end < (64<<20) || > + (dev_priv->gtt.mappable_end > (512<<20)))) { > + DRM_ERROR("Unknown GMADR size (%lx)\n", > + dev_priv->gtt.mappable_end); > ret = -ENXIO; > goto err_out; > } > @@ -764,7 +763,7 @@ int i915_gem_gtt_init(struct drm_device *dev) > > /* GMADR is the PCI aperture used by SW to access tiled GFX surfaces in a linear fashion. */ > DRM_INFO("Memory usable by graphics device = %dM\n", dev_priv->mm.gtt->gtt_total_entries >> 8); > - DRM_DEBUG_DRIVER("GMADR size = %dM\n", dev_priv->mm.gtt->gtt_mappable_entries >> 8); > + DRM_DEBUG_DRIVER("GMADR size = %ldM\n", dev_priv->gtt.mappable_end >> 20); > DRM_DEBUG_DRIVER("GTT stolen size = %dM\n", dev_priv->mm.gtt->stolen_size >> 20); > > return 0; > diff --git a/drivers/gpu/drm/i915/intel_fb.c b/drivers/gpu/drm/i915/intel_fb.c > index ce02af8..ce5f544 100644 > --- a/drivers/gpu/drm/i915/intel_fb.c > +++ b/drivers/gpu/drm/i915/intel_fb.c > @@ -135,8 +135,7 @@ static int intelfb_create(struct intel_fbdev *ifbdev, > goto out_unpin; > } > info->apertures->ranges[0].base = dev->mode_config.fb_base; > - info->apertures->ranges[0].size = > - dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT; > + info->apertures->ranges[0].size = dev_priv->gtt.mappable_end; > > info->fix.smem_start = dev->mode_config.fb_base + obj->gtt_offset; > info->fix.smem_len = size; > -- > 1.8.1.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index 468d2a0..3f70178 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c @@ -1427,8 +1427,8 @@ static void i915_kick_out_firmware_fb(struct drm_i915_private *dev_priv) return; ap->ranges[0].base = dev_priv->gtt.mappable_base; - ap->ranges[0].size = - dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT; + ap->ranges[0].size = dev_priv->gtt.mappable_end - dev_priv->gtt.start; + primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; @@ -1542,7 +1542,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) goto put_gmch; } - aperture_size = dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT; + aperture_size = dev_priv->gtt.mappable_end; dev_priv->gtt.mappable = io_mapping_create_wc(dev_priv->gtt.mappable_base, @@ -1699,7 +1699,7 @@ int i915_driver_unload(struct drm_device *dev) if (dev_priv->mm.gtt_mtrr >= 0) { mtrr_del(dev_priv->mm.gtt_mtrr, dev_priv->gtt.mappable_base, - dev_priv->mm.gtt->gtt_mappable_entries * PAGE_SIZE); + dev_priv->gtt.mappable_end); dev_priv->mm.gtt_mtrr = -1; } diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 8f74f3e..9265c0c 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -149,6 +149,7 @@ int i915_gem_init_ioctl(struct drm_device *dev, void *data, struct drm_file *file) { + struct drm_i915_private *dev_priv = dev->dev_private; struct drm_i915_gem_init *args = data; if (drm_core_check_feature(dev, DRIVER_MODESET)) @@ -165,6 +166,7 @@ i915_gem_init_ioctl(struct drm_device *dev, void *data, mutex_lock(&dev->struct_mutex); i915_gem_setup_global_gtt(dev, args->gtt_start, args->gtt_end, args->gtt_end); + dev_priv->gtt.mappable_end = args->gtt_end; mutex_unlock(&dev->struct_mutex); return 0; diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index 0b89305..0f0db02 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -557,7 +557,6 @@ void i915_gem_setup_global_gtt(struct drm_device *dev, } dev_priv->gtt.start = start; - dev_priv->gtt.mappable_end = mappable_end; dev_priv->gtt.total = end - start; /* Clear any non-preallocated blocks */ @@ -596,7 +595,7 @@ void i915_gem_init_global_gtt(struct drm_device *dev) int ret; gtt_size = dev_priv->mm.gtt->gtt_total_entries << PAGE_SHIFT; - mappable_size = dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT; + mappable_size = dev_priv->gtt.mappable_end; if (intel_enable_ppgtt(dev) && HAS_ALIASING_PPGTT(dev)) { /* PPGTT pdes are stolen from global gtt ptes, so shrink the @@ -692,6 +691,7 @@ int i915_gem_gtt_init(struct drm_device *dev) int ret; dev_priv->gtt.mappable_base = pci_resource_start(dev->pdev, 2); + dev_priv->gtt.mappable_end = pci_resource_len(dev->pdev, 2); /* On modern platforms we need not worry ourself with the legacy * hostbridge query stuff. Skip it entirely @@ -735,14 +735,13 @@ int i915_gem_gtt_init(struct drm_device *dev) else dev_priv->mm.gtt->stolen_size = gen7_get_stolen_size(snb_gmch_ctl); - dev_priv->mm.gtt->gtt_mappable_entries = pci_resource_len(dev->pdev, 2) >> PAGE_SHIFT; /* 64/512MB is the current min/max we actually know of, but this is just a * coarse sanity check. */ - if ((dev_priv->mm.gtt->gtt_mappable_entries >> 8) < 64 || - dev_priv->mm.gtt->gtt_mappable_entries > dev_priv->mm.gtt->gtt_total_entries) { - DRM_ERROR("Unknown GMADR entries (%d)\n", - dev_priv->mm.gtt->gtt_mappable_entries); + if ((dev_priv->gtt.mappable_end < (64<<20) || + (dev_priv->gtt.mappable_end > (512<<20)))) { + DRM_ERROR("Unknown GMADR size (%lx)\n", + dev_priv->gtt.mappable_end); ret = -ENXIO; goto err_out; } @@ -764,7 +763,7 @@ int i915_gem_gtt_init(struct drm_device *dev) /* GMADR is the PCI aperture used by SW to access tiled GFX surfaces in a linear fashion. */ DRM_INFO("Memory usable by graphics device = %dM\n", dev_priv->mm.gtt->gtt_total_entries >> 8); - DRM_DEBUG_DRIVER("GMADR size = %dM\n", dev_priv->mm.gtt->gtt_mappable_entries >> 8); + DRM_DEBUG_DRIVER("GMADR size = %ldM\n", dev_priv->gtt.mappable_end >> 20); DRM_DEBUG_DRIVER("GTT stolen size = %dM\n", dev_priv->mm.gtt->stolen_size >> 20); return 0; diff --git a/drivers/gpu/drm/i915/intel_fb.c b/drivers/gpu/drm/i915/intel_fb.c index ce02af8..ce5f544 100644 --- a/drivers/gpu/drm/i915/intel_fb.c +++ b/drivers/gpu/drm/i915/intel_fb.c @@ -135,8 +135,7 @@ static int intelfb_create(struct intel_fbdev *ifbdev, goto out_unpin; } info->apertures->ranges[0].base = dev->mode_config.fb_base; - info->apertures->ranges[0].size = - dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT; + info->apertures->ranges[0].size = dev_priv->gtt.mappable_end; info->fix.smem_start = dev->mode_config.fb_base + obj->gtt_offset; info->fix.smem_len = size;