diff mbox

[3/4] drm/i915: dont save/restore VGA state for kms

Message ID 1359132802-1247-4-git-send-email-daniel.vetter@ffwll.ch (mailing list archive)
State New, archived
Headers show

Commit Message

Daniel Vetter Jan. 25, 2013, 4:53 p.m. UTC
The only thing we really care about that it is off. To do so, reuse
the recently created i915_redisable_vga function, which is already
used to put obnoxious firmware into check on lid reopening.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/gpu/drm/i915/i915_drv.h      |  1 +
 drivers/gpu/drm/i915/i915_suspend.c  | 48 +++++++++++++++++++-----------------
 drivers/gpu/drm/i915/intel_display.c |  2 +-
 3 files changed, 28 insertions(+), 23 deletions(-)

Comments

Ville Syrjälä Jan. 25, 2013, 7:09 p.m. UTC | #1
On Fri, Jan 25, 2013 at 05:53:21PM +0100, Daniel Vetter wrote:
> The only thing we really care about that it is off. To do so, reuse
> the recently created i915_redisable_vga function, which is already
> used to put obnoxious firmware into check on lid reopening.
> 
> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> ---
>  drivers/gpu/drm/i915/i915_drv.h      |  1 +
>  drivers/gpu/drm/i915/i915_suspend.c  | 48 +++++++++++++++++++-----------------
>  drivers/gpu/drm/i915/intel_display.c |  2 +-
>  3 files changed, 28 insertions(+), 23 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 953060c..0ce7c8a 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1788,6 +1788,7 @@ extern void intel_modeset_cleanup(struct drm_device *dev);
>  extern int intel_modeset_vga_set_state(struct drm_device *dev, bool state);
>  extern void intel_modeset_setup_hw_state(struct drm_device *dev,
>  					 bool force_restore);
> +extern void i915_redisable_vga(struct drm_device *dev);
>  extern bool intel_fbc_enabled(struct drm_device *dev);
>  extern void intel_disable_fbc(struct drm_device *dev);
>  extern bool ironlake_set_drps(struct drm_device *dev, u8 val);
> diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
> index 056bd12..edcbfaf 100644
> --- a/drivers/gpu/drm/i915/i915_suspend.c
> +++ b/drivers/gpu/drm/i915/i915_suspend.c
> @@ -69,6 +69,15 @@ static void i915_save_vga(struct drm_device *dev)
>  	int i;
>  	u16 cr_index, cr_data, st01;
>  
> +	/* VGA state */
> +	dev_priv->regfile.saveVGA0 = I915_READ(VGA0);
> +	dev_priv->regfile.saveVGA1 = I915_READ(VGA1);
> +	dev_priv->regfile.saveVGA_PD = I915_READ(VGA_PD);

BTW these three don't seem to exist on PCH platforms at all. I guess
gen <= 4 would be the most appropriate check since VLV doesn't have
them either, but in this code it doesn't matter much if the check is
for non-PCH instead. I'll include a patch for this in my 
IS_DISPLAYREG() series.
Daniel Vetter Jan. 25, 2013, 7:25 p.m. UTC | #2
On Fri, Jan 25, 2013 at 09:09:58PM +0200, Ville Syrjälä wrote:
> On Fri, Jan 25, 2013 at 05:53:21PM +0100, Daniel Vetter wrote:
> > The only thing we really care about that it is off. To do so, reuse
> > the recently created i915_redisable_vga function, which is already
> > used to put obnoxious firmware into check on lid reopening.
> > 
> > Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> > ---
> >  drivers/gpu/drm/i915/i915_drv.h      |  1 +
> >  drivers/gpu/drm/i915/i915_suspend.c  | 48 +++++++++++++++++++-----------------
> >  drivers/gpu/drm/i915/intel_display.c |  2 +-
> >  3 files changed, 28 insertions(+), 23 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > index 953060c..0ce7c8a 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -1788,6 +1788,7 @@ extern void intel_modeset_cleanup(struct drm_device *dev);
> >  extern int intel_modeset_vga_set_state(struct drm_device *dev, bool state);
> >  extern void intel_modeset_setup_hw_state(struct drm_device *dev,
> >  					 bool force_restore);
> > +extern void i915_redisable_vga(struct drm_device *dev);
> >  extern bool intel_fbc_enabled(struct drm_device *dev);
> >  extern void intel_disable_fbc(struct drm_device *dev);
> >  extern bool ironlake_set_drps(struct drm_device *dev, u8 val);
> > diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
> > index 056bd12..edcbfaf 100644
> > --- a/drivers/gpu/drm/i915/i915_suspend.c
> > +++ b/drivers/gpu/drm/i915/i915_suspend.c
> > @@ -69,6 +69,15 @@ static void i915_save_vga(struct drm_device *dev)
> >  	int i;
> >  	u16 cr_index, cr_data, st01;
> >  
> > +	/* VGA state */
> > +	dev_priv->regfile.saveVGA0 = I915_READ(VGA0);
> > +	dev_priv->regfile.saveVGA1 = I915_READ(VGA1);
> > +	dev_priv->regfile.saveVGA_PD = I915_READ(VGA_PD);
> 
> BTW these three don't seem to exist on PCH platforms at all. I guess
> gen <= 4 would be the most appropriate check since VLV doesn't have
> them either, but in this code it doesn't matter much if the check is
> for non-PCH instead. I'll include a patch for this in my 
> IS_DISPLAYREG() series.

We refuse to load the driver if modesetting isn't enabled and we're on
gen6+. And ums on ilk was only ever supported by rhel. So Imo we can just
punt on this as not a problem, now that the legacy vga state is only
saved/restored in ums mode.
-Daniel
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 953060c..0ce7c8a 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1788,6 +1788,7 @@  extern void intel_modeset_cleanup(struct drm_device *dev);
 extern int intel_modeset_vga_set_state(struct drm_device *dev, bool state);
 extern void intel_modeset_setup_hw_state(struct drm_device *dev,
 					 bool force_restore);
+extern void i915_redisable_vga(struct drm_device *dev);
 extern bool intel_fbc_enabled(struct drm_device *dev);
 extern void intel_disable_fbc(struct drm_device *dev);
 extern bool ironlake_set_drps(struct drm_device *dev, u8 val);
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index 056bd12..edcbfaf 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -69,6 +69,15 @@  static void i915_save_vga(struct drm_device *dev)
 	int i;
 	u16 cr_index, cr_data, st01;
 
+	/* VGA state */
+	dev_priv->regfile.saveVGA0 = I915_READ(VGA0);
+	dev_priv->regfile.saveVGA1 = I915_READ(VGA1);
+	dev_priv->regfile.saveVGA_PD = I915_READ(VGA_PD);
+	if (HAS_PCH_SPLIT(dev))
+		dev_priv->regfile.saveVGACNTRL = I915_READ(CPU_VGACNTRL);
+	else
+		dev_priv->regfile.saveVGACNTRL = I915_READ(VGACNTRL);
+
 	/* VGA color palette registers */
 	dev_priv->regfile.saveDACMASK = I915_READ8(VGA_DACMASK);
 
@@ -127,6 +136,18 @@  static void i915_restore_vga(struct drm_device *dev)
 	int i;
 	u16 cr_index, cr_data, st01;
 
+	/* VGA state */
+	if (HAS_PCH_SPLIT(dev))
+		I915_WRITE(CPU_VGACNTRL, dev_priv->regfile.saveVGACNTRL);
+	else
+		I915_WRITE(VGACNTRL, dev_priv->regfile.saveVGACNTRL);
+
+	I915_WRITE(VGA0, dev_priv->regfile.saveVGA0);
+	I915_WRITE(VGA1, dev_priv->regfile.saveVGA1);
+	I915_WRITE(VGA_PD, dev_priv->regfile.saveVGA_PD);
+	POSTING_READ(VGA_PD);
+	udelay(150);
+
 	/* MSR bits */
 	I915_WRITE8(VGA_MSR_WRITE, dev_priv->regfile.saveMSR);
 	if (dev_priv->regfile.saveMSR & VGA_MSR_CGA_MODE) {
@@ -250,16 +271,8 @@  static void i915_save_display(struct drm_device *dev)
 		}
 	}
 
-	/* VGA state */
-	dev_priv->regfile.saveVGA0 = I915_READ(VGA0);
-	dev_priv->regfile.saveVGA1 = I915_READ(VGA1);
-	dev_priv->regfile.saveVGA_PD = I915_READ(VGA_PD);
-	if (HAS_PCH_SPLIT(dev))
-		dev_priv->regfile.saveVGACNTRL = I915_READ(CPU_VGACNTRL);
-	else
-		dev_priv->regfile.saveVGACNTRL = I915_READ(VGACNTRL);
-
-	i915_save_vga(dev);
+	if (!drm_core_check_feature(dev, DRIVER_MODESET))
+		i915_save_vga(dev);
 }
 
 static void i915_restore_display(struct drm_device *dev)
@@ -332,19 +345,10 @@  static void i915_restore_display(struct drm_device *dev)
 			I915_WRITE(FBC_CONTROL, dev_priv->regfile.saveFBC_CONTROL);
 		}
 	}
-	/* VGA state */
-	if (HAS_PCH_SPLIT(dev))
-		I915_WRITE(CPU_VGACNTRL, dev_priv->regfile.saveVGACNTRL);
+	if (!drm_core_check_feature(dev, DRIVER_MODESET))
+		i915_restore_vga(dev);
 	else
-		I915_WRITE(VGACNTRL, dev_priv->regfile.saveVGACNTRL);
-
-	I915_WRITE(VGA0, dev_priv->regfile.saveVGA0);
-	I915_WRITE(VGA1, dev_priv->regfile.saveVGA1);
-	I915_WRITE(VGA_PD, dev_priv->regfile.saveVGA_PD);
-	POSTING_READ(VGA_PD);
-	udelay(150);
-
-	i915_restore_vga(dev);
+		i915_redisable_vga(dev);
 }
 
 int i915_save_state(struct drm_device *dev)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 886124a..e1b5977 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -8911,7 +8911,7 @@  static void intel_sanitize_encoder(struct intel_encoder *encoder)
 	 * the crtc fixup. */
 }
 
-static void i915_redisable_vga(struct drm_device *dev)
+void i915_redisable_vga(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	u32 vga_reg;