| Message ID | 1359557997-20308-1-git-send-email-daniel.vetter@ffwll.ch (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wed, Jan 30, 2013 at 3:59 PM, Daniel Vetter <daniel.vetter@ffwll.ch> wrote: > Dumps annoying noise into the dmesg: > > [drm:intel_set_power_well] *ERROR* Timeout enabling power well > > Reported-by: Sedat Dilek <sedat.dilek@gmail.com> > Cc: Sedat Dilek <sedat.dilek@gmail.com> > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> > Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Tested-by: Sedat Dilek <sedat.dilek@gmail.com> After S/R: $ dmesg | egrep -i 'drm|i915|suspend|resume' [ 10.887952] [drm] Initialized drm 1.1.0 20060810 [ 11.974280] [drm] Memory usable by graphics device = 2048M [ 11.974290] i915 0000:00:02.0: setting latency timer to 64 [ 12.020550] i915 0000:00:02.0: irq 49 for MSI/MSI-X [ 12.020563] [drm] Supports vblank timestamp caching Rev 1 (10.10.2010). [ 12.020565] [drm] Driver supports precise vblank timestamp query. [ 12.049337] fbcon: inteldrmfb (fb0) is primary device [ 13.059191] i915 0000:00:02.0: fb0: inteldrmfb frame buffer device [ 13.059192] i915 0000:00:02.0: registered panic notifier [ 13.098925] [drm] Initialized i915 1.6.0 20080730 for 0000:00:02.0 on minor 0 [ 13.812483] [drm] Enabling RC6 states: RC6 on, RC6p off, RC6pp off [ 231.678520] Suspending console(s) (use no_console_suspend to debug) [ 232.281962] PM: suspend of devices complete after 603.751 msecs [ 232.282107] PM: late suspend of devices complete after 0.144 msecs [ 232.377845] PM: noirq suspend of devices complete after 95.801 msecs [ 232.719152] ACPI: Low-level resume complete [ 232.956049] PM: noirq resume of devices complete after 143.982 msecs [ 232.956224] PM: early resume of devices complete after 0.110 msecs [ 232.956258] i915 0000:00:02.0: setting latency timer to 64 [ 234.634962] [drm] Enabling RC6 states: RC6 on, RC6p off, RC6pp off [ 235.398226] PM: resume of devices complete after 2443.721 msecs - Sedat - > --- > drivers/gpu/drm/i915/intel_pm.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 64d65f5..703219c 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -4053,6 +4053,9 @@ void intel_set_power_well(struct drm_device *dev, bool enable) > bool is_enabled, enable_requested; > uint32_t tmp; > > + if (!IS_HASWELL(dev)) > + return; > + > tmp = I915_READ(HSW_PWR_WELL_DRIVER); > is_enabled = tmp & HSW_PWR_WELL_STATE; > enable_requested = tmp & HSW_PWR_WELL_ENABLE; > -- > 1.7.10.4 >
Hi 2013/1/30 Daniel Vetter <daniel.vetter@ffwll.ch>: > Dumps annoying noise into the dmesg: > > [drm:intel_set_power_well] *ERROR* Timeout enabling power well > > Reported-by: Sedat Dilek <sedat.dilek@gmail.com> > Cc: Sedat Dilek <sedat.dilek@gmail.com> > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> > Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> > --- > drivers/gpu/drm/i915/intel_pm.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 64d65f5..703219c 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -4053,6 +4053,9 @@ void intel_set_power_well(struct drm_device *dev, bool enable) > bool is_enabled, enable_requested; > uint32_t tmp; > > + if (!IS_HASWELL(dev)) > + return; > + > tmp = I915_READ(HSW_PWR_WELL_DRIVER); > is_enabled = tmp & HSW_PWR_WELL_STATE; > enable_requested = tmp & HSW_PWR_WELL_ENABLE; > -- > 1.7.10.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Wed, Jan 30, 2013 at 04:57:45PM -0200, Paulo Zanoni wrote: > Hi > > 2013/1/30 Daniel Vetter <daniel.vetter@ffwll.ch>: > > Dumps annoying noise into the dmesg: > > > > [drm:intel_set_power_well] *ERROR* Timeout enabling power well > > > > Reported-by: Sedat Dilek <sedat.dilek@gmail.com> > > Cc: Sedat Dilek <sedat.dilek@gmail.com> > > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> > > Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> > > Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Both patches merged to dinq. -Daniel
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 64d65f5..703219c 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4053,6 +4053,9 @@ void intel_set_power_well(struct drm_device *dev, bool enable) bool is_enabled, enable_requested; uint32_t tmp; + if (!IS_HASWELL(dev)) + return; + tmp = I915_READ(HSW_PWR_WELL_DRIVER); is_enabled = tmp & HSW_PWR_WELL_STATE; enable_requested = tmp & HSW_PWR_WELL_ENABLE;
Dumps annoying noise into the dmesg: [drm:intel_set_power_well] *ERROR* Timeout enabling power well Reported-by: Sedat Dilek <sedat.dilek@gmail.com> Cc: Sedat Dilek <sedat.dilek@gmail.com> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> --- drivers/gpu/drm/i915/intel_pm.c | 3 +++ 1 file changed, 3 insertions(+)