diff mbox

[4/4] clocksource: tegra20: use the device_node pointer passed to init

Message ID 1360264144-20714-5-git-send-email-robherring2@gmail.com (mailing list archive)
State New, archived
Headers show

Commit Message

Rob Herring Feb. 7, 2013, 7:09 p.m. UTC
From: Rob Herring <rob.herring@calxeda.com>

We've already matched the node, so use the node pointer passed in. The rtc
init was intermingled with the timer init, so split this out to a separate
init function.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: John Stultz <johnstul@us.ibm.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
---
Stephen,

It doesn't seem like there are any init ordering issues to me, but please
test/comment.

Rob

 drivers/clocksource/tegra20_timer.c |   70 ++++++++++++++---------------------
 1 file changed, 27 insertions(+), 43 deletions(-)

Comments

Stephen Warren Feb. 7, 2013, 7:39 p.m. UTC | #1
On 02/07/2013 12:09 PM, Rob Herring wrote:
> From: Rob Herring <rob.herring@calxeda.com>
> 
> We've already matched the node, so use the node pointer passed in. The rtc
> init was intermingled with the timer init, so split this out to a separate
> init function.

The series,
Reviewed-by: Stephen Warren <swarren@nvidia.com>

Patches 1,4:
Tested-by: Stephen Warren <swarren@nvidia.com>

One thing I wonder re: patch 4 - I know someone (I think Hiroshi, now
CC'd) planned to refactor drivers/clocksource/tegra20_timer.c to enhance
it for Tegra114. I'd like to check with him that the refactoring in this
patch won't impede that at all.
Hiroshi DOYU Feb. 7, 2013, 8:05 p.m. UTC | #2
Stephen Warren <swarren@wwwdotorg.org> wrote @ Thu, 7 Feb 2013 20:39:40 +0100:

> On 02/07/2013 12:09 PM, Rob Herring wrote:
> > From: Rob Herring <rob.herring@calxeda.com>
> > 
> > We've already matched the node, so use the node pointer passed in. The rtc
> > init was intermingled with the timer init, so split this out to a separate
> > init function.
> 
> The series,
> Reviewed-by: Stephen Warren <swarren@nvidia.com>
> 
> Patches 1,4:
> Tested-by: Stephen Warren <swarren@nvidia.com>
> 
> One thing I wonder re: patch 4 - I know someone (I think Hiroshi, now
> CC'd) planned to refactor drivers/clocksource/tegra20_timer.c to enhance
> it for Tegra114. I'd like to check with him that the refactoring in this
> patch won't impede that at all.

Actually this covers RTC part. I'll rework mine for the rest on the
top of this.
diff mbox

Patch

diff --git a/drivers/clocksource/tegra20_timer.c b/drivers/clocksource/tegra20_timer.c
index 0bde03f..15cc723 100644
--- a/drivers/clocksource/tegra20_timer.c
+++ b/drivers/clocksource/tegra20_timer.c
@@ -154,29 +154,12 @@  static struct irqaction tegra_timer_irq = {
 	.dev_id		= &tegra_clockevent,
 };
 
-static const struct of_device_id timer_match[] __initconst = {
-	{ .compatible = "nvidia,tegra20-timer" },
-	{}
-};
-
-static const struct of_device_id rtc_match[] __initconst = {
-	{ .compatible = "nvidia,tegra20-rtc" },
-	{}
-};
-
-static void __init tegra20_init_timer(void)
+static void __init tegra20_init_timer(struct device_node *np)
 {
-	struct device_node *np;
 	struct clk *clk;
 	unsigned long rate;
 	int ret;
 
-	np = of_find_matching_node(NULL, timer_match);
-	if (!np) {
-		pr_err("Failed to find timer DT node\n");
-		BUG();
-	}
-
 	timer_reg_base = of_iomap(np, 0);
 	if (!timer_reg_base) {
 		pr_err("Can't map timer registers\n");
@@ -200,30 +183,6 @@  static void __init tegra20_init_timer(void)
 
 	of_node_put(np);
 
-	np = of_find_matching_node(NULL, rtc_match);
-	if (!np) {
-		pr_err("Failed to find RTC DT node\n");
-		BUG();
-	}
-
-	rtc_base = of_iomap(np, 0);
-	if (!rtc_base) {
-		pr_err("Can't map RTC registers");
-		BUG();
-	}
-
-	/*
-	 * rtc registers are used by read_persistent_clock, keep the rtc clock
-	 * enabled
-	 */
-	clk = clk_get_sys("rtc-tegra", NULL);
-	if (IS_ERR(clk))
-		pr_warn("Unable to get rtc-tegra clock\n");
-	else
-		clk_prepare_enable(clk);
-
-	of_node_put(np);
-
 	switch (rate) {
 	case 12000000:
 		timer_writel(0x000b, TIMERUS_USEC_CFG);
@@ -262,9 +221,34 @@  static void __init tegra20_init_timer(void)
 #ifdef CONFIG_HAVE_ARM_TWD
 	twd_local_timer_of_register();
 #endif
+}
+CLOCKSOURCE_OF_DECLARE(tegra20_timer, "nvidia,tegra20-timer", tegra20_init_timer);
+
+static void __init tegra20_init_rtc(struct device_node *np)
+{
+	struct clk *clk;
+
+	rtc_base = of_iomap(np, 0);
+	if (!rtc_base) {
+		pr_err("Can't map RTC registers");
+		BUG();
+	}
+
+	/*
+	 * rtc registers are used by read_persistent_clock, keep the rtc clock
+	 * enabled
+	 */
+	clk = clk_get_sys("rtc-tegra", NULL);
+	if (IS_ERR(clk))
+		pr_warn("Unable to get rtc-tegra clock\n");
+	else
+		clk_prepare_enable(clk);
+
+	of_node_put(np);
+
 	register_persistent_clock(NULL, tegra_read_persistent_clock);
 }
-CLOCKSOURCE_OF_DECLARE(tegra20, "nvidia,tegra20-timer", tegra20_init_timer);
+CLOCKSOURCE_OF_DECLARE(tegra20_rtc, "nvidia,tegra20-rtc", tegra20_init_rtc);
 
 #ifdef CONFIG_PM
 static u32 usec_config;