| Message ID | 1363710956-26773-11-git-send-email-jon-hunter@ti.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Tue, 19 Mar 2013 11:35:48 -0500, Jon Hunter <jon-hunter@ti.com> wrote: > Adds a function to read the various GPMC chip-select settings from > device-tree and store them in the gpmc_settings structure. > > Update the GPMC device-tree binding documentation to describe these > options. > > Signed-off-by: Jon Hunter <jon-hunter@ti.com> > Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> > --- > Documentation/devicetree/bindings/bus/ti-gpmc.txt | 23 ++++++++++++ > arch/arm/mach-omap2/gpmc.c | 40 +++++++++++++++++++++ > arch/arm/mach-omap2/gpmc.h | 2 ++ > 3 files changed, 65 insertions(+) > > diff --git a/Documentation/devicetree/bindings/bus/ti-gpmc.txt b/Documentation/devicetree/bindings/bus/ti-gpmc.txt > index 5ddb2e9..6fde1cf 100644 > --- a/Documentation/devicetree/bindings/bus/ti-gpmc.txt > +++ b/Documentation/devicetree/bindings/bus/ti-gpmc.txt > @@ -65,6 +65,29 @@ The following are only applicable to OMAP3+ and AM335x: > - gpmc,wr-access > - gpmc,wr-data-mux-bus > > +GPMC chip-select settings properties for child nodes. All are optional. > + > +- gpmc,burst-length Page/burst length. Must be 4, 8 or 16. > +- gpmc,burst-wrap Enables wrap bursting > +- gpmc,burst-read Enables read page/burst mode > +- gpmc,burst-write Enables write page/burst mode > +- gpmc,device-nand Device is NAND > +- gpmc,device-width Total width of device(s) connected to a GPMC > + chip-select in bytes. The GPMC supports 8-bit > + and 16-bit devices and so this property must be > + 1 or 2. I would suggest specifying the actual number of bits. ie. 8 or 16. There is some precidence for that already in DT bindings. > +- gpmc,mux-add-data Address and data multiplexing configuration. > + Valid values are 1 for address-address-data > + multiplexing mode and 2 for address-data > + multiplexing mode. > +- gpmc,sync-read Enables synchronous read. Defaults to asynchronous > + is this is not set. 'if'? > +- gpmc,sync-write Enables synchronous writes. Defaults to asynchronous > + is this is not set. > +- gpmc,wait-pin Wait-pin used by client. Must be less than > + "gpmc,num-waitpins". > +- gpmc,wait-on-read Enables wait monitoring on reads. > +- gpmc,wait-on-write Enables wait monitoring on writes. Otherwise looks okay to me. g. -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 04/15/2013 08:27 AM, Grant Likely wrote: > On Tue, 19 Mar 2013 11:35:48 -0500, Jon Hunter <jon-hunter@ti.com> wrote: >> Adds a function to read the various GPMC chip-select settings from >> device-tree and store them in the gpmc_settings structure. >> >> Update the GPMC device-tree binding documentation to describe these >> options. >> >> Signed-off-by: Jon Hunter <jon-hunter@ti.com> >> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> >> --- >> Documentation/devicetree/bindings/bus/ti-gpmc.txt | 23 ++++++++++++ >> arch/arm/mach-omap2/gpmc.c | 40 +++++++++++++++++++++ >> arch/arm/mach-omap2/gpmc.h | 2 ++ >> 3 files changed, 65 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/bus/ti-gpmc.txt b/Documentation/devicetree/bindings/bus/ti-gpmc.txt >> index 5ddb2e9..6fde1cf 100644 >> --- a/Documentation/devicetree/bindings/bus/ti-gpmc.txt >> +++ b/Documentation/devicetree/bindings/bus/ti-gpmc.txt >> @@ -65,6 +65,29 @@ The following are only applicable to OMAP3+ and AM335x: >> - gpmc,wr-access >> - gpmc,wr-data-mux-bus >> >> +GPMC chip-select settings properties for child nodes. All are optional. >> + >> +- gpmc,burst-length Page/burst length. Must be 4, 8 or 16. >> +- gpmc,burst-wrap Enables wrap bursting >> +- gpmc,burst-read Enables read page/burst mode >> +- gpmc,burst-write Enables write page/burst mode >> +- gpmc,device-nand Device is NAND >> +- gpmc,device-width Total width of device(s) connected to a GPMC >> + chip-select in bytes. The GPMC supports 8-bit >> + and 16-bit devices and so this property must be >> + 1 or 2. > > I would suggest specifying the actual number of bits. ie. 8 or 16. There is some > precidence for that already in DT bindings. I used bytes and not bits here as it was more convenient for programming a register bit field. However, it would be equally easy to shift the value and program the register if we use bits. So this can be changed. By the way, I have seen some of the flash bindings (eg. mtd-physmap.txt) use bytes and not bits, however, I do see others use bits (nand.txt). However, if the preference is for bits then we can conform to that. Tony has this queued for v3.10 now. However, we can fix this up if you feel strongly about this. >> +- gpmc,mux-add-data Address and data multiplexing configuration. >> + Valid values are 1 for address-address-data >> + multiplexing mode and 2 for address-data >> + multiplexing mode. >> +- gpmc,sync-read Enables synchronous read. Defaults to asynchronous >> + is this is not set. > > 'if'? > >> +- gpmc,sync-write Enables synchronous writes. Defaults to asynchronous >> + is this is not set. >> +- gpmc,wait-pin Wait-pin used by client. Must be less than >> + "gpmc,num-waitpins". >> +- gpmc,wait-on-read Enables wait monitoring on reads. >> +- gpmc,wait-on-write Enables wait monitoring on writes. > > Otherwise looks okay to me. Thanks Jon -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/Documentation/devicetree/bindings/bus/ti-gpmc.txt b/Documentation/devicetree/bindings/bus/ti-gpmc.txt index 5ddb2e9..6fde1cf 100644 --- a/Documentation/devicetree/bindings/bus/ti-gpmc.txt +++ b/Documentation/devicetree/bindings/bus/ti-gpmc.txt @@ -65,6 +65,29 @@ The following are only applicable to OMAP3+ and AM335x: - gpmc,wr-access - gpmc,wr-data-mux-bus +GPMC chip-select settings properties for child nodes. All are optional. + +- gpmc,burst-length Page/burst length. Must be 4, 8 or 16. +- gpmc,burst-wrap Enables wrap bursting +- gpmc,burst-read Enables read page/burst mode +- gpmc,burst-write Enables write page/burst mode +- gpmc,device-nand Device is NAND +- gpmc,device-width Total width of device(s) connected to a GPMC + chip-select in bytes. The GPMC supports 8-bit + and 16-bit devices and so this property must be + 1 or 2. +- gpmc,mux-add-data Address and data multiplexing configuration. + Valid values are 1 for address-address-data + multiplexing mode and 2 for address-data + multiplexing mode. +- gpmc,sync-read Enables synchronous read. Defaults to asynchronous + is this is not set. +- gpmc,sync-write Enables synchronous writes. Defaults to asynchronous + is this is not set. +- gpmc,wait-pin Wait-pin used by client. Must be less than + "gpmc,num-waitpins". +- gpmc,wait-on-read Enables wait monitoring on reads. +- gpmc,wait-on-write Enables wait monitoring on writes. Example for an AM33xx board: diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index b22771b..85231b3 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c @@ -1187,6 +1187,46 @@ static struct of_device_id gpmc_dt_ids[] = { }; MODULE_DEVICE_TABLE(of, gpmc_dt_ids); +/** + * gpmc_read_settings_dt - read gpmc settings from device-tree + * @np: pointer to device-tree node for a gpmc child device + * @p: pointer to gpmc settings structure + * + * Reads the GPMC settings for a GPMC child device from device-tree and + * stores them in the GPMC settings structure passed. The GPMC settings + * structure is initialised to zero by this function and so any + * previously stored settings will be cleared. + */ +void gpmc_read_settings_dt(struct device_node *np, struct gpmc_settings *p) +{ + memset(p, 0, sizeof(struct gpmc_settings)); + + p->sync_read = of_property_read_bool(np, "gpmc,sync-read"); + p->sync_write = of_property_read_bool(np, "gpmc,sync-write"); + p->device_nand = of_property_read_bool(np, "gpmc,device-nand"); + of_property_read_u32(np, "gpmc,device-width", &p->device_width); + of_property_read_u32(np, "gpmc,mux-add-data", &p->mux_add_data); + + if (!of_property_read_u32(np, "gpmc,burst-length", &p->burst_len)) { + p->burst_wrap = of_property_read_bool(np, "gpmc,burst-wrap"); + p->burst_read = of_property_read_bool(np, "gpmc,burst-read"); + p->burst_write = of_property_read_bool(np, "gpmc,burst-write"); + if (!p->burst_read && !p->burst_write) + pr_warn("%s: page/burst-length set but not used!\n", + __func__); + } + + if (!of_property_read_u32(np, "gpmc,wait-pin", &p->wait_pin)) { + p->wait_on_read = of_property_read_bool(np, + "gpmc,wait-on-read"); + p->wait_on_write = of_property_read_bool(np, + "gpmc,wait-on-write"); + if (!p->wait_on_read && !p->wait_on_write) + pr_warn("%s: read/write wait monitoring not enabled!\n", + __func__); + } +} + static void __maybe_unused gpmc_read_timings_dt(struct device_node *np, struct gpmc_timings *gpmc_t) { diff --git a/arch/arm/mach-omap2/gpmc.h b/arch/arm/mach-omap2/gpmc.h index 87d2a22..707f6d5 100644 --- a/arch/arm/mach-omap2/gpmc.h +++ b/arch/arm/mach-omap2/gpmc.h @@ -225,5 +225,7 @@ extern void gpmc_cs_free(int cs); extern void omap3_gpmc_save_context(void); extern void omap3_gpmc_restore_context(void); extern int gpmc_configure(int cmd, int wval); +extern void gpmc_read_settings_dt(struct device_node *np, + struct gpmc_settings *p); #endif