| Message ID | 1370516488-25860-10-git-send-email-chander.kashyap@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Hi, > diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts b/arch/arm/boot/dts/exynos5420-smdk5420.dts > new file mode 100644 > index 0000000..b14e775 > --- /dev/null > +++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts > @@ -0,0 +1,40 @@ > +/* > + * SAMSUNG SMDK5420 board device tree source > + * > + * Copyright (c) 2013 Samsung Electronics Co., Ltd. > + * http://www.samsung.com > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > +*/ > + > +/dts-v1/; > +/include/ "exynos5420.dtsi" > + > +/ { > + model = "Samsung SMDK5420 board based on EXYNOS5420"; > + compatible = "samsung,smdk5420", "samsung,exynos5420"; > + > + memory { > + reg = <0x20000000 0x10000000 > + 0x30000000 0x10000000 > + 0x40000000 0x10000000 > + 0x50000000 0x10000000 > + 0x60000000 0x10000000 > + 0x70000000 0x10000000 > + 0x80000000 0x10000000 > + 0x90000000 0x10000000>; > + }; This looks a little odd. As these are continguous, you can describe them as one bank: memory { reg = <0x20000000 0x80000000>; }; Mark.
On Thursday 06 of June 2013 16:31:24 Chander Kashyap wrote: > Add initial device tree nodes for Exynos5420 SoC and SMDK5420 board. > > Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> > --- > arch/arm/boot/dts/Makefile | 1 + > arch/arm/boot/dts/exynos5420-smdk5420.dts | 40 ++++++++++++ > arch/arm/boot/dts/exynos5420.dtsi | 101 > +++++++++++++++++++++++++++++ 3 files changed, 142 insertions(+) > create mode 100644 arch/arm/boot/dts/exynos5420-smdk5420.dts > create mode 100644 arch/arm/boot/dts/exynos5420.dtsi > > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile > index cb31259..304ba4d 100644 > --- a/arch/arm/boot/dts/Makefile > +++ b/arch/arm/boot/dts/Makefile > @@ -56,6 +56,7 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \ > exynos5250-arndale.dtb \ > exynos5440-sd5v1.dtb \ > exynos5250-smdk5250.dtb \ > + exynos5420-smdk5420.dtb \ Please keep the sorting order. > exynos5250-snow.dtb \ Here is the correct place for exynos5440-*. > exynos5440-ssdk5440.dtb > dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb \ > diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts > b/arch/arm/boot/dts/exynos5420-smdk5420.dts new file mode 100644 > index 0000000..b14e775 > --- /dev/null > +++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts > @@ -0,0 +1,40 @@ > +/* > + * SAMSUNG SMDK5420 board device tree source > + * > + * Copyright (c) 2013 Samsung Electronics Co., Ltd. > + * http://www.samsung.com > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as + > * published by the Free Software Foundation. > +*/ > + > +/dts-v1/; > +/include/ "exynos5420.dtsi" #include "exynos5420.dtsi" > + > +/ { > + model = "Samsung SMDK5420 board based on EXYNOS5420"; > + compatible = "samsung,smdk5420", "samsung,exynos5420"; > + > + memory { > + reg = <0x20000000 0x10000000 > + 0x30000000 0x10000000 > + 0x40000000 0x10000000 > + 0x50000000 0x10000000 > + 0x60000000 0x10000000 > + 0x70000000 0x10000000 > + 0x80000000 0x10000000 > + 0x90000000 0x10000000>; > + }; > + > + chosen { > + bootargs = "console=ttySAC2,115200 init=/linuxrc"; > + }; > + > + fixed-rate-clocks { > + oscclk { > + compatible = "samsung,exynos5420-oscclk"; > + clock-frequency = <24000000>; > + }; > + }; > +}; > diff --git a/arch/arm/boot/dts/exynos5420.dtsi > b/arch/arm/boot/dts/exynos5420.dtsi new file mode 100644 > index 0000000..577dfe5 > --- /dev/null > +++ b/arch/arm/boot/dts/exynos5420.dtsi > @@ -0,0 +1,101 @@ > +/* > + * SAMSUNG EXYNOS5420 SoC device tree source > + * > + * Copyright (c) 2013 Samsung Electronics Co., Ltd. > + * http://www.samsung.com > + * > + * SAMSUNG EXYNOS54200 SoC device nodes are listed in this file. > + * EXYNOS5420 based board files can include this file and provide > + * values for board specfic bindings. > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as + > * published by the Free Software Foundation. > +*/ nitpick: missing space to keep the alignment of stars > + > +/include/ "skeleton.dtsi" > +/include/ "exynos5.dtsi" #include and IMHO skeleton.dtsi should be already included from exynos5.dtsi. > +/ { > + compatible = "samsung,exynos5420"; > + > + clock: clock-controller@0x10010000 { > + compatible = "samsung,exynos5420-clock"; > + reg = <0x10010000 0x30000>; > + #clock-cells = <1>; > + }; > + > + cpus { > + #address-cells = <1>; > + #size-cells = <0>; > + > + cpu0: cpu@0 { > + device_type = "cpu"; > + compatible = "arm,cortex-a15"; > + reg = <0x0>; > + clock-frequency = <800000000>; Hmm. I don't remember seeing this property in CPU bindings, but maybe I'm missing something. Anyway this makes little sense, since on every board this frequency may be different. Not even saying about CPU frequency scaling that would change it. > + }; > + > + cpu1: cpu@1 { > + device_type = "cpu"; > + compatible = "arm,cortex-a15"; > + reg = <0x1>; > + clock-frequency = <800000000>; > + }; > + > + cpu2: cpu@2 { > + device_type = "cpu"; > + compatible = "arm,cortex-a15"; > + reg = <0x2>; > + clock-frequency = <800000000>; > + }; > + > + cpu3: cpu@3 { > + device_type = "cpu"; > + compatible = "arm,cortex-a15"; > + reg = <0x3>; > + clock-frequency = <800000000>; > + }; > + }; > + > + mct@101C0000 { > + compatible = "samsung,exynos4210-mct"; > + reg = <0x101C0000 0x800>; > + interrupt-controller; > + #interrups-cells = <2>; > + interrupt-parent = <&mct_map>; > + interrupts = <0 0>, <1 0>, <2 0>, <3 0>, > + <4 0>, <5 0>, <6 0>, <7 0>; > + clocks = <&clock 1>, <&clock 315>; > + clock-names = "fin_pll", "mct"; > + > + mct_map: mct-map { > + #interrupt-cells = <2>; Why do you need 2 cells here, if second one is unused in the map and kept as 0? > + #address-cells = <0>; > + #size-cells = <0>; > + interrupt-map = <0x0 0 &combiner 23 3>, > + <0x1 0 &combiner 23 4>, > + <0x2 0 &combiner 25 2>, > + <0x3 0 &combiner 25 3>, > + <0x4 0 &gic 0 120 0>, > + <0x5 0 &gic 0 121 0>, > + <0x6 0 &gic 0 122 0>, > + <0x7 0 &gic 0 123 0>; Having #interrupt-cells = <1> would allow to simplify the map to: interrupt-map = <0 &combiner 23 3>, <1 &combiner 23 4>, <2 &combiner 25 2>, <3 &combiner 25 3>, <4 &gic 0 120 0>, <5 &gic 0 121 0>, <6 &gic 0 122 0>, <7 &gic 0 123 0>; and interrupt specifiers in mct node to: interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>; > + }; > + }; > + > + serial@12C00000 { > + clocks = <&clock 257>, <&clock 128>; This looks a bit awkward without the clock-names property here. See my comments to patch 03/13. Best regards, Tomasz > + }; > + > + serial@12C10000 { > + clocks = <&clock 258>, <&clock 129>; > + }; > + > + serial@12C20000 { > + clocks = <&clock 259>, <&clock 130>; > + }; > + > + serial@12C30000 { > + clocks = <&clock 260>, <&clock 131>; > + }; > +};
On 6 June 2013 22:04, Mark Rutland <mark.rutland@arm.com> wrote: > Hi, > >> diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts b/arch/arm/boot/dts/exynos5420-smdk5420.dts >> new file mode 100644 >> index 0000000..b14e775 >> --- /dev/null >> +++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts >> @@ -0,0 +1,40 @@ >> +/* >> + * SAMSUNG SMDK5420 board device tree source >> + * >> + * Copyright (c) 2013 Samsung Electronics Co., Ltd. >> + * http://www.samsung.com >> + * >> + * This program is free software; you can redistribute it and/or modify >> + * it under the terms of the GNU General Public License version 2 as >> + * published by the Free Software Foundation. >> +*/ >> + >> +/dts-v1/; >> +/include/ "exynos5420.dtsi" >> + >> +/ { >> + model = "Samsung SMDK5420 board based on EXYNOS5420"; >> + compatible = "samsung,smdk5420", "samsung,exynos5420"; >> + >> + memory { >> + reg = <0x20000000 0x10000000 >> + 0x30000000 0x10000000 >> + 0x40000000 0x10000000 >> + 0x50000000 0x10000000 >> + 0x60000000 0x10000000 >> + 0x70000000 0x10000000 >> + 0x80000000 0x10000000 >> + 0x90000000 0x10000000>; >> + }; > As there are only 28 bits for memory bank size in memory.h. Hence each bank is split into 256MB. > This looks a little odd. As these are continguous, you can describe them as one > bank: > > memory { > reg = <0x20000000 0x80000000>; > }; > > Mark. -- with warm regards, Chander Kashyap
On Tue, Jun 11, 2013 at 02:35:38PM +0100, Chander Kashyap wrote: > On 6 June 2013 22:04, Mark Rutland <mark.rutland@arm.com> wrote: > > Hi, > > > >> diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts b/arch/arm/boot/dts/exynos5420-smdk5420.dts > >> new file mode 100644 > >> index 0000000..b14e775 > >> --- /dev/null > >> +++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts > >> @@ -0,0 +1,40 @@ > >> +/* > >> + * SAMSUNG SMDK5420 board device tree source > >> + * > >> + * Copyright (c) 2013 Samsung Electronics Co., Ltd. > >> + * http://www.samsung.com > >> + * > >> + * This program is free software; you can redistribute it and/or modify > >> + * it under the terms of the GNU General Public License version 2 as > >> + * published by the Free Software Foundation. > >> +*/ > >> + > >> +/dts-v1/; > >> +/include/ "exynos5420.dtsi" > >> + > >> +/ { > >> + model = "Samsung SMDK5420 board based on EXYNOS5420"; > >> + compatible = "samsung,smdk5420", "samsung,exynos5420"; > >> + > >> + memory { > >> + reg = <0x20000000 0x10000000 > >> + 0x30000000 0x10000000 > >> + 0x40000000 0x10000000 > >> + 0x50000000 0x10000000 > >> + 0x60000000 0x10000000 > >> + 0x70000000 0x10000000 > >> + 0x80000000 0x10000000 > >> + 0x90000000 0x10000000>; > >> + }; > > > As there are only 28 bits for memory bank size in memory.h. > Hence each bank is split into 256MB. I don't think a kernel implementation choice should affect the dts. If the kernel needs to carve up the memory, it should do it itself - it knows what it needs. Splitting the banks manually as above is papering over the problem. Thanks, Mark.
Hi Mark, On 06/11/2013 07:41 PM, Mark Rutland wrote: > On Tue, Jun 11, 2013 at 02:35:38PM +0100, Chander Kashyap wrote: >> On 6 June 2013 22:04, Mark Rutland <mark.rutland@arm.com> wrote: >>> Hi, >>> >>>> diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts b/arch/arm/boot/dts/exynos5420-smdk5420.dts >>>> new file mode 100644 >>>> index 0000000..b14e775 >>>> --- /dev/null >>>> +++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts >>>> @@ -0,0 +1,40 @@ >>>> +/* >>>> + * SAMSUNG SMDK5420 board device tree source >>>> + * >>>> + * Copyright (c) 2013 Samsung Electronics Co., Ltd. >>>> + * http://www.samsung.com >>>> + * >>>> + * This program is free software; you can redistribute it and/or modify >>>> + * it under the terms of the GNU General Public License version 2 as >>>> + * published by the Free Software Foundation. >>>> +*/ >>>> + >>>> +/dts-v1/; >>>> +/include/ "exynos5420.dtsi" >>>> + >>>> +/ { >>>> + model = "Samsung SMDK5420 board based on EXYNOS5420"; >>>> + compatible = "samsung,smdk5420", "samsung,exynos5420"; >>>> + >>>> + memory { >>>> + reg = <0x20000000 0x10000000 >>>> + 0x30000000 0x10000000 >>>> + 0x40000000 0x10000000 >>>> + 0x50000000 0x10000000 >>>> + 0x60000000 0x10000000 >>>> + 0x70000000 0x10000000 >>>> + 0x80000000 0x10000000 >>>> + 0x90000000 0x10000000>; >>>> + }; >>> >> As there are only 28 bits for memory bank size in memory.h. >> Hence each bank is split into 256MB. > > I don't think a kernel implementation choice should affect the dts. > > If the kernel needs to carve up the memory, it should do it itself - it knows > what it needs. Splitting the banks manually as above is papering over the > problem. I agree this looks a bit odd to split the memory regions into 256MiB banks. But we have had legacy systems which had a hole in the memory range, and we used sparse mem in the past for the same. If we modify this bank size now, we will break the functionality of those systems. Also, with LPAE systems I changed this bank size to 2GiB in another patch. I think someone was working on cleaning up sparse mem for exynos(I was quite busy internally and didn't follow up much on mailing list). So I would like to keep this bank size as 256MiB for non-LPAE systems at the moment, until such a cleanup gets merged. Copy: kgene - exynos maintainer Mr. Kim, let us know your opinion on this. Regards, Subash > > Thanks, > Mark. > -- > To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html >
On 8 June 2013 17:08, Tomasz Figa <tomasz.figa@gmail.com> wrote: > On Thursday 06 of June 2013 16:31:24 Chander Kashyap wrote: >> Add initial device tree nodes for Exynos5420 SoC and SMDK5420 board. >> >> Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> >> --- >> arch/arm/boot/dts/Makefile | 1 + >> arch/arm/boot/dts/exynos5420-smdk5420.dts | 40 ++++++++++++ >> arch/arm/boot/dts/exynos5420.dtsi | 101 >> +++++++++++++++++++++++++++++ 3 files changed, 142 insertions(+) >> create mode 100644 arch/arm/boot/dts/exynos5420-smdk5420.dts >> create mode 100644 arch/arm/boot/dts/exynos5420.dtsi >> >> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile >> index cb31259..304ba4d 100644 >> --- a/arch/arm/boot/dts/Makefile >> +++ b/arch/arm/boot/dts/Makefile >> @@ -56,6 +56,7 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \ >> exynos5250-arndale.dtb \ >> exynos5440-sd5v1.dtb \ >> exynos5250-smdk5250.dtb \ >> + exynos5420-smdk5420.dtb \ > > Please keep the sorting order. > >> exynos5250-snow.dtb \ > > Here is the correct place for exynos5440-*. I will sort it. > >> exynos5440-ssdk5440.dtb >> dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb \ >> diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts >> b/arch/arm/boot/dts/exynos5420-smdk5420.dts new file mode 100644 >> index 0000000..b14e775 >> --- /dev/null >> +++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts >> @@ -0,0 +1,40 @@ >> +/* >> + * SAMSUNG SMDK5420 board device tree source >> + * >> + * Copyright (c) 2013 Samsung Electronics Co., Ltd. >> + * http://www.samsung.com >> + * >> + * This program is free software; you can redistribute it and/or modify >> + * it under the terms of the GNU General Public License version 2 as + >> * published by the Free Software Foundation. >> +*/ >> + >> +/dts-v1/; >> +/include/ "exynos5420.dtsi" > > #include "exynos5420.dtsi" > >> + >> +/ { >> + model = "Samsung SMDK5420 board based on EXYNOS5420"; >> + compatible = "samsung,smdk5420", "samsung,exynos5420"; >> + >> + memory { >> + reg = <0x20000000 0x10000000 >> + 0x30000000 0x10000000 >> + 0x40000000 0x10000000 >> + 0x50000000 0x10000000 >> + 0x60000000 0x10000000 >> + 0x70000000 0x10000000 >> + 0x80000000 0x10000000 >> + 0x90000000 0x10000000>; >> + }; >> + >> + chosen { >> + bootargs = "console=ttySAC2,115200 init=/linuxrc"; >> + }; >> + >> + fixed-rate-clocks { >> + oscclk { >> + compatible = "samsung,exynos5420-oscclk"; >> + clock-frequency = <24000000>; >> + }; >> + }; >> +}; >> diff --git a/arch/arm/boot/dts/exynos5420.dtsi >> b/arch/arm/boot/dts/exynos5420.dtsi new file mode 100644 >> index 0000000..577dfe5 >> --- /dev/null >> +++ b/arch/arm/boot/dts/exynos5420.dtsi >> @@ -0,0 +1,101 @@ >> +/* >> + * SAMSUNG EXYNOS5420 SoC device tree source >> + * >> + * Copyright (c) 2013 Samsung Electronics Co., Ltd. >> + * http://www.samsung.com >> + * >> + * SAMSUNG EXYNOS54200 SoC device nodes are listed in this file. >> + * EXYNOS5420 based board files can include this file and provide >> + * values for board specfic bindings. >> + * >> + * This program is free software; you can redistribute it and/or modify >> + * it under the terms of the GNU General Public License version 2 as + >> * published by the Free Software Foundation. >> +*/ > > nitpick: missing space to keep the alignment of stars > >> + >> +/include/ "skeleton.dtsi" >> +/include/ "exynos5.dtsi" > > #include and IMHO skeleton.dtsi should be already included from > exynos5.dtsi. > >> +/ { >> + compatible = "samsung,exynos5420"; >> + >> + clock: clock-controller@0x10010000 { >> + compatible = "samsung,exynos5420-clock"; >> + reg = <0x10010000 0x30000>; >> + #clock-cells = <1>; >> + }; >> + >> + cpus { >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + cpu0: cpu@0 { >> + device_type = "cpu"; >> + compatible = "arm,cortex-a15"; >> + reg = <0x0>; >> + clock-frequency = <800000000>; > > Hmm. I don't remember seeing this property in CPU bindings, but maybe I'm > missing something. Anyway this makes little sense, since on every board > this frequency may be different. Not even saying about CPU frequency > scaling that would change it. Well this is used to calculate cpu capacity. > >> + }; >> + >> + cpu1: cpu@1 { >> + device_type = "cpu"; >> + compatible = "arm,cortex-a15"; >> + reg = <0x1>; >> + clock-frequency = <800000000>; >> + }; >> + >> + cpu2: cpu@2 { >> + device_type = "cpu"; >> + compatible = "arm,cortex-a15"; >> + reg = <0x2>; >> + clock-frequency = <800000000>; >> + }; >> + >> + cpu3: cpu@3 { >> + device_type = "cpu"; >> + compatible = "arm,cortex-a15"; >> + reg = <0x3>; >> + clock-frequency = <800000000>; >> + }; >> + }; >> + >> + mct@101C0000 { >> + compatible = "samsung,exynos4210-mct"; >> + reg = <0x101C0000 0x800>; >> + interrupt-controller; >> + #interrups-cells = <2>; >> + interrupt-parent = <&mct_map>; >> + interrupts = <0 0>, <1 0>, <2 0>, <3 0>, >> + <4 0>, <5 0>, <6 0>, <7 0>; >> + clocks = <&clock 1>, <&clock 315>; >> + clock-names = "fin_pll", "mct"; >> + >> + mct_map: mct-map { >> + #interrupt-cells = <2>; > > Why do you need 2 cells here, if second one is unused in the map and kept > as 0? > >> + #address-cells = <0>; >> + #size-cells = <0>; >> + interrupt-map = <0x0 0 &combiner 23 3>, >> + <0x1 0 &combiner 23 4>, >> + <0x2 0 &combiner 25 2>, >> + <0x3 0 &combiner 25 3>, >> + <0x4 0 &gic 0 120 0>, >> + <0x5 0 &gic 0 121 0>, >> + <0x6 0 &gic 0 122 0>, >> + <0x7 0 &gic 0 123 0>; > > Having #interrupt-cells = <1> would allow to simplify the map to: > > interrupt-map = <0 &combiner 23 3>, > <1 &combiner 23 4>, > <2 &combiner 25 2>, > <3 &combiner 25 3>, > <4 &gic 0 120 0>, > <5 &gic 0 121 0>, > <6 &gic 0 122 0>, > <7 &gic 0 123 0>; > > and interrupt specifiers in mct node to: > > interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>; > I will do the necessary changer. >> + }; >> + }; >> + >> + serial@12C00000 { >> + clocks = <&clock 257>, <&clock 128>; > > This looks a bit awkward without the clock-names property here. See my > comments to patch 03/13. I will move the clock names and number to same place. > > Best regards, > Tomasz > >> + }; >> + >> + serial@12C10000 { >> + clocks = <&clock 258>, <&clock 129>; >> + }; >> + >> + serial@12C20000 { >> + clocks = <&clock 259>, <&clock 130>; >> + }; >> + >> + serial@12C30000 { >> + clocks = <&clock 260>, <&clock 131>; >> + }; >> +}; Thanks for the review. -- with warm regards, Chander Kashyap
Exynos5420 is new SoC in Samsung's Exynos5 SoC series. This series adds
initial support for this SoC.
Changes since v1:
1. As not-dt platforms will not be supported from 3.11 onwards, following
patches from previous patch series are dropped:
"irqchip: exynos-combiner: set irq base as 256 for Exynos5420"
"ARM: Exynos: initialize l2x0 cache controller only for cortex-a9 based SoCs"
2. Added device type property in cpu node in the following patch:
"ARM: dts: list the CPU nodes for Exynos5250
3. Sorted out the nodes listed in based upon the physical addresses as suggested
by Tomasz Figa.
4. As Tomasz is going to consolidate the secondary cpu power register address
calculation in all possible scnarios, hence dropped the following patch:
"ARM: Exynos: fix secondary cpu power control register address calculation"
5. Replaced the setup/remove)_irq calls with (request/free)_irq calls as
suggested by Mark Rutland in patch:
"clocksource: exynos_mct: use (request/free)_irq calls for local timer
registration"
6. Changed the registration of epll and rpll from pll35xx to pl36xx.
7. Changed driver data selection for serial port, based on ARCH_EXYNOS.
8. Changed the interrupt cells from 2 to 1 as suggested by Tomasz Figa.
Chander Kashyap (10):
ARM: dts: fork out common Exynos5 nodes
ARM: dts: list the CPU nodes for Exynos5250
ARM: Exynos: Add support for Exynos5420 SoC
serial: samsung: select Exynos specific driver data if ARCH_EXYNOS is defined
ARM: Exynos: use four additional chipid bits to identify Exynos family
clk: exynos5420: register clocks using common clock framework
ARM: dts: Add initial device tree support for Exynos5420
clocksource: exynos_mct: use (request/free)_irq calls for local timer registration
ARM: Exynos: add secondary CPU boot base location for Exynos5420
ARM: Exynos: extend soft-reset support for Exynos5420
.../devicetree/bindings/clock/exynos5420-clock.txt | 201 ++++++
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/exynos5.dtsi | 111 +++
arch/arm/boot/dts/exynos5250.dtsi | 80 +-
arch/arm/boot/dts/exynos5420-smdk5420.dts | 40 +
arch/arm/boot/dts/exynos5420.dtsi | 104 +++
arch/arm/mach-exynos/Kconfig | 10 +
arch/arm/mach-exynos/common.c | 18 +-
arch/arm/mach-exynos/include/mach/uncompress.h | 7 +-
arch/arm/mach-exynos/mach-exynos5-dt.c | 1 +
arch/arm/mach-exynos/platsmp.c | 12 +-
arch/arm/plat-samsung/include/plat/cpu.h | 8 +
drivers/clk/samsung/Makefile | 1 +
drivers/clk/samsung/clk-exynos5420.c | 762 ++++++++++++++++++++
drivers/clocksource/exynos_mct.c | 35 +-
drivers/tty/serial/samsung.c | 4 +-
16 files changed, 1288 insertions(+), 107 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/exynos5420-clock.txt
create mode 100644 arch/arm/boot/dts/exynos5.dtsi
create mode 100644 arch/arm/boot/dts/exynos5420-smdk5420.dts
create mode 100644 arch/arm/boot/dts/exynos5420.dtsi
create mode 100644 drivers/clk/samsung/clk-exynos5420.c
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index cb31259..304ba4d 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -56,6 +56,7 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \ exynos5250-arndale.dtb \ exynos5440-sd5v1.dtb \ exynos5250-smdk5250.dtb \ + exynos5420-smdk5420.dtb \ exynos5250-snow.dtb \ exynos5440-ssdk5440.dtb dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb \ diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts b/arch/arm/boot/dts/exynos5420-smdk5420.dts new file mode 100644 index 0000000..b14e775 --- /dev/null +++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts @@ -0,0 +1,40 @@ +/* + * SAMSUNG SMDK5420 board device tree source + * + * Copyright (c) 2013 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/dts-v1/; +/include/ "exynos5420.dtsi" + +/ { + model = "Samsung SMDK5420 board based on EXYNOS5420"; + compatible = "samsung,smdk5420", "samsung,exynos5420"; + + memory { + reg = <0x20000000 0x10000000 + 0x30000000 0x10000000 + 0x40000000 0x10000000 + 0x50000000 0x10000000 + 0x60000000 0x10000000 + 0x70000000 0x10000000 + 0x80000000 0x10000000 + 0x90000000 0x10000000>; + }; + + chosen { + bootargs = "console=ttySAC2,115200 init=/linuxrc"; + }; + + fixed-rate-clocks { + oscclk { + compatible = "samsung,exynos5420-oscclk"; + clock-frequency = <24000000>; + }; + }; +}; diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi new file mode 100644 index 0000000..577dfe5 --- /dev/null +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -0,0 +1,101 @@ +/* + * SAMSUNG EXYNOS5420 SoC device tree source + * + * Copyright (c) 2013 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * SAMSUNG EXYNOS54200 SoC device nodes are listed in this file. + * EXYNOS5420 based board files can include this file and provide + * values for board specfic bindings. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/include/ "skeleton.dtsi" +/include/ "exynos5.dtsi" +/ { + compatible = "samsung,exynos5420"; + + clock: clock-controller@0x10010000 { + compatible = "samsung,exynos5420-clock"; + reg = <0x10010000 0x30000>; + #clock-cells = <1>; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x0>; + clock-frequency = <800000000>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x1>; + clock-frequency = <800000000>; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x2>; + clock-frequency = <800000000>; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x3>; + clock-frequency = <800000000>; + }; + }; + + mct@101C0000 { + compatible = "samsung,exynos4210-mct"; + reg = <0x101C0000 0x800>; + interrupt-controller; + #interrups-cells = <2>; + interrupt-parent = <&mct_map>; + interrupts = <0 0>, <1 0>, <2 0>, <3 0>, + <4 0>, <5 0>, <6 0>, <7 0>; + clocks = <&clock 1>, <&clock 315>; + clock-names = "fin_pll", "mct"; + + mct_map: mct-map { + #interrupt-cells = <2>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-map = <0x0 0 &combiner 23 3>, + <0x1 0 &combiner 23 4>, + <0x2 0 &combiner 25 2>, + <0x3 0 &combiner 25 3>, + <0x4 0 &gic 0 120 0>, + <0x5 0 &gic 0 121 0>, + <0x6 0 &gic 0 122 0>, + <0x7 0 &gic 0 123 0>; + }; + }; + + serial@12C00000 { + clocks = <&clock 257>, <&clock 128>; + }; + + serial@12C10000 { + clocks = <&clock 258>, <&clock 129>; + }; + + serial@12C20000 { + clocks = <&clock 259>, <&clock 130>; + }; + + serial@12C30000 { + clocks = <&clock 260>, <&clock 131>; + }; +};
Add initial device tree nodes for Exynos5420 SoC and SMDK5420 board. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/exynos5420-smdk5420.dts | 40 ++++++++++++ arch/arm/boot/dts/exynos5420.dtsi | 101 +++++++++++++++++++++++++++++ 3 files changed, 142 insertions(+) create mode 100644 arch/arm/boot/dts/exynos5420-smdk5420.dts create mode 100644 arch/arm/boot/dts/exynos5420.dtsi