diff mbox

[1/5] iio: at91: use adc_clk_khz to make the calculation not easy to large than u32.

Message ID 1373789069-11604-2-git-send-email-josh.wu@atmel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Josh Wu July 14, 2013, 8:04 a.m. UTC
for example, if adc_clk is 20Mhz and start-up time set as larger than 215us.
then the calculation "st->startup_time * adc_clk_khz" will out of u32.

In this patch, it will use khz unit for adc_clk, that avoids above problem.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
---
 drivers/iio/adc/at91_adc.c |   11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

Comments

Maxime Ripard July 15, 2013, 12:52 p.m. UTC | #1
Hi Josh,

On Sun, Jul 14, 2013 at 04:04:25PM +0800, Josh Wu wrote:
> for example, if adc_clk is 20Mhz and start-up time set as larger than 215us.
> then the calculation "st->startup_time * adc_clk_khz" will out of u32.
> 
> In this patch, it will use khz unit for adc_clk, that avoids above problem.
> 
> Signed-off-by: Josh Wu <josh.wu@atmel.com>

Maybe we can have a slightly better commit log here, like:

------8<-----------
iio: at91: Fix adc_clk overflow

The adc_clk variable is currently defined using a 32-bits unsigned
integer, which will overflow under some very valid range of operations.

Such overflow will occur if, for example, the parent clock is set to a
20MHz frequency and the ADC startup time is larger than 215ns.

To fix this, introduce an intermediate variable holding the clock rate
in kHz.

--------8<---------------

Or something like that.

For the patch itself, I'm happy about it. You can add my Acked-by.

Thanks!
Maxime
Josh Wu July 16, 2013, 7:54 a.m. UTC | #2
Hi, Maxime

On 7/15/2013 8:52 PM, Maxime Ripard wrote:
> Hi Josh,
>
> On Sun, Jul 14, 2013 at 04:04:25PM +0800, Josh Wu wrote:
>> for example, if adc_clk is 20Mhz and start-up time set as larger than 215us.
>> then the calculation "st->startup_time * adc_clk_khz" will out of u32.
>>
>> In this patch, it will use khz unit for adc_clk, that avoids above problem.
>>
>> Signed-off-by: Josh Wu <josh.wu@atmel.com>
> Maybe we can have a slightly better commit log here, like:
>
> ------8<-----------
> iio: at91: Fix adc_clk overflow
>
> The adc_clk variable is currently defined using a 32-bits unsigned
> integer, which will overflow under some very valid range of operations.
>
> Such overflow will occur if, for example, the parent clock is set to a
> 20MHz frequency and the ADC startup time is larger than 215ns.
>
> To fix this, introduce an intermediate variable holding the clock rate
> in kHz.
>
> --------8<---------------
>
> Or something like that.
>
> For the patch itself, I'm happy about it. You can add my Acked-by.

Thank you. Your commit log is better. I will fix the commit log base on 
your commit in next version.

>
> Thanks!
> Maxime
>

Best Regards,
Josh Wu
diff mbox

Patch

diff --git a/drivers/iio/adc/at91_adc.c b/drivers/iio/adc/at91_adc.c
index e5b88d5..18bd54f 100644
--- a/drivers/iio/adc/at91_adc.c
+++ b/drivers/iio/adc/at91_adc.c
@@ -582,7 +582,7 @@  static const struct iio_info at91_adc_info = {
 
 static int at91_adc_probe(struct platform_device *pdev)
 {
-	unsigned int prsc, mstrclk, ticks, adc_clk, shtim;
+	unsigned int prsc, mstrclk, ticks, adc_clk, adc_clk_khz, shtim;
 	int ret;
 	struct iio_dev *idev;
 	struct at91_adc_state *st;
@@ -680,6 +680,7 @@  static int at91_adc_probe(struct platform_device *pdev)
 	 */
 	mstrclk = clk_get_rate(st->clk);
 	adc_clk = clk_get_rate(st->adc_clk);
+	adc_clk_khz = adc_clk / 1000;
 	prsc = (mstrclk / (2 * adc_clk)) - 1;
 
 	if (!st->startup_time) {
@@ -693,15 +694,15 @@  static int at91_adc_probe(struct platform_device *pdev)
 	 * defined in the electrical characteristics of the board, divided by 8.
 	 * The formula thus is : Startup Time = (ticks + 1) * 8 / ADC Clock
 	 */
-	ticks = round_up((st->startup_time * adc_clk /
-			  1000000) - 1, 8) / 8;
+	ticks = round_up((st->startup_time * adc_clk_khz /
+			  1000) - 1, 8) / 8;
 	/*
 	 * a minimal Sample and Hold Time is necessary for the ADC to guarantee
 	 * the best converted final value between two channels selection
 	 * The formula thus is : Sample and Hold Time = (shtim + 1) / ADCClock
 	 */
-	shtim = round_up((st->sample_hold_time * adc_clk /
-			  1000000) - 1, 1);
+	shtim = round_up((st->sample_hold_time * adc_clk_khz /
+			  1000) - 1, 1);
 
 	reg = AT91_ADC_PRESCAL_(prsc) & AT91_ADC_PRESCAL;
 	reg |= AT91_ADC_STARTUP_(ticks) & AT91_ADC_STARTUP;