| Message ID | 5201EA4D.8030106@overkiz.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 13-08-07 02:33 AM, boris brezillon wrote: > Hello Doug, > > On 07/08/2013 02:32, Douglas Gilbert wrote: >> Between lk 3.10.0 and lk 3.11.0-rc4 the uarts (not usarts) >> have been broken in the at91sam9x5 family. The DT files have >> been re-factored for uarts but look correct. >> >> So suspicion moves to the atmel_serial driver which enjoyed >> a lot of changes in June. >> > > My patch (the last one in log history) is adding error checks on clk_get and > clk_enable (clk_prepare_enable) calls. > I think the issue you're having comes from these new checks, and the fact > that uart clks DT entries are missing. > > The previous version was just silently ignoring these errors. > It may work if these clks (uart clks) are already enabled by bootstrap or > bootloader. > > Anyway, I think the cleaner way for resolving this issue is to apply the patch > I joined in attachment. > > Could you test it (I don't have any sam9x5 boards), and if this works I'll submit > it. Hi Boris, Yes, your patch works with lk 3.11.0-rc4 on a at91sam9g25 (aria G25). So please apply to the current rc series. Also since in the lk 3.10 series this is silently broken and/or works by accident (e.g. when a boot loader sets the uart clocks) then perhaps this fix should be sent to Greg K-H for inclusion in the lk 3.10.x stable series. Doug Gilbert >> Tested on a at91sam9g25 (Aria G25) which is a member of the >> at91sam9x5 family with two uarts (four usarts and a debug >> serial port). The failure looks like this in dmesg: >> >> console [ttyS0] enabled >> f801c000.serial: ttyS1 at MMIO 0xf801c000 (irq = 23) is a ATMEL_SERIAL >> f8020000.serial: ttyS2 at MMIO 0xf8020000 (irq = 24) is a ATMEL_SERIAL >> f8024000.serial: ttyS3 at MMIO 0xf8024000 (irq = 25) is a ATMEL_SERIAL >> atmel_usart: probe of f8040000.serial failed with error -2 >> f8028000.serial: ttyS4 at MMIO 0xf8028000 (irq = 32) is a ATMEL_SERIAL >> >> The device at 0xf8040000 is uart0 . My DT file was trying >> to bring up uart0 but not uart1. >> >> Doug Gilbert >
From f8e4996c7e3d99d9b4c76fc579b1aa66e71f08bf Mon Sep 17 00:00:00 2001 From: Boris BREZILLON <b.brezillon@overkiz.com> Date: Wed, 7 Aug 2013 08:16:15 +0200 Subject: [PATCH] ARM: at91: add missing uart clocks DT entries Add clocks to clock lookup table for uart DT entries. Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com> --- arch/arm/mach-at91/at91sam9x5.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c index 2abee66..916e5a1 100644 --- a/arch/arm/mach-at91/at91sam9x5.c +++ b/arch/arm/mach-at91/at91sam9x5.c @@ -227,6 +227,8 @@ static struct clk_lookup periph_clocks_lookups[] = { CLKDEV_CON_DEV_ID("usart", "f8020000.serial", &usart1_clk), CLKDEV_CON_DEV_ID("usart", "f8024000.serial", &usart2_clk), CLKDEV_CON_DEV_ID("usart", "f8028000.serial", &usart3_clk), + CLKDEV_CON_DEV_ID("usart", "f8040000.serial", &uart0_clk), + CLKDEV_CON_DEV_ID("usart", "f8044000.serial", &uart1_clk), CLKDEV_CON_DEV_ID("t0_clk", "f8008000.timer", &tcb0_clk), CLKDEV_CON_DEV_ID("t0_clk", "f800c000.timer", &tcb0_clk), CLKDEV_CON_DEV_ID("mci_clk", "f0008000.mmc", &mmc0_clk), -- 1.7.9.5