diff mbox

drm/i915: Use POSTING_READ in lcpll code

Message ID 1377121088-14467-1-git-send-email-daniel.vetter@ffwll.ch (mailing list archive)
State New, archived
Headers show

Commit Message

Daniel Vetter Aug. 21, 2013, 9:38 p.m. UTC
If we don't use the return value of a mmio read our coding style is to
use the POSTING_READ macro. This avoids cluttering the mmio traces.

While at it add the missing posting read in the lcpll enable function
that Paulo spotted.

v2: Drop the _NOTRACE changes, tracing such wait_for loops in the modeset
code might actually be rather useful!

Cc: Paulo Zanoni <przanoni@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/gpu/drm/i915/intel_display.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Comments

Paulo Zanoni Aug. 21, 2013, 9:49 p.m. UTC | #1
2013/8/21 Daniel Vetter <daniel.vetter@ffwll.ch>:
> If we don't use the return value of a mmio read our coding style is to
> use the POSTING_READ macro. This avoids cluttering the mmio traces.
>
> While at it add the missing posting read in the lcpll enable function
> that Paulo spotted.
>
> v2: Drop the _NOTRACE changes, tracing such wait_for loops in the modeset
> code might actually be rather useful!
>
> Cc: Paulo Zanoni <przanoni@gmail.com>
> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

> ---
>  drivers/gpu/drm/i915/intel_display.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 7a40427..937fc5a6 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -6036,13 +6036,14 @@ void hsw_restore_lcpll(struct drm_i915_private *dev_priv)
>         if (val & LCPLL_POWER_DOWN_ALLOW) {
>                 val &= ~LCPLL_POWER_DOWN_ALLOW;
>                 I915_WRITE(LCPLL_CTL, val);
> +               POSTING_READ(LCPLL_CTL);
>         }
>
>         val = I915_READ(D_COMP);
>         val |= D_COMP_COMP_FORCE;
>         val &= ~D_COMP_COMP_DISABLE;
>         I915_WRITE(D_COMP, val);
> -       I915_READ(D_COMP);
> +       POSTING_READ(D_COMP);
>
>         val = I915_READ(LCPLL_CTL);
>         val &= ~LCPLL_PLL_DISABLE;
> --
> 1.8.4.rc3
>
Daniel Vetter Aug. 22, 2013, 2:14 p.m. UTC | #2
On Wed, Aug 21, 2013 at 06:49:31PM -0300, Paulo Zanoni wrote:
> 2013/8/21 Daniel Vetter <daniel.vetter@ffwll.ch>:
> > If we don't use the return value of a mmio read our coding style is to
> > use the POSTING_READ macro. This avoids cluttering the mmio traces.
> >
> > While at it add the missing posting read in the lcpll enable function
> > that Paulo spotted.
> >
> > v2: Drop the _NOTRACE changes, tracing such wait_for loops in the modeset
> > code might actually be rather useful!
> >
> > Cc: Paulo Zanoni <przanoni@gmail.com>
> > Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> 
> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

Queued for -next, thanks for the review.
-Daniel
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 7a40427..937fc5a6 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6036,13 +6036,14 @@  void hsw_restore_lcpll(struct drm_i915_private *dev_priv)
 	if (val & LCPLL_POWER_DOWN_ALLOW) {
 		val &= ~LCPLL_POWER_DOWN_ALLOW;
 		I915_WRITE(LCPLL_CTL, val);
+		POSTING_READ(LCPLL_CTL);
 	}
 
 	val = I915_READ(D_COMP);
 	val |= D_COMP_COMP_FORCE;
 	val &= ~D_COMP_COMP_DISABLE;
 	I915_WRITE(D_COMP, val);
-	I915_READ(D_COMP);
+	POSTING_READ(D_COMP);
 
 	val = I915_READ(LCPLL_CTL);
 	val &= ~LCPLL_PLL_DISABLE;