[RFC,v1,6/9] arm: dts: keystone: add GPIO device entry

Commit Message

Grygorii Strashko Nov. 26, 2013, 7:40 p.m. UTC

This patch adds Keystone GPIO IP device definitions in DT which supports
up to 32 GPIO lines and each GPIO line can be configured as separate
interrupt source (so called "unbanked" IRQ).

For more information see:
 http://www.ti.com/lit/ug/sprugv1/sprugv1.pdf

Signed-off-by: Grygorii Strashko <[e-mail]>
---
 arch/arm/boot/dts/keystone.dtsi |   45 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 45 insertions(+)

Comments

Santosh Shilimkar Nov. 29, 2013, 4:40 p.m. UTC | #1

On Tuesday 26 November 2013 02:40 PM, Grygorii Strashko wrote:
> This patch adds Keystone GPIO IP device definitions in DT which supports
> up to 32 GPIO lines and each GPIO line can be configured as separate
> interrupt source (so called "unbanked" IRQ).
> 
> For more information see:
>  http://www.ti.com/lit/ug/sprugv1/sprugv1.pdf
> 
> Signed-off-by: Grygorii Strashko <[e-mail]>
> ---
>  arch/arm/boot/dts/keystone.dtsi |   45 +++++++++++++++++++++++++++++++++++++++
>  1 file changed, 45 insertions(+)
> 
Patch 6/9, 7/9, 8/9 and 9/9 needs to be in
a separate series. They all good to me and I
will take them once the GPIO driver re-use gets
sorted out.

Regards,
Santosh

Patch

diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
index f6d6d9e..6e93bf5 100644
--- a/arch/arm/boot/dts/keystone.dtsi
+++ b/arch/arm/boot/dts/keystone.dtsi
@@ -7,6 +7,7 @@ 
  */
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/gpio/gpio.h>
 
 #include "skeleton.dtsi"
 
@@ -181,5 +182,49 @@ 
 			interrupts = <GIC_SPI 300 IRQ_TYPE_EDGE_RISING>;
 			clocks = <&clkspi>;
 		};
+
+		gpio0: gpio@260bf00 {
+				compatible = "ti,keystone-gpio";
+				reg = <0x0260bf00 0x100>;
+				gpio-controller;
+				#gpio-cells = <2>;
+				/* HW Interrupts mapped to GPIO pins */
+				interrupts = <GIC_SPI 120 IRQ_TYPE_EDGE_RISING
+							  GIC_SPI 121 IRQ_TYPE_EDGE_RISING
+							  GIC_SPI 122 IRQ_TYPE_EDGE_RISING
+							  GIC_SPI 123 IRQ_TYPE_EDGE_RISING
+							  GIC_SPI 124 IRQ_TYPE_EDGE_RISING
+							  GIC_SPI 125 IRQ_TYPE_EDGE_RISING
+							  GIC_SPI 126 IRQ_TYPE_EDGE_RISING
+							  GIC_SPI 127 IRQ_TYPE_EDGE_RISING
+							  GIC_SPI 128 IRQ_TYPE_EDGE_RISING
+							  GIC_SPI 129 IRQ_TYPE_EDGE_RISING
+							  GIC_SPI 130 IRQ_TYPE_EDGE_RISING
+							  GIC_SPI 131 IRQ_TYPE_EDGE_RISING
+							  GIC_SPI 132 IRQ_TYPE_EDGE_RISING
+							  GIC_SPI 133 IRQ_TYPE_EDGE_RISING
+							  GIC_SPI 134 IRQ_TYPE_EDGE_RISING
+							  GIC_SPI 135 IRQ_TYPE_EDGE_RISING
+							  GIC_SPI 136 IRQ_TYPE_EDGE_RISING
+							  GIC_SPI 137 IRQ_TYPE_EDGE_RISING
+							  GIC_SPI 138 IRQ_TYPE_EDGE_RISING
+							  GIC_SPI 139 IRQ_TYPE_EDGE_RISING
+							  GIC_SPI 140 IRQ_TYPE_EDGE_RISING
+							  GIC_SPI 141 IRQ_TYPE_EDGE_RISING
+							  GIC_SPI 142 IRQ_TYPE_EDGE_RISING
+							  GIC_SPI 143 IRQ_TYPE_EDGE_RISING
+							  GIC_SPI 144 IRQ_TYPE_EDGE_RISING
+							  GIC_SPI 145 IRQ_TYPE_EDGE_RISING
+							  GIC_SPI 146 IRQ_TYPE_EDGE_RISING
+							  GIC_SPI 147 IRQ_TYPE_EDGE_RISING
+							  GIC_SPI 148 IRQ_TYPE_EDGE_RISING
+							  GIC_SPI 149 IRQ_TYPE_EDGE_RISING
+							  GIC_SPI 150 IRQ_TYPE_EDGE_RISING
+							  GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
+				clocks = <&clkgpio>;
+				clock-names = "gpio";
+				ti,ngpio = <32>;
+				ti,davinci-gpio-unbanked = <32>;
+		};
 	};
 };