Message ID | 1386373528-13045-2-git-send-email-tim.kryger@linaro.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Fri, Dec 6, 2013 at 3:45 PM, Tim Kryger <tim.kryger@linaro.org> wrote: > Add the DTS nodes for all the i2c busses in the SoC. > > Signed-off-by: Tim Kryger <tim.kryger@linaro.org> > Reviewed-by: Christian Daudt <csd@broadcom.com> > Reviewed-by: Matt Porter <matt.porter@linaro.org> > Reviewed-by: Markus Mayer <markus.mayer@linaro.org> > --- > arch/arm/boot/dts/bcm11351.dtsi | 40 ++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 40 insertions(+) > > diff --git a/arch/arm/boot/dts/bcm11351.dtsi b/arch/arm/boot/dts/bcm11351.dtsi > index 1246885..4bfd7e3 100644 > --- a/arch/arm/boot/dts/bcm11351.dtsi > +++ b/arch/arm/boot/dts/bcm11351.dtsi > @@ -146,6 +146,46 @@ > status = "disabled"; > }; > > + i2c@3e016000 { > + compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c"; > + reg = <0x3e016000 0x80>; > + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + clocks = <&bsc1_clk>; > + status = "disabled"; > + }; > + > + i2c@3e017000 { > + compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c"; > + reg = <0x3e017000 0x80>; > + interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + clocks = <&bsc2_clk>; > + status = "disabled"; > + }; > + > + i2c@3e018000 { > + compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c"; > + reg = <0x3e018000 0x80>; > + interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + clocks = <&bsc3_clk>; > + status = "disabled"; > + }; > + > + i2c@3500d000 { > + compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c"; > + reg = <0x3500d000 0x80>; > + interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + clocks = <&pmu_bsc_clk>; > + status = "disabled"; > + }; > + > clocks { > bsc1_clk: bsc1 { > compatible = "fixed-clock"; > -- > 1.8.0.1 > Applied to armsoc/for-3.14/dt thanks, csd
diff --git a/arch/arm/boot/dts/bcm11351.dtsi b/arch/arm/boot/dts/bcm11351.dtsi index 1246885..4bfd7e3 100644 --- a/arch/arm/boot/dts/bcm11351.dtsi +++ b/arch/arm/boot/dts/bcm11351.dtsi @@ -146,6 +146,46 @@ status = "disabled"; }; + i2c@3e016000 { + compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c"; + reg = <0x3e016000 0x80>; + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&bsc1_clk>; + status = "disabled"; + }; + + i2c@3e017000 { + compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c"; + reg = <0x3e017000 0x80>; + interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&bsc2_clk>; + status = "disabled"; + }; + + i2c@3e018000 { + compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c"; + reg = <0x3e018000 0x80>; + interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&bsc3_clk>; + status = "disabled"; + }; + + i2c@3500d000 { + compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c"; + reg = <0x3500d000 0x80>; + interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&pmu_bsc_clk>; + status = "disabled"; + }; + clocks { bsc1_clk: bsc1 { compatible = "fixed-clock";