diff mbox

[0/4] OMAPDSS: DT support for N900 panel

Message ID 20131218215536.GA23674@earth.universe (mailing list archive)
State New, archived
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Commit Message

Sebastian Reichel Dec. 18, 2013, 9:55 p.m. UTC 
On Tue, Dec 17, 2013 at 07:29:34PM +0200, Tomi Valkeinen wrote:
> >> I added N900 display DT support on top of my v2 series, including
> >> pinmuxing. Can you check if it looks right and works?
> >>
> >> git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux.git work/dss-dt
> > 
> > I just tried it and it does not work. On a first look the pinmuxing
> > looks fishy: 0x0d4 is muxed two times.
> 
> Hmm, so it is.
> 
> I'm not really familiar with SDI, I just muxed all the SDI pins, except
> datapair3. I previously thought that there's only the data and clock
> pairs for SDI, but the TRM revealed more sdi pins, so I included them.
> It is well possible that these can be removed:
> 
> 0x0d0 (PIN_OUTPUT | MUX_MODE1)   /* dss_data18.sdi_vsync */
> 0x0d2 (PIN_OUTPUT | MUX_MODE1)   /* dss_data19.sdi_hsync */
> 0x0d4 (PIN_OUTPUT | MUX_MODE1)   /* dss_data20.sdi_den */
> 0x0d6 (PIN_OUTPUT | MUX_MODE1)   /* dss_data21.sdi_stp */

Just removing the dss_data20.sdi_den pin was enough to get a working display. I
don't know if the other pins are needed, because the display pins are already
muxed correctly by the bootloader.

-- Sebastian

Comments

Sebastian Reichel Dec. 19, 2013, 12:51 a.m. UTC | #1 
On Wed, Dec 18, 2013 at 10:55:37PM +0100, Sebastian Reichel wrote:
> On Tue, Dec 17, 2013 at 07:29:34PM +0200, Tomi Valkeinen wrote:
> > >> I added N900 display DT support on top of my v2 series, including
> > >> pinmuxing. Can you check if it looks right and works?
> > >>
> > >> git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux.git work/dss-dt
> > > 
> > > I just tried it and it does not work. On a first look the pinmuxing
> > > looks fishy: 0x0d4 is muxed two times.
> > 
> > Hmm, so it is.
> > 
> > I'm not really familiar with SDI, I just muxed all the SDI pins, except
> > datapair3. I previously thought that there's only the data and clock
> > pairs for SDI, but the TRM revealed more sdi pins, so I included them.
> > It is well possible that these can be removed:
> > 
> > 0x0d0 (PIN_OUTPUT | MUX_MODE1)   /* dss_data18.sdi_vsync */
> > 0x0d2 (PIN_OUTPUT | MUX_MODE1)   /* dss_data19.sdi_hsync */
> > 0x0d4 (PIN_OUTPUT | MUX_MODE1)   /* dss_data20.sdi_den */
> > 0x0d6 (PIN_OUTPUT | MUX_MODE1)   /* dss_data21.sdi_stp */
> 
> Just removing the dss_data20.sdi_den pin was enough to get a working display. I
> don't know if the other pins are needed, because the display pins are already
> muxed correctly by the bootloader.

I just had a look in the leaked n900 schematics. According to it the
following pins are connected to the display:

DSS_DATA20 (E28)     GPIO 90         LCD_RST
DSS_DATA10 (AD28)    SDI_DAT1N       CDP 0
DSS_DATA11 (AD27)    SDI_DAT1P       CDP 1
DSS_DATA12 (AB28)    SDI_DAT2N       CDP 2
DSS_DATA13 (AB27)    SDI_DAT2P       CDP 3
DSS_DATA14 (AA28)    SDI_DAT3N       CDP 4
DSS_DATA15 (AA27)    SDI_DAT3P       CDP 5
DSS_DATA22 (AC27)    SDI_CLKP        CDP 6
DSS_DATA23 (AC28)    SDI_CLKN        CDP 7

I also noticed that dss_data19.sdi_hsync is used as gpio 89 for the
N900's proximity sensor. Thus I suggest the following SDI pin muxing:

	dss_sdi_pins: pinmux_dss_sdi_pins {
		pinctrl-single,pins = <
			0x0c0 (PIN_OUTPUT | MUX_MODE1)   /* dss_data10.sdi_dat1n */
			0x0c2 (PIN_OUTPUT | MUX_MODE1)   /* dss_data11.sdi_dat1p */
			0x0c4 (PIN_OUTPUT | MUX_MODE1)   /* dss_data12.sdi_dat2n */
			0x0c6 (PIN_OUTPUT | MUX_MODE1)   /* dss_data13.sdi_dat2p */
			0x0c8 (PIN_OUTPUT | MUX_MODE1)   /* dss_data14.sdi_dat3n */
			0x0ca (PIN_OUTPUT | MUX_MODE1)   /* dss_data15.sdi_dat3p */

			0x0d8 (PIN_OUTPUT | MUX_MODE1)   /* dss_data22.sdi_clkp */
			0x0da (PIN_OUTPUT | MUX_MODE1)   /* dss_data23.sdi_clkn */
		>;
	};

-- Sebastian
Tomi Valkeinen Dec. 19, 2013, 5:30 a.m. UTC | #2 
On 2013-12-19 02:51, Sebastian Reichel wrote:
> On Wed, Dec 18, 2013 at 10:55:37PM +0100, Sebastian Reichel wrote:
>> On Tue, Dec 17, 2013 at 07:29:34PM +0200, Tomi Valkeinen wrote:
>>>>> I added N900 display DT support on top of my v2 series, including
>>>>> pinmuxing. Can you check if it looks right and works?
>>>>>
>>>>> git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux.git work/dss-dt
>>>>
>>>> I just tried it and it does not work. On a first look the pinmuxing
>>>> looks fishy: 0x0d4 is muxed two times.
>>>
>>> Hmm, so it is.
>>>
>>> I'm not really familiar with SDI, I just muxed all the SDI pins, except
>>> datapair3. I previously thought that there's only the data and clock
>>> pairs for SDI, but the TRM revealed more sdi pins, so I included them.
>>> It is well possible that these can be removed:
>>>
>>> 0x0d0 (PIN_OUTPUT | MUX_MODE1)   /* dss_data18.sdi_vsync */
>>> 0x0d2 (PIN_OUTPUT | MUX_MODE1)   /* dss_data19.sdi_hsync */
>>> 0x0d4 (PIN_OUTPUT | MUX_MODE1)   /* dss_data20.sdi_den */
>>> 0x0d6 (PIN_OUTPUT | MUX_MODE1)   /* dss_data21.sdi_stp */
>>
>> Just removing the dss_data20.sdi_den pin was enough to get a working display. I
>> don't know if the other pins are needed, because the display pins are already
>> muxed correctly by the bootloader.
> 
> I just had a look in the leaked n900 schematics. According to it the
> following pins are connected to the display:
> 
> DSS_DATA20 (E28)     GPIO 90         LCD_RST
> DSS_DATA10 (AD28)    SDI_DAT1N       CDP 0
> DSS_DATA11 (AD27)    SDI_DAT1P       CDP 1
> DSS_DATA12 (AB28)    SDI_DAT2N       CDP 2
> DSS_DATA13 (AB27)    SDI_DAT2P       CDP 3
> DSS_DATA14 (AA28)    SDI_DAT3N       CDP 4
> DSS_DATA15 (AA27)    SDI_DAT3P       CDP 5
> DSS_DATA22 (AC27)    SDI_CLKP        CDP 6
> DSS_DATA23 (AC28)    SDI_CLKN        CDP 7
> 
> I also noticed that dss_data19.sdi_hsync is used as gpio 89 for the
> N900's proximity sensor. Thus I suggest the following SDI pin muxing:
> 
> 	dss_sdi_pins: pinmux_dss_sdi_pins {
> 		pinctrl-single,pins = <
> 			0x0c0 (PIN_OUTPUT | MUX_MODE1)   /* dss_data10.sdi_dat1n */
> 			0x0c2 (PIN_OUTPUT | MUX_MODE1)   /* dss_data11.sdi_dat1p */
> 			0x0c4 (PIN_OUTPUT | MUX_MODE1)   /* dss_data12.sdi_dat2n */
> 			0x0c6 (PIN_OUTPUT | MUX_MODE1)   /* dss_data13.sdi_dat2p */
> 			0x0c8 (PIN_OUTPUT | MUX_MODE1)   /* dss_data14.sdi_dat3n */
> 			0x0ca (PIN_OUTPUT | MUX_MODE1)   /* dss_data15.sdi_dat3p */
> 
> 			0x0d8 (PIN_OUTPUT | MUX_MODE1)   /* dss_data22.sdi_clkp */
> 			0x0da (PIN_OUTPUT | MUX_MODE1)   /* dss_data23.sdi_clkn */
> 		>;
> 	};

Thanks, I'll do the modifications. The dat3 lines are not needed, but if
they're connected to the panel, I don't see any harm in muxing them.

Although, makes me wonder. If the panel supports only 2 datalanes, why
does it have connectors for 3? And if it supports 3, why would N900 use
only 2?

Are you able to check if the bootloader muxes dat3 to SDI mode?

 Tomi
Sebastian Reichel Dec. 19, 2013, 10:08 a.m. UTC | #3 
On Thu, Dec 19, 2013 at 07:30:50AM +0200, Tomi Valkeinen wrote:
> On 2013-12-19 02:51, Sebastian Reichel wrote:
> > On Wed, Dec 18, 2013 at 10:55:37PM +0100, Sebastian Reichel wrote:
> >> On Tue, Dec 17, 2013 at 07:29:34PM +0200, Tomi Valkeinen wrote:
> >>>>> I added N900 display DT support on top of my v2 series, including
> >>>>> pinmuxing. Can you check if it looks right and works?
> >>>>>
> >>>>> git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux.git work/dss-dt
> >>>>
> >>>> I just tried it and it does not work. On a first look the pinmuxing
> >>>> looks fishy: 0x0d4 is muxed two times.
> >>>
> >>> Hmm, so it is.
> >>>
> >>> I'm not really familiar with SDI, I just muxed all the SDI pins, except
> >>> datapair3. I previously thought that there's only the data and clock
> >>> pairs for SDI, but the TRM revealed more sdi pins, so I included them.
> >>> It is well possible that these can be removed:
> >>>
> >>> 0x0d0 (PIN_OUTPUT | MUX_MODE1)   /* dss_data18.sdi_vsync */
> >>> 0x0d2 (PIN_OUTPUT | MUX_MODE1)   /* dss_data19.sdi_hsync */
> >>> 0x0d4 (PIN_OUTPUT | MUX_MODE1)   /* dss_data20.sdi_den */
> >>> 0x0d6 (PIN_OUTPUT | MUX_MODE1)   /* dss_data21.sdi_stp */
> >>
> >> Just removing the dss_data20.sdi_den pin was enough to get a working display. I
> >> don't know if the other pins are needed, because the display pins are already
> >> muxed correctly by the bootloader.
> > 
> > I just had a look in the leaked n900 schematics. According to it the
> > following pins are connected to the display:
> > 
> > DSS_DATA20 (E28)     GPIO 90         LCD_RST
> > DSS_DATA10 (AD28)    SDI_DAT1N       CDP 0
> > DSS_DATA11 (AD27)    SDI_DAT1P       CDP 1
> > DSS_DATA12 (AB28)    SDI_DAT2N       CDP 2
> > DSS_DATA13 (AB27)    SDI_DAT2P       CDP 3
> > DSS_DATA14 (AA28)    SDI_DAT3N       CDP 4
> > DSS_DATA15 (AA27)    SDI_DAT3P       CDP 5
> > DSS_DATA22 (AC27)    SDI_CLKP        CDP 6
> > DSS_DATA23 (AC28)    SDI_CLKN        CDP 7
> > 
> > I also noticed that dss_data19.sdi_hsync is used as gpio 89 for the
> > N900's proximity sensor. Thus I suggest the following SDI pin muxing:
> > 
> > 	dss_sdi_pins: pinmux_dss_sdi_pins {
> > 		pinctrl-single,pins = <
> > 			0x0c0 (PIN_OUTPUT | MUX_MODE1)   /* dss_data10.sdi_dat1n */
> > 			0x0c2 (PIN_OUTPUT | MUX_MODE1)   /* dss_data11.sdi_dat1p */
> > 			0x0c4 (PIN_OUTPUT | MUX_MODE1)   /* dss_data12.sdi_dat2n */
> > 			0x0c6 (PIN_OUTPUT | MUX_MODE1)   /* dss_data13.sdi_dat2p */
> > 			0x0c8 (PIN_OUTPUT | MUX_MODE1)   /* dss_data14.sdi_dat3n */
> > 			0x0ca (PIN_OUTPUT | MUX_MODE1)   /* dss_data15.sdi_dat3p */
> > 
> > 			0x0d8 (PIN_OUTPUT | MUX_MODE1)   /* dss_data22.sdi_clkp */
> > 			0x0da (PIN_OUTPUT | MUX_MODE1)   /* dss_data23.sdi_clkn */
> > 		>;
> > 	};
> 
> Thanks, I'll do the modifications. The dat3 lines are not needed, but if
> they're connected to the panel, I don't see any harm in muxing them.
> 
> Although, makes me wonder. If the panel supports only 2 datalanes, why
> does it have connectors for 3? And if it supports 3, why would N900 use
> only 2?

I wondered about the same and I also assumed, that the muxing should be
safe.

> Are you able to check if the bootloader muxes dat3 to SDI mode?

The bootloader's source code is not available as far as i know.

I tried to cat /sys/kernel/debug/pinctrl/48002030.pinmux/pins, but I
get an external abort on non-linefetch.

So I can't check it :(

-- Sebastian
Sebastian Reichel Dec. 19, 2013, 1:56 p.m. UTC | #4 
On Thu, Dec 19, 2013 at 11:08:40AM +0100, Sebastian Reichel wrote:
> > Are you able to check if the bootloader muxes dat3 to SDI mode?
> 
> The bootloader's source code is not available as far as i know.
> 
> [...], but I get an external abort on non-linefetch.
> So I can't check it :(

Ok. This is fixed by applying [0] (Thanks for the hint, Tomi!).
This is the mux configuration from the bootloader:

...
pin 96 (480020f0.0) 00000001 pinctrl-single     // sdi dat1n
pin 97 (480020f2.0) 00000001 pinctrl-single     // sdi dat1p
pin 98 (480020f4.0) 00000001 pinctrl-single     // sdi dat2n
pin 99 (480020f6.0) 00000001 pinctrl-single     // sdi dat2p
pin 100 (480020f8.0) 00000007 pinctrl-single    // sdi dat3n
pin 101 (480020fa.0) 00000007 pinctrl-single    // sdi dat3p
pin 102 (480020fc.0) 00000004 pinctrl-single 
pin 103 (480020fe.0) 00000004 pinctrl-single 
pin 104 (48002100.0) 00000004 pinctrl-single    // sdi vsync
pin 105 (48002102.0) 00004104 pinctrl-single    // sdi hsync
pin 106 (48002104.0) 00000004 pinctrl-single    // sdi den
pin 107 (48002106.0) 00000004 pinctrl-single    // sdi stp
pin 108 (48002108.0) 00000001 pinctrl-single    // sdi clkp
pin 109 (4800210a.0) 00000001 pinctrl-single    // sdi clkn
...

I guess the following entry should be added to the omap3-n900.dts file:

	dss_sdi_pins: pinmux_dss_sdi_pins {
		pinctrl-single,pins = <
			0x0c0 (PIN_OUTPUT | MUX_MODE1)   /* dss_data10.sdi_dat1n */
			0x0c2 (PIN_OUTPUT | MUX_MODE1)   /* dss_data11.sdi_dat1p */
			0x0c4 (PIN_OUTPUT | MUX_MODE1)   /* dss_data12.sdi_dat2n */
			0x0c6 (PIN_OUTPUT | MUX_MODE1)   /* dss_data13.sdi_dat2p */
			0x0d8 (PIN_OUTPUT | MUX_MODE1)   /* dss_data22.sdi_clkp */
			0x0da (PIN_OUTPUT | MUX_MODE1)   /* dss_data23.sdi_clkn */
		>;
	};

[0] https://patchwork.kernel.org/patch/3283781/

-- Sebastian
Tony Lindgren Dec. 19, 2013, 4:42 p.m. UTC | #5 
* Sebastian Reichel <sre@debian.org> [131219 05:57]:
> On Thu, Dec 19, 2013 at 11:08:40AM +0100, Sebastian Reichel wrote:
> > > Are you able to check if the bootloader muxes dat3 to SDI mode?
> > 
> > The bootloader's source code is not available as far as i know.
> > 
> > [...], but I get an external abort on non-linefetch.
> > So I can't check it :(
> 
> Ok. This is fixed by applying [0] (Thanks for the hint, Tomi!).
> This is the mux configuration from the bootloader:
> 
> ...
> pin 96 (480020f0.0) 00000001 pinctrl-single     // sdi dat1n
> pin 97 (480020f2.0) 00000001 pinctrl-single     // sdi dat1p
> pin 98 (480020f4.0) 00000001 pinctrl-single     // sdi dat2n
> pin 99 (480020f6.0) 00000001 pinctrl-single     // sdi dat2p
> pin 100 (480020f8.0) 00000007 pinctrl-single    // sdi dat3n
> pin 101 (480020fa.0) 00000007 pinctrl-single    // sdi dat3p
> pin 102 (480020fc.0) 00000004 pinctrl-single 
> pin 103 (480020fe.0) 00000004 pinctrl-single 
> pin 104 (48002100.0) 00000004 pinctrl-single    // sdi vsync
> pin 105 (48002102.0) 00004104 pinctrl-single    // sdi hsync
> pin 106 (48002104.0) 00000004 pinctrl-single    // sdi den
> pin 107 (48002106.0) 00000004 pinctrl-single    // sdi stp
> pin 108 (48002108.0) 00000001 pinctrl-single    // sdi clkp
> pin 109 (4800210a.0) 00000001 pinctrl-single    // sdi clkn
> ...
> 
> I guess the following entry should be added to the omap3-n900.dts file:
> 
> 	dss_sdi_pins: pinmux_dss_sdi_pins {
> 		pinctrl-single,pins = <
> 			0x0c0 (PIN_OUTPUT | MUX_MODE1)   /* dss_data10.sdi_dat1n */
> 			0x0c2 (PIN_OUTPUT | MUX_MODE1)   /* dss_data11.sdi_dat1p */
> 			0x0c4 (PIN_OUTPUT | MUX_MODE1)   /* dss_data12.sdi_dat2n */
> 			0x0c6 (PIN_OUTPUT | MUX_MODE1)   /* dss_data13.sdi_dat2p */
> 			0x0d8 (PIN_OUTPUT | MUX_MODE1)   /* dss_data22.sdi_clkp */
> 			0x0da (PIN_OUTPUT | MUX_MODE1)   /* dss_data23.sdi_clkn */
> 		>;
> 	};
> 
> [0] https://patchwork.kernel.org/patch/3283781/

Do we need to update Laurent's patch with this? Or can we use it as
it is and maybe you can ack it?

Regards,

Tony
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Sebastian Reichel Dec. 19, 2013, 5 p.m. UTC | #6 
On Thu, Dec 19, 2013 at 08:42:31AM -0800, Tony Lindgren wrote:
> * Sebastian Reichel <sre@debian.org> [131219 05:57]:
> > On Thu, Dec 19, 2013 at 11:08:40AM +0100, Sebastian Reichel wrote:
> > > > Are you able to check if the bootloader muxes dat3 to SDI mode?
> > > 
> > > The bootloader's source code is not available as far as i know.
> > > 
> > > [...], but I get an external abort on non-linefetch.
> > > So I can't check it :(
> > 
> > Ok. This is fixed by applying [0] (Thanks for the hint, Tomi!).
> > This is the mux configuration from the bootloader:
> > 
> > [...]
> > 
> > [0] https://patchwork.kernel.org/patch/3283781/
> 
> Do we need to update Laurent's patch with this?

No, the patch is only needed to avoid the mentioned external abort
on non-linefetch when doing "cat /sys/kernel/debug/pinctrl/.../pins".

> Or can we use it as it is and maybe you can ack it?

Sure. I will add an Ack.

-- Sebastian
diff mbox

Patch

diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index 39e5e50..33f29ac 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -163,7 +163,7 @@ 
 
                        0x0d0 (PIN_OUTPUT | MUX_MODE1)   /* dss_data18.sdi_vsync */
                        0x0d2 (PIN_OUTPUT | MUX_MODE1)   /* dss_data19.sdi_hsync */
-                       0x0d4 (PIN_OUTPUT | MUX_MODE1)   /* dss_data20.sdi_den */
+                       //0x0d4 (PIN_OUTPUT | MUX_MODE1)   /* dss_data20.sdi_den */
                        0x0d6 (PIN_OUTPUT | MUX_MODE1)   /* dss_data21.sdi_stp */
                        0x0d8 (PIN_OUTPUT | MUX_MODE1)   /* dss_data22.sdi_clkp */
                        0x0da (PIN_OUTPUT | MUX_MODE1)   /* dss_data23.sdi_clkn */