[2/6] ARM: tegra114: fuse: add DFLL FCPU minimum voltage override test function

Commit Message

Paul Walmsley Dec. 19, 2013, 12:36 p.m. UTC

Add a function to test the internal Tegra114 chip fuse that indicates
whether the VDD_CPU lower voltage limit for the fast CPU cluster
should be overridden.

Signed-off-by: Paul Walmsley <[e-mail]>
Cc: Stephen Warren <[e-mail]>
Cc: Thierry Reding <[e-mail]>
---
 arch/arm/mach-tegra/fuse.c |   26 ++++++++++++++++++++++++++
 include/linux/tegra-soc.h  |    2 ++
 2 files changed, 28 insertions(+)

Comments

Stephen Warren Dec. 19, 2013, 11:12 p.m. UTC | #1

On 12/19/2013 05:36 AM, Paul Walmsley wrote:
> Add a function to test the internal Tegra114 chip fuse that indicates
> whether the VDD_CPU lower voltage limit for the fast CPU cluster
> should be overridden.

> diff --git a/arch/arm/mach-tegra/fuse.c b/arch/arm/mach-tegra/fuse.c

> +bool tegra114_fuse_read_min_vdd_cpu_override(void)
> +{
> +	if (tegra_chip_id != TEGRA114)
> +		return -EINVAL;

-EINVAL doesn't translate to "bool" too well...

> +
> +	return tegra_spare_fuse(TEGRA114_SPARE_FUSE_VDD_CPU_OVERRIDE) ? true :
> +		false;

In the spirit of my comment on patch 1 and consistency, instead perhaps
just read this fuse at boot, and assign it to a global?

BTW, why the need for "? true : false" - doesn't the compiler do the
conversion correctly itself. Perhaps it's to avoid a performance
warning, in which case a leading !! seems to be more popular.

Patch

diff --git a/arch/arm/mach-tegra/fuse.c b/arch/arm/mach-tegra/fuse.c
index e3ca8abe858f..42477aa1b7e9 100644
--- a/arch/arm/mach-tegra/fuse.c
+++ b/arch/arm/mach-tegra/fuse.c
@@ -47,6 +47,15 @@ 
 #define TEGRA20_FUSE_SPARE_BIT		0x200
 #define TEGRA30_FUSE_SPARE_BIT		0x244
 
+/*
+ * TEGRA114_SPARE_FUSE_VDD_CPU_OVERRIDE: Spare eFuse ID that indicates
+ * whether the minimum VDD_CPU voltage level that the DFLL is
+ * characterized for should be overridden to 900mVdc.  If unset, the
+ * voltage shouldn't be overridden - it will be whatever has been
+ * selected by the CPU Speedo and process IDs.
+ */
+#define TEGRA114_SPARE_FUSE_VDD_CPU_OVERRIDE		61
+
 int tegra_sku_id;
 int tegra_cpu_process_id;
 int tegra_core_process_id;
@@ -265,3 +274,20 @@  int tegra_get_cpu_speedo_id(void)
 	return tegra_cpu_speedo_id;
 }
 EXPORT_SYMBOL(tegra_get_cpu_speedo_id);
+
+/**
+ * tegra114_fuse_read_min_vdd_cpu_override - override DFLL VDD_CPU minimum?
+ *
+ * Returns true if the minimum VDD_CPU voltage level that the DFLL is
+ * characterized for is 900mVdc.  If false, the minimum voltage should
+ * be whatever has been selected by the CPU Speedo and process IDs.
+ */
+bool tegra114_fuse_read_min_vdd_cpu_override(void)
+{
+	if (tegra_chip_id != TEGRA114)
+		return -EINVAL;
+
+	return tegra_spare_fuse(TEGRA114_SPARE_FUSE_VDD_CPU_OVERRIDE) ? true :
+		false;
+}
+EXPORT_SYMBOL(tegra114_fuse_read_min_vdd_cpu_override);
diff --git a/include/linux/tegra-soc.h b/include/linux/tegra-soc.h
index ec856fdf2ce7..fe2ab641555e 100644
--- a/include/linux/tegra-soc.h
+++ b/include/linux/tegra-soc.h
@@ -21,4 +21,6 @@  u32 tegra_read_chipid(void);
 int tegra_get_cpu_process_id(void);
 int tegra_get_cpu_speedo_id(void);
 
+bool tegra114_fuse_read_min_vdd_cpu_override(void);
+
 #endif /* __LINUX_TEGRA_SOC_H_ */