diff mbox

[2/2,v4] ARM: shmobile: Lager:add SPI FLASH support on QSPI

Message ID 1382408472-20315-3-git-send-email-cm-hiep@jinso.co.jp (mailing list archive)
State Accepted
Commit 24cf82f44213fe4d36157d9920b59420159616ec
Headers show

Commit Message

Cao Minh Hiep Oct. 22, 2013, 2:21 a.m. UTC
From: Hiep Cao Minh <cm-hiep@jinso.co.jp>

This patch enables Spansion S25FL512SAGMFIG11 chip on QSPI,
Add support for the QSPI interface on Lager.

Signed-off-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
---
 arch/arm/mach-shmobile/board-lager.c |   64 ++++++++++++++++++++++++++++++++++
 1 file changed, 64 insertions(+)

Comments

Simon Horman Oct. 30, 2013, 5:14 a.m. UTC | #1
On Tue, Oct 22, 2013 at 11:21:12AM +0900, Cao Minh Hiep wrote:
> From: Hiep Cao Minh <cm-hiep@jinso.co.jp>
> 
> This patch enables Spansion S25FL512SAGMFIG11 chip on QSPI,
> Add support for the QSPI interface on Lager.
> 
> Signed-off-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>

Hi,

yesterday I stated that I will queue this patch up.
Toady I would like to qualify that statement.

This patch makes use of the new 'num_chipselect' field of
struct rspi_plat_data. This is not present in v3.12-rc7 but
is present in linux-next. Thus I assume that it will
appear in v3.13-rc1. With this in mind I will queue-up
this patch after rebasing my branches on v3.13-rc1 once
it has been released.
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Simon Horman Nov. 28, 2013, 7:59 a.m. UTC | #2
On Wed, Oct 30, 2013 at 02:14:16PM +0900, Simon Horman wrote:
> On Tue, Oct 22, 2013 at 11:21:12AM +0900, Cao Minh Hiep wrote:
> > From: Hiep Cao Minh <cm-hiep@jinso.co.jp>
> > 
> > This patch enables Spansion S25FL512SAGMFIG11 chip on QSPI,
> > Add support for the QSPI interface on Lager.
> > 
> > Signed-off-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
> 
> Hi,
> 
> yesterday I stated that I will queue this patch up.
> Toady I would like to qualify that statement.
> 
> This patch makes use of the new 'num_chipselect' field of
> struct rspi_plat_data. This is not present in v3.12-rc7 but
> is present in linux-next. Thus I assume that it will
> appear in v3.13-rc1. With this in mind I will queue-up
> this patch after rebasing my branches on v3.13-rc1 once
> it has been released.

I have rebased my branches on top of v3.13-rc1 and re-queued-up
this patch.
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Simon Horman Jan. 7, 2014, 1:15 a.m. UTC | #3
On Thu, Nov 28, 2013 at 04:59:42PM +0900, Simon Horman wrote:
> On Wed, Oct 30, 2013 at 02:14:16PM +0900, Simon Horman wrote:
> > On Tue, Oct 22, 2013 at 11:21:12AM +0900, Cao Minh Hiep wrote:
> > > From: Hiep Cao Minh <cm-hiep@jinso.co.jp>
> > > 
> > > This patch enables Spansion S25FL512SAGMFIG11 chip on QSPI,
> > > Add support for the QSPI interface on Lager.
> > > 
> > > Signed-off-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
> > 
> > Hi,
> > 
> > yesterday I stated that I will queue this patch up.
> > Toady I would like to qualify that statement.
> > 
> > This patch makes use of the new 'num_chipselect' field of
> > struct rspi_plat_data. This is not present in v3.12-rc7 but
> > is present in linux-next. Thus I assume that it will
> > appear in v3.13-rc1. With this in mind I will queue-up
> > this patch after rebasing my branches on v3.13-rc1 once
> > it has been released.
> 
> I have rebased my branches on top of v3.13-rc1 and re-queued-up
> this patch.

Hi,

could you please provide an update to the lager defconfig
which enables the drivers for this.

Thanks
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diff mbox

Patch

diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
index 78a31b6..9a601eb 100644
--- a/arch/arm/mach-shmobile/board-lager.c
+++ b/arch/arm/mach-shmobile/board-lager.c
@@ -39,6 +39,11 @@ 
 #include <mach/r8a7790.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/mtd.h>
+#include <linux/spi/flash.h>
+#include <linux/spi/rspi.h>
+#include <linux/spi/spi.h>
 
 /* DU */
 static struct rcar_du_encoder_data lager_du_encoders[] = {
@@ -165,6 +170,59 @@  static const struct resource ether_resources[] __initconst = {
 	DEFINE_RES_IRQ(gic_spi(162)),
 };
 
+/* SPI Flash memory (Spansion S25FL512SAGMFIG11 64Mb) */
+static struct mtd_partition spi_flash_part[] = {
+	/* Reserved for user loader program, read-only */
+	{
+		.name = "loader",
+		.offset = 0,
+		.size = SZ_256K,
+		.mask_flags = MTD_WRITEABLE,
+	},
+	/* Reserved for user program, read-only */
+	{
+		.name = "user",
+		.offset = MTDPART_OFS_APPEND,
+		.size = SZ_4M,
+		.mask_flags = MTD_WRITEABLE,
+	},
+	/* All else is writable (e.g. JFFS2) */
+	{
+		.name = "flash",
+		.offset = MTDPART_OFS_APPEND,
+		.size = MTDPART_SIZ_FULL,
+		.mask_flags = 0,
+	},
+};
+
+static struct flash_platform_data spi_flash_data = {
+	.name           = "m25p80",
+	.parts          = spi_flash_part,
+	.nr_parts       = ARRAY_SIZE(spi_flash_part),
+	.type           = "s25fl512s",
+};
+
+static const struct rspi_plat_data qspi_pdata __initconst = {
+	.num_chipselect	= 1,
+};
+
+static const struct spi_board_info spi_info[] __initconst = {
+	{
+		.modalias               = "m25p80",
+		.platform_data          = &spi_flash_data,
+		.mode                   = SPI_MODE_0,
+		.max_speed_hz           = 30000000,
+		.bus_num                = 0,
+		.chip_select            = 0,
+	},
+};
+
+/* QSPI resource */
+static const struct resource qspi_resources[] __initconst = {
+	DEFINE_RES_MEM(0xe6b10000, 0x1000),
+	DEFINE_RES_IRQ(gic_spi(184)),
+};
+
 static const struct pinctrl_map lager_pinctrl_map[] = {
 	/* DU (CN10: ARGB0, CN13: LVDS) */
 	PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
@@ -222,6 +280,12 @@  static void __init lager_add_standard_devices(void)
 					  &ether_pdata, sizeof(ether_pdata));
 
 	lager_add_du_device();
+
+	platform_device_register_resndata(&platform_bus, "qspi", 0,
+					  qspi_resources,
+					  ARRAY_SIZE(qspi_resources),
+					  &qspi_pdata, sizeof(qspi_pdata));
+	spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
 }
 
 /*