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ARM: shmobile: r8a7790: add i2c[0-3] clocks

Message ID 1389974082-27677-1-git-send-email-ben.dooks@codethink.co.uk (mailing list archive)
State Changes Requested
Headers show

Commit Message

Ben Dooks Jan. 17, 2014, 3:54 p.m. UTC
Add the necessary clocks for i2c0 to i2c3 into the mstp3 clock node. This
is a pre-cursor to adding the i2c devices themslves.

Cc: Simon Horman <horms+renesas@verge.net.au>
Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
---
 arch/arm/boot/dts/r8a7790.dtsi | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

Comments

Laurent Pinchart Jan. 19, 2014, 11:03 a.m. UTC | #1
Hi Ben,

Thank you for the patch.

On Friday 17 January 2014 15:54:42 Ben Dooks wrote:
> Add the necessary clocks for i2c0 to i2c3 into the mstp3 clock node. This
> is a pre-cursor to adding the i2c devices themslves.

According to the R8A7790 datasheet the I2C MSTP clocks are handled by MSTP9, 
not MSTP3, and they're already declared in the MSTP9 DT node.

> Cc: Simon Horman <horms+renesas@verge.net.au>
> Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
> ---
>  arch/arm/boot/dts/r8a7790.dtsi | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
> index ac16214..aa91f4a 100644
> --- a/arch/arm/boot/dts/r8a7790.dtsi
> +++ b/arch/arm/boot/dts/r8a7790.dtsi
> @@ -697,16 +697,19 @@
>  			reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
>  			clocks = <&cp_clk>, <&mmc1_clk>, <&sd3_clk>, <&sd2_clk>,
>  				 <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks 
R8A7790_CLK_SD0>,
> -				 <&mmc0_clk>, <&rclk_clk>;
> +				 <&mmc0_clk>, <&rclk_clk>, <&p_clk>, <&p_clk>, 
<&p_clk>,<&p_clk>;
>  			#clock-cells = <1>;
>  			renesas,clock-indices = <
>  				R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3
>  				R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0
>  				R8A7790_CLK_MMCIF0 R8A7790_CLK_CMT1
> +				R8A7790_CLK_I2C3 R8A7790_CLK_I2C2
> +				R8A7790_CLK_I2C1 R8A7790_CLK_I2C0
> 
>  			>;
> 
>  			clock-output-names =
>  				"tpu0", "mmcif1", "sdhi3", "sdhi2",
> -				"sdhi1", "sdhi0", "mmcif0", "cmt1";
> +				"sdhi1", "sdhi0", "mmcif0", "cmt1",
> +				"i2c3", "i2c2", "i2c1", "i2c0";
>  		};
>  		mstp5_clks: mstp5_clks@e6150144 {
>  			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-
clocks";
Ben Dooks Jan. 20, 2014, 10:51 a.m. UTC | #2
On 19/01/14 11:03, Laurent Pinchart wrote:
> Hi Ben,
>
> Thank you for the patch.
>
> On Friday 17 January 2014 15:54:42 Ben Dooks wrote:
>> Add the necessary clocks for i2c0 to i2c3 into the mstp3 clock node. This
>> is a pre-cursor to adding the i2c devices themslves.
>
> According to the R8A7790 datasheet the I2C MSTP clocks are handled by MSTP9,
> not MSTP3, and they're already declared in the MSTP9 DT node.

Ah, the i2cX nodes themselves are wrong.

         i2c1: i2c@e6518000 {
                 #address-cells = <1>;
                 #size-cells = <0>;
                 compatible = "renesas,i2c-r8a7790";
                 reg = <0 0xe6518000 0 0x40>;
                 interrupt-parent = <&gic>;
                 interrupts = <0 288 IRQ_TYPE_LEVEL_HIGH>;
                 clocks = <&mstp3_clks R8A7790_CLK_I2C1>;
                 status = "disabled";
         };
Laurent Pinchart Jan. 20, 2014, 10:55 a.m. UTC | #3
Hi Ben,

On Monday 20 January 2014 10:51:28 Ben Dooks wrote:
> On 19/01/14 11:03, Laurent Pinchart wrote:
> > Hi Ben,
> > 
> > Thank you for the patch.
> > 
> > On Friday 17 January 2014 15:54:42 Ben Dooks wrote:
> >> Add the necessary clocks for i2c0 to i2c3 into the mstp3 clock node. This
> >> is a pre-cursor to adding the i2c devices themslves.
> > 
> > According to the R8A7790 datasheet the I2C MSTP clocks are handled by
> > MSTP9, not MSTP3, and they're already declared in the MSTP9 DT node.
> 
> Ah, the i2cX nodes themselves are wrong.
> 
>          i2c1: i2c@e6518000 {
>                  #address-cells = <1>;
>                  #size-cells = <0>;
>                  compatible = "renesas,i2c-r8a7790";
>                  reg = <0 0xe6518000 0 0x40>;
>                  interrupt-parent = <&gic>;
>                  interrupts = <0 288 IRQ_TYPE_LEVEL_HIGH>;
>                  clocks = <&mstp3_clks R8A7790_CLK_I2C1>;
>                  status = "disabled";
>          };

Indeed, my bad. Would you like to submit a patch to fix this, or should I do 
it ?
Ben Dooks Jan. 20, 2014, 10:58 a.m. UTC | #4
On 20/01/14 10:55, Laurent Pinchart wrote:
> Hi Ben,
>
> On Monday 20 January 2014 10:51:28 Ben Dooks wrote:
>> On 19/01/14 11:03, Laurent Pinchart wrote:
>>> Hi Ben,
>>>
>>> Thank you for the patch.
>>>
>>> On Friday 17 January 2014 15:54:42 Ben Dooks wrote:
>>>> Add the necessary clocks for i2c0 to i2c3 into the mstp3 clock node. This
>>>> is a pre-cursor to adding the i2c devices themslves.
>>>
>>> According to the R8A7790 datasheet the I2C MSTP clocks are handled by
>>> MSTP9, not MSTP3, and they're already declared in the MSTP9 DT node.
>>
>> Ah, the i2cX nodes themselves are wrong.
>>
>>           i2c1: i2c@e6518000 {
>>                   #address-cells = <1>;
>>                   #size-cells = <0>;
>>                   compatible = "renesas,i2c-r8a7790";
>>                   reg = <0 0xe6518000 0 0x40>;
>>                   interrupt-parent = <&gic>;
>>                   interrupts = <0 288 IRQ_TYPE_LEVEL_HIGH>;
>>                   clocks = <&mstp3_clks R8A7790_CLK_I2C1>;
>>                   status = "disabled";
>>           };
>
> Indeed, my bad. Would you like to submit a patch to fix this, or should I do
> it ?

I am just finishing up a patch.
diff mbox

Patch

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index ac16214..aa91f4a 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -697,16 +697,19 @@ 
 			reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
 			clocks = <&cp_clk>, <&mmc1_clk>, <&sd3_clk>, <&sd2_clk>,
 				 <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>,
-				 <&mmc0_clk>, <&rclk_clk>;
+				 <&mmc0_clk>, <&rclk_clk>, <&p_clk>, <&p_clk>, <&p_clk>,<&p_clk>;
 			#clock-cells = <1>;
 			renesas,clock-indices = <
 				R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3
 				R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0
 				R8A7790_CLK_MMCIF0 R8A7790_CLK_CMT1
+				R8A7790_CLK_I2C3 R8A7790_CLK_I2C2
+				R8A7790_CLK_I2C1 R8A7790_CLK_I2C0
 			>;
 			clock-output-names =
 				"tpu0", "mmcif1", "sdhi3", "sdhi2",
-				"sdhi1", "sdhi0", "mmcif0", "cmt1";
+				"sdhi1", "sdhi0", "mmcif0", "cmt1",
+				"i2c3", "i2c2", "i2c1", "i2c0";
 		};
 		mstp5_clks: mstp5_clks@e6150144 {
 			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";