| Message ID | 1391006064-28890-10-git-send-email-b.brezillon.dev@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wed, Jan 29, 2014 at 8:34 AM, Boris BREZILLON <b.brezillon.dev@gmail.com> wrote: > Add the sunxi NAND Flash Controller dt bindings documentation. > > Signed-off-by: Boris BREZILLON <b.brezillon.dev@gmail.com> > --- > .../devicetree/bindings/mtd/sunxi-nand.txt | 46 ++++++++++++++++++++ > 1 file changed, 46 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mtd/sunxi-nand.txt > > diff --git a/Documentation/devicetree/bindings/mtd/sunxi-nand.txt b/Documentation/devicetree/bindings/mtd/sunxi-nand.txt > new file mode 100644 > index 0000000..b0e55a3 > --- /dev/null > +++ b/Documentation/devicetree/bindings/mtd/sunxi-nand.txt > @@ -0,0 +1,46 @@ > +Allwinner NAND Flash Controller (NFC) > + > +Required properties: > +- compatible : "allwinner,sun4i-nand". > +- reg : shall contain registers location and length for data and reg. > +- interrupts : shall define the nand controller interrupt. > +- #address-cells: shall be set to 1. Encode the nand CS. > +- #size-cells : shall be set to 0. > +- clocks : shall reference nand controller clocks. > +- clock-names : nand controller internal clock names. Shall contain : > + * "ahb_clk" : AHB gating clock > + * "sclk" : nand controller clock > + > +Optional children nodes: > +Children nodes represent the available nand chips. > + > +Optional properties: For the controller or per nand chip? > +- onfi,nand-timing-mode : mandatory if the chip does not support the ONFI > + standard. Add to generic nand binding. > +- allwinner,rb : shall contain the native Ready/Busy ids. > + or > +- rb-gpios : shall contain the gpios used as R/B pins. Isn't allwinner,rb implied by a lack of rb-gpios property. Or no R/B pin is an option? If so, don't you need some fixed time delay properties like max erase time? rb-gpios could be added to the generic nand binding as well. Rob
On Wed, Jan 29, 2014 at 11:11 AM, Rob Herring <robherring2@gmail.com> wrote: > On Wed, Jan 29, 2014 at 8:34 AM, Boris BREZILLON > <b.brezillon.dev@gmail.com> wrote: >> Add the sunxi NAND Flash Controller dt bindings documentation. >> [snip] >> +- onfi,nand-timing-mode : mandatory if the chip does not support the ONFI >> + standard. > > Add to generic nand binding. NM, I see you did this. Rob
Hello Rob, Le 29/01/2014 18:11, Rob Herring a écrit : > On Wed, Jan 29, 2014 at 8:34 AM, Boris BREZILLON > <b.brezillon.dev@gmail.com> wrote: >> Add the sunxi NAND Flash Controller dt bindings documentation. >> >> Signed-off-by: Boris BREZILLON <b.brezillon.dev@gmail.com> >> --- >> .../devicetree/bindings/mtd/sunxi-nand.txt | 46 ++++++++++++++++++++ >> 1 file changed, 46 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/mtd/sunxi-nand.txt >> >> diff --git a/Documentation/devicetree/bindings/mtd/sunxi-nand.txt b/Documentation/devicetree/bindings/mtd/sunxi-nand.txt >> new file mode 100644 >> index 0000000..b0e55a3 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/mtd/sunxi-nand.txt >> @@ -0,0 +1,46 @@ >> +Allwinner NAND Flash Controller (NFC) >> + >> +Required properties: >> +- compatible : "allwinner,sun4i-nand". >> +- reg : shall contain registers location and length for data and reg. >> +- interrupts : shall define the nand controller interrupt. >> +- #address-cells: shall be set to 1. Encode the nand CS. >> +- #size-cells : shall be set to 0. >> +- clocks : shall reference nand controller clocks. >> +- clock-names : nand controller internal clock names. Shall contain : >> + * "ahb_clk" : AHB gating clock >> + * "sclk" : nand controller clock >> + >> +Optional children nodes: >> +Children nodes represent the available nand chips. >> + >> +Optional properties: > For the controller or per nand chip? > >> +- onfi,nand-timing-mode : mandatory if the chip does not support the ONFI >> + standard. > Add to generic nand binding. > >> +- allwinner,rb : shall contain the native Ready/Busy ids. >> + or >> +- rb-gpios : shall contain the gpios used as R/B pins. > Isn't allwinner,rb implied by a lack of rb-gpios property. Or no R/B > pin is an option? Both are optional. In case none of the properties are defined the dev_ready callback is set to NULL and the nand_base waiting loop is used. > If so, don't you need some fixed time delay > properties like max erase time? This is handled in nand_base (using the chip_delay field), but I guess we could use the information retrieved from nand timings and the operation in progress... > rb-gpios could be added to the generic nand binding as well. Sure. > > Rob
Dear Rob, and other DT maintainers, >From: Rob Herring [...] >> +- onfi,nand-timing-mode : mandatory if the chip does not support the ONFI >> + standard. > >Add to generic nand binding. > >> +- allwinner,rb : shall contain the native Ready/Busy ids. >> + or >> +- rb-gpios : shall contain the gpios used as R/B pins. > >Isn't allwinner,rb implied by a lack of rb-gpios property. Or no R/B >pin is an option? If so, don't you need some fixed time delay >properties like max erase time? > >rb-gpios could be added to the generic nand binding as well. > I do think this should go into generic nand binding, as this is controller specific. Some controllers have dedicated R/B pin (Ready/Busy) while others may use GPIO instead. It's the way a hardware controller is designed. Request you to please consider Ack from MTD Maintainers 'at-least' for generic NAND DT bindings. There is already a discussion going in a separate thread for which is still not awaiting replies [1]. [1] http://lists.infradead.org/pipermail/linux-mtd/2014-January/051625.html with regards, pekon
Le 29/01/2014 19:02, Gupta, Pekon a écrit : > Dear Rob, and other DT maintainers, > >> From: Rob Herring > [...] >>> +- onfi,nand-timing-mode : mandatory if the chip does not support the ONFI >>> + standard. >> Add to generic nand binding. >> >>> +- allwinner,rb : shall contain the native Ready/Busy ids. >>> + or >>> +- rb-gpios : shall contain the gpios used as R/B pins. >> Isn't allwinner,rb implied by a lack of rb-gpios property. Or no R/B >> pin is an option? If so, don't you need some fixed time delay >> properties like max erase time? >> >> rb-gpios could be added to the generic nand binding as well. >> > I do think this should go into generic nand binding, as this is controller specific. > Some controllers have dedicated R/B pin (Ready/Busy) while others may use > GPIO instead. It's the way a hardware controller is designed. You meant "You do not think", right ? If so, I think even if the retrieval and control of the GPIO is done is each NAND controller, we could at least use a common property name for all drivers using a GPIO to detect the R/B state. > Request you to please consider Ack from MTD Maintainers 'at-least' for > generic NAND DT bindings. There is already a discussion going in > a separate thread for which is still not awaiting replies [1]. > > [1]http://lists.infradead.org/pipermail/linux-mtd/2014-January/051625.html I missed this thread, but I can definitely use the nand-ecc-strength and nand-ecc-step-size instead of the one I defined (nand-ecc-level), as long as there is a proper way to define these informations in the DT. I'll let DT and MTD maintainers decide ;-). Best Regards, Boris > > with regards, pekon
Dear Rob, and other DT maintainers, (apologies, fixed typos in earlier mail) >>From: Rob Herring >[...] >>> +- onfi,nand-timing-mode : mandatory if the chip does not support the ONFI >>> + standard. >> >>Add to generic nand binding. >> >>> +- allwinner,rb : shall contain the native Ready/Busy ids. >>> + or >>> +- rb-gpios : shall contain the gpios used as R/B pins. >> >>Isn't allwinner,rb implied by a lack of rb-gpios property. Or no R/B >>pin is an option? If so, don't you need some fixed time delay >>properties like max erase time? >> >>rb-gpios could be added to the generic nand binding as well. >> I do _not_ think this should go into generic nand binding, as this is controller specific. Some controllers have dedicated R/B pin (Ready/Busy) while others may use GPIO instead. It's the way a hardware controller is designed. Request you to please consider Ack from MTD Maintainers 'at-least' for generic NAND DT bindings. There is already a discussion going in a separate thread for which there are still no replies [1]. [1] http://lists.infradead.org/pipermail/linux-mtd/2014-January/051625.html with regards, pekon
ons 2014-01-29 klockan 11:11 -0600 skrev Rob Herring: > Isn't allwinner,rb implied by a lack of rb-gpios property. Or no R/B > pin is an option? If so, don't you need some fixed time delay > properties like max erase time? > > rb-gpios could be added to the generic nand binding as well. The Allwinner NAND controller have dedicated RB pins when NAND is enabled, only MUXed with other functions when NAND is not enabled. Leaving RB unconnected is not a valid hardware configuration. The controller internal timing engine depends on being able to sense RB to sequence NAND commands properly. Regards Henrik
Hello Henrik, On 29/01/2014 23:37, Henrik Nordström wrote: > ons 2014-01-29 klockan 11:11 -0600 skrev Rob Herring: > >> Isn't allwinner,rb implied by a lack of rb-gpios property. Or no R/B >> pin is an option? If so, don't you need some fixed time delay >> properties like max erase time? >> >> rb-gpios could be added to the generic nand binding as well. > The Allwinner NAND controller have dedicated RB pins when NAND is > enabled, only MUXed with other functions when NAND is not enabled. > > Leaving RB unconnected is not a valid hardware configuration. The > controller internal timing engine depends on being able to sense RB to > sequence NAND commands properly. This is not true (at least in this driver). It was in yuq's driver because he was using the NFC_WAIT_FLAG ,and in this case the controller wait for the native R/B pin to be high before considering the CMD is complete. This driver choose the appropriate way to test the R/B state of the NAND chip according to what was specified in the DT: - allwinner,rb: native R/B id. These pins will be used by the NAND controller to test the R/B state. Only 0 and 1 are valid because the NAND controller only support 2 R/B pins. - rb-gpios: gpio used for R/B tests. This is a simple GPIO and will use the GPIO subsystem to test the R/B pin state. - none: the NAND base code will wait some time before and send STATUS cmd to the NAND to check its status. BTW, the controller supports 8 CS (8 NAND chips), but only have 2 native R/B pins, this means you'll have to use the GPIO or standard GET_STATUS method if you connect 3 or more NAND chips. And for the record, I still think the rb-gpios property (or whatever common name you choose: nand-rb-gpios ?) should be part of the generic NAND binding, because other controllers (at least the atmel one :)) use GPIOs to test R/B state. Best Regards, Boris > > Regards > Henrik >
Hello Henrik, Sorry for the noise, I sent the mail to Rob's old address. On 29/01/2014 23:37, Henrik Nordström wrote: > ons 2014-01-29 klockan 11:11 -0600 skrev Rob Herring: > >> Isn't allwinner,rb implied by a lack of rb-gpios property. Or no R/B >> pin is an option? If so, don't you need some fixed time delay >> properties like max erase time? >> >> rb-gpios could be added to the generic nand binding as well. > The Allwinner NAND controller have dedicated RB pins when NAND is > enabled, only MUXed with other functions when NAND is not enabled. > > Leaving RB unconnected is not a valid hardware configuration. The > controller internal timing engine depends on being able to sense RB to > sequence NAND commands properly. This is not true (at least in this driver). It was in yuq's driver because he was using the NFC_WAIT_FLAG ,and in this case the controller wait for the native R/B pin to be high before considering the CMD is complete. This driver choose the appropriate way to test the R/B state of the NAND chip according to what was specified in the DT: - allwinner,rb: native R/B id. These pins will be used by the NAND controller to test the R/B state. Only 0 and 1 are valid because the NAND controller only support 2 R/B pins. - rb-gpios: gpio used for R/B tests. This is a simple GPIO and will use the GPIO subsystem to test the R/B pin state. - none: the NAND base code will wait some time before and send STATUS cmd to the NAND to check its status. BTW, the controller supports 8 CS (8 NAND chips), but only have 2 native R/B pins, this means you'll have to use the GPIO or standard GET_STATUS method if you connect 3 or more NAND chips. And for the record, I still think the rb-gpios property (or whatever common name you choose: nand-rb-gpios ?) should be part of the generic NAND binding, because other controllers (at least the atmel one :)) use GPIOs to test R/B state. Best Regards, Boris > > Regards > Henrik >
diff --git a/Documentation/devicetree/bindings/mtd/sunxi-nand.txt b/Documentation/devicetree/bindings/mtd/sunxi-nand.txt new file mode 100644 index 0000000..b0e55a3 --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/sunxi-nand.txt @@ -0,0 +1,46 @@ +Allwinner NAND Flash Controller (NFC) + +Required properties: +- compatible : "allwinner,sun4i-nand". +- reg : shall contain registers location and length for data and reg. +- interrupts : shall define the nand controller interrupt. +- #address-cells: shall be set to 1. Encode the nand CS. +- #size-cells : shall be set to 0. +- clocks : shall reference nand controller clocks. +- clock-names : nand controller internal clock names. Shall contain : + * "ahb_clk" : AHB gating clock + * "sclk" : nand controller clock + +Optional children nodes: +Children nodes represent the available nand chips. + +Optional properties: +- onfi,nand-timing-mode : mandatory if the chip does not support the ONFI + standard. +- allwinner,rb : shall contain the native Ready/Busy ids. + or +- rb-gpios : shall contain the gpios used as R/B pins. + +see Documentation/devicetree/mtd/nand.txt for generic bindings. + + +Examples: +nfc: nand@01c03000 { + compatible = "allwinner,sun4i-nand"; + reg = <0x01c03000 0x1000>; + interrupts = <0 37 1>; + clocks = <&ahb_gates 13>, <&nand_clk>; + clock-names = "ahb_clk", "sclk"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&nand_pins_a &nand_cs0_pins_a &nand_rb0_pins_a>; + status = "okay"; + + nand@0 { + reg = <0>; + allwinner,rb = <0>; + nand-ecc-mode = "soft_bch"; + onfi,nand-timing-mode = <4>; + }; +};
Add the sunxi NAND Flash Controller dt bindings documentation. Signed-off-by: Boris BREZILLON <b.brezillon.dev@gmail.com> --- .../devicetree/bindings/mtd/sunxi-nand.txt | 46 ++++++++++++++++++++ 1 file changed, 46 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/sunxi-nand.txt