Message ID | 1392415108-4365-2-git-send-email-swarren@wwwdotorg.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Saturday 15 February 2014 03:28 AM, Stephen Warren wrote: > From: Stephen Warren <swarren@nvidia.com> > > The Tegra PMC's resume-from-sleep logic wants an active-low IRQ input > from the PMIC. However, the PMIC IRQ is also routed to the GIC, which > only supports active high IRQs (or rising edge). Hence, the signal must > be inverted in the PMC before being routed to the GIC. This implies that > the PMC DT property nvidia,invert-interrupt must be set, and it is. > > The PMIC's DT interrupts property must represent the IRQ level at the > GIC, since that is the PMIC's parent IRQ controller. Fix the PMIC's > interrupts property to correctly describe the GIC input polarity. > > However, the PMIC IRQ output's polarity is programmable in HW, and by > default follows the parent IRQ controller's input polarity. We need to > have an active-low output due to the inversion inside the Tegra PMC. > Hence, add the ti,irq-externally-inverted property to the PMIC. > Looks good to me. Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts b/arch/arm/boot/dts/tegra114-dalmore.dts index 8de543777882..2977206cafc9 100644 --- a/arch/arm/boot/dts/tegra114-dalmore.dts +++ b/arch/arm/boot/dts/tegra114-dalmore.dts @@ -893,7 +893,8 @@ palmas: tps65913@58 { compatible = "ti,palmas"; reg = <0x58>; - interrupts = <0 86 IRQ_TYPE_LEVEL_LOW>; + interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>; + ti,irq-externally-inverted; #interrupt-cells = <2>; interrupt-controller;