| Message ID | 20140226095916.15676.99394.sendpatchset@w520 (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Hi Magnus, On Wed, Feb 26, 2014 at 10:59 AM, Magnus Damm <magnus.damm@gmail.com> wrote: > On r8a7791 the hardware boot mode bit MD21 indicates if hardware > debug mode is enabled or not. In case hardware debug mode is enabled > print a warning and refrain from booting secondary CPU cores. > > Without this patch Koelsch with SW8-4 set to OFF will hang at SMP boot. > > Signed-off-by: Magnus Damm <damm@opensource.se> On Koelsch: Tested-by: Geert Uytterhoeven <geert@linux-m68k.org> > This is a reworked version of the APMU patch previously posted as > [PATCH] ARM: shmobile: Check MD21 at SMP boot in case of APMU Your previous version also affected r8a7790/Lager. Isn't this check no longer needed there? According to the Lager manual, MD21 also enables hardware debug mode, and is also controlled by SW8-4. Of course the CPU may behave differently, as the CPU cores are different. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
Hi Geert, On Wed, Feb 26, 2014 at 7:11 PM, Geert Uytterhoeven <geert@linux-m68k.org> wrote: > Hi Magnus, > > On Wed, Feb 26, 2014 at 10:59 AM, Magnus Damm <magnus.damm@gmail.com> wrote: >> On r8a7791 the hardware boot mode bit MD21 indicates if hardware >> debug mode is enabled or not. In case hardware debug mode is enabled >> print a warning and refrain from booting secondary CPU cores. >> >> Without this patch Koelsch with SW8-4 set to OFF will hang at SMP boot. >> >> Signed-off-by: Magnus Damm <damm@opensource.se> > > On Koelsch: > > Tested-by: Geert Uytterhoeven <geert@linux-m68k.org> Thanks. >> This is a reworked version of the APMU patch previously posted as >> [PATCH] ARM: shmobile: Check MD21 at SMP boot in case of APMU > > Your previous version also affected r8a7790/Lager. > Isn't this check no longer needed there? According to the Lager manual, > MD21 also enables hardware debug mode, and is also controlled by > SW8-4. Of course the CPU may behave differently, as the CPU cores > are different. Yes, you are correct that the previous version of the patch also affected Lager. And that both r8a7790 and r8a7791 mention the MD21 bit together with JTAG debugging. I recently used the patch on Lager and I discovered that I apparently had been running with MD21 on my Lager since forever, and surprisingly it worked regardless. Since there is no documentation on r8a7790 or r8a7791 I simply decided to handle them separately and only enable where it is needed. I've also been told that it is possible to allow SMP operation together with JTAG, apparently some magic with RST is needed. It seems that the power domains are treated differently depending on the MD21 setting. Not sure if this applies to both r8a7790 and r8a7791, but if we end up with similar fixes we can consolidate. Until then I think dealing with them one by one makes sense. Cheers, / magnus
Hi Magnus, On Thu, Feb 27, 2014 at 4:33 AM, Magnus Damm <magnus.damm@gmail.com> wrote: >>> This is a reworked version of the APMU patch previously posted as >>> [PATCH] ARM: shmobile: Check MD21 at SMP boot in case of APMU >> >> Your previous version also affected r8a7790/Lager. >> Isn't this check no longer needed there? According to the Lager manual, >> MD21 also enables hardware debug mode, and is also controlled by >> SW8-4. Of course the CPU may behave differently, as the CPU cores >> are different. > > Yes, you are correct that the previous version of the patch also > affected Lager. And that both r8a7790 and r8a7791 mention the MD21 bit > together with JTAG debugging. > > I recently used the patch on Lager and I discovered that I apparently > had been running with MD21 on my Lager since forever, and surprisingly > it worked regardless. Since there is no documentation on r8a7790 or > r8a7791 I simply decided to handle them separately and only enable > where it is needed. You could have been lucky? On Koelsch, I only had failures after Real Cold Boot, i.e. on boot up in the morning. And not always, so there could be a timing issue involved. > I've also been told that it is possible to allow SMP operation > together with JTAG, apparently some magic with RST is needed. It seems > that the power domains are treated differently depending on the MD21 > setting. Not sure if this applies to both r8a7790 and r8a7791, but if > we end up with similar fixes we can consolidate. Until then I think > dealing with them one by one makes sense. Furthermore, I haven't seen any SPI timeouts after I disabled MD21 (holding wood, and rabbit legs ;-). So the SMP memory (in)coherency I saw there could have been caused by a wobbly SMP setup. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
On Thu, Feb 27, 2014 at 09:08:06AM +0100, Geert Uytterhoeven wrote: > Hi Magnus, > > On Thu, Feb 27, 2014 at 4:33 AM, Magnus Damm <magnus.damm@gmail.com> wrote: > >>> This is a reworked version of the APMU patch previously posted as > >>> [PATCH] ARM: shmobile: Check MD21 at SMP boot in case of APMU > >> > >> Your previous version also affected r8a7790/Lager. > >> Isn't this check no longer needed there? According to the Lager manual, > >> MD21 also enables hardware debug mode, and is also controlled by > >> SW8-4. Of course the CPU may behave differently, as the CPU cores > >> are different. > > > > Yes, you are correct that the previous version of the patch also > > affected Lager. And that both r8a7790 and r8a7791 mention the MD21 bit > > together with JTAG debugging. > > > > I recently used the patch on Lager and I discovered that I apparently > > had been running with MD21 on my Lager since forever, and surprisingly > > it worked regardless. Since there is no documentation on r8a7790 or > > r8a7791 I simply decided to handle them separately and only enable > > where it is needed. > > You could have been lucky? > > On Koelsch, I only had failures after Real Cold Boot, i.e. on boot up in the > morning. And not always, so there could be a timing issue involved. > > > I've also been told that it is possible to allow SMP operation > > together with JTAG, apparently some magic with RST is needed. It seems > > that the power domains are treated differently depending on the MD21 > > setting. Not sure if this applies to both r8a7790 and r8a7791, but if > > we end up with similar fixes we can consolidate. Until then I think > > dealing with them one by one makes sense. > > Furthermore, I haven't seen any SPI timeouts after I disabled MD21 (holding > wood, and rabbit legs ;-). So the SMP memory (in)coherency I saw there > could have been caused by a wobbly SMP setup. Hi Magnus, I am a little confused about the status of this patch? Would you like me to queue it up?
Hi Simon, On Thu, Mar 13, 2014 at 11:02 AM, Simon Horman <horms@verge.net.au> wrote: > On Thu, Feb 27, 2014 at 09:08:06AM +0100, Geert Uytterhoeven wrote: >> Hi Magnus, >> >> On Thu, Feb 27, 2014 at 4:33 AM, Magnus Damm <magnus.damm@gmail.com> wrote: >> >>> This is a reworked version of the APMU patch previously posted as >> >>> [PATCH] ARM: shmobile: Check MD21 at SMP boot in case of APMU >> >> >> >> Your previous version also affected r8a7790/Lager. >> >> Isn't this check no longer needed there? According to the Lager manual, >> >> MD21 also enables hardware debug mode, and is also controlled by >> >> SW8-4. Of course the CPU may behave differently, as the CPU cores >> >> are different. >> > >> > Yes, you are correct that the previous version of the patch also >> > affected Lager. And that both r8a7790 and r8a7791 mention the MD21 bit >> > together with JTAG debugging. >> > >> > I recently used the patch on Lager and I discovered that I apparently >> > had been running with MD21 on my Lager since forever, and surprisingly >> > it worked regardless. Since there is no documentation on r8a7790 or >> > r8a7791 I simply decided to handle them separately and only enable >> > where it is needed. >> >> You could have been lucky? >> >> On Koelsch, I only had failures after Real Cold Boot, i.e. on boot up in the >> morning. And not always, so there could be a timing issue involved. >> >> > I've also been told that it is possible to allow SMP operation >> > together with JTAG, apparently some magic with RST is needed. It seems >> > that the power domains are treated differently depending on the MD21 >> > setting. Not sure if this applies to both r8a7790 and r8a7791, but if >> > we end up with similar fixes we can consolidate. Until then I think >> > dealing with them one by one makes sense. >> >> Furthermore, I haven't seen any SPI timeouts after I disabled MD21 (holding >> wood, and rabbit legs ;-). So the SMP memory (in)coherency I saw there >> could have been caused by a wobbly SMP setup. > > Hi Magnus, > > I am a little confused about the status of this patch? > Would you like me to queue it up? Yes, please! / magnus
--- 0001/arch/arm/mach-shmobile/smp-r8a7791.c +++ work/arch/arm/mach-shmobile/smp-r8a7791.c 2014-02-26 18:49:39.000000000 +0900 @@ -20,6 +20,7 @@ #include <asm/smp_plat.h> #include <mach/common.h> #include <mach/r8a7791.h> +#include <mach/rcar-gen2.h> #define RST 0xe6160000 #define CA15BAR 0x0020 @@ -51,9 +52,21 @@ static void __init r8a7791_smp_prepare_c iounmap(p); } +static int r8a7791_smp_boot_secondary(unsigned int cpu, + struct task_struct *idle) +{ + /* Error out when hardware debug mode is enabled */ + if (rcar_gen2_read_mode_pins() & BIT(21)) { + pr_warn("Unable to boot CPU%u when MD21 is set\n", cpu); + return -ENOTSUPP; + } + + return shmobile_smp_apmu_boot_secondary(cpu, idle); +} + struct smp_operations r8a7791_smp_ops __initdata = { .smp_prepare_cpus = r8a7791_smp_prepare_cpus, - .smp_boot_secondary = shmobile_smp_apmu_boot_secondary, + .smp_boot_secondary = r8a7791_smp_boot_secondary, #ifdef CONFIG_HOTPLUG_CPU .cpu_disable = shmobile_smp_cpu_disable, .cpu_die = shmobile_smp_apmu_cpu_die,