[1/4] clk: sunxi: fix A20 PLL4 calculation

Commit Message

Mike Turquette March 19, 2014, 7:42 p.m. UTC

Quoting Emilio López (2014-03-19 11:19:30)
> Allwinner actually reworked the PLL4 on A20; now it's compatible with
> the sun4i PLL5/6 design previous to any divisions, as well as to the new
> PLL8 in sun7i.
> 
> Signed-off-by: Emilio López <[e-mail]>

Trivial merge conflict after applying this patch on top of your 3.15
pull request. My resolution is below. Let me know if I've made a
mistake.

Regards,
Mike



From 5a8ddf26822dcf601a44d35efa8fe162cbc84e62 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <[e-mail]>
Date: Wed, 19 Mar 2014 15:19:30 -0300
Subject: [PATCH] clk: sunxi: fix A20 PLL4 calculation
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Allwinner actually reworked the PLL4 on A20; now it's compatible with
the sun4i PLL5/6 design previous to any divisions, as well as to the new
PLL8 in sun7i.

Signed-off-by: Emilio López <[e-mail]>
Signed-off-by: Mike Turquette <[e-mail]>
---
 drivers/clk/sunxi/clk-sunxi.c | 7 +++++++
 1 file changed, 7 insertions(+)

Comments

Emilio López March 19, 2014, 8:01 p.m. UTC | #1

Hi Mike,

El 19/03/14 16:42, Mike Turquette escribió:
> Quoting Emilio López (2014-03-19 11:19:30)
>> Allwinner actually reworked the PLL4 on A20; now it's compatible with
>> the sun4i PLL5/6 design previous to any divisions, as well as to the new
>> PLL8 in sun7i.
>>
>> Signed-off-by: Emilio López <[e-mail]>
>
> Trivial merge conflict after applying this patch on top of your 3.15
> pull request. My resolution is below. Let me know if I've made a
> mistake.

Looks good to me.

Thanks!

Emilio

Patch

diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
index 23baad9..ef6ad52b 100644
--- a/drivers/clk/sunxi/clk-sunxi.c
+++ b/drivers/clk/sunxi/clk-sunxi.c
@@ -589,6 +589,12 @@  static const struct factors_data sun6i_a31_pll1_data __initconst = {
 	.getter = sun6i_a31_get_pll1_factors,
 };
 
+static const struct factors_data sun7i_a20_pll4_data __initconst = {
+	.enable = 31,
+	.table = &sun4i_pll5_config,
+	.getter = sun4i_get_pll5_factors,
+};
+
 static const struct factors_data sun4i_pll5_data __initconst = {
 	.enable = 31,
 	.table = &sun4i_pll5_config,
@@ -1209,6 +1215,7 @@  free_clkdata:
 static const struct of_device_id clk_factors_match[] __initconst = {
 	{.compatible = "allwinner,sun4i-a10-pll1-clk", .data = &sun4i_pll1_data,},
 	{.compatible = "allwinner,sun6i-a31-pll1-clk", .data = &sun6i_a31_pll1_data,},
+	{.compatible = "allwinner,sun7i-a20-pll4-clk", .data = &sun7i_a20_pll4_data,},
 	{.compatible = "allwinner,sun6i-a31-pll6-clk", .data = &sun6i_a31_pll6_data,},
 	{.compatible = "allwinner,sun4i-a10-apb1-clk", .data = &sun4i_apb1_data,},
 	{.compatible = "allwinner,sun4i-a10-mod0-clk", .data = &sun4i_mod0_data,},