| Message ID | 1397064774-31784-1-git-send-email-computersforpeace@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wednesday, April 09, 2014 at 07:32:46 PM, Brian Norris wrote: > Spacing is a little non-standard here. > > Signed-off-by: Brian Norris <computersforpeace@gmail.com> > --- > Series based on l2-mtd.git/spinor: > > http://git.infradead.org/l2-mtd.git > > include/linux/mtd/spi-nor.h | 68 > ++++++++++++++++++++++----------------------- 1 file changed, 34 > insertions(+), 34 deletions(-) > > diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h > index 41dae78fbd1d..558097e14932 100644 > --- a/include/linux/mtd/spi-nor.h > +++ b/include/linux/mtd/spi-nor.h > @@ -2,50 +2,50 @@ > #define __LINUX_MTD_SPI_NOR_H > > /* Flash opcodes. */ > -#define OPCODE_WREN 0x06 /* Write enable */ > -#define OPCODE_RDSR 0x05 /* Read status register */ > -#define OPCODE_WRSR 0x01 /* Write status register 1 byte */ > -#define OPCODE_NORM_READ 0x03 /* Read data bytes (low frequency) */ > -#define OPCODE_FAST_READ 0x0b /* Read data bytes (high frequency) */ > -#define OPCODE_DUAL_READ 0x3b /* Read data bytes (Dual SPI) */ > -#define OPCODE_QUAD_READ 0x6b /* Read data bytes (Quad SPI) */ > -#define OPCODE_PP 0x02 /* Page program (up to 256 bytes) */ > -#define OPCODE_BE_4K 0x20 /* Erase 4KiB block */ > -#define OPCODE_BE_4K_PMC 0xd7 /* Erase 4KiB block on PMC chips */ > -#define OPCODE_BE_32K 0x52 /* Erase 32KiB block */ > -#define OPCODE_CHIP_ERASE 0xc7 /* Erase whole flash chip */ > -#define OPCODE_SE 0xd8 /* Sector erase (usually 64KiB) */ > -#define OPCODE_RDID 0x9f /* Read JEDEC ID */ > -#define OPCODE_RDCR 0x35 /* Read configuration register */ > +#define OPCODE_WREN 0x06 /* Write enable */ > +#define OPCODE_RDSR 0x05 /* Read status register */ > +#define OPCODE_WRSR 0x01 /* Write status register 1 byte */ > +#define OPCODE_NORM_READ 0x03 /* Read data bytes (low frequency) */ > +#define OPCODE_FAST_READ 0x0b /* Read data bytes (high frequency) */ > +#define OPCODE_DUAL_READ 0x3b /* Read data bytes (Dual SPI) */ > +#define OPCODE_QUAD_READ 0x6b /* Read data bytes (Quad SPI) */ This is still a little non-standard -- or rather -- inconsistent here. You should use space after #define and \t after the name I'd say. I'd also say these two slipped your attention as the others do it just like that. > +#define OPCODE_PP 0x02 /* Page program (up to 256 bytes) */ > +#define OPCODE_BE_4K 0x20 /* Erase 4KiB block */ > +#define OPCODE_BE_4K_PMC 0xd7 /* Erase 4KiB block on PMC chips */ > +#define OPCODE_BE_32K 0x52 /* Erase 32KiB block */ > +#define OPCODE_CHIP_ERASE 0xc7 /* Erase whole flash chip */ > +#define OPCODE_SE 0xd8 /* Sector erase (usually 64KiB) */ > +#define OPCODE_RDID 0x9f /* Read JEDEC ID */ > +#define OPCODE_RDCR 0x35 /* Read configuration register */ DTTO here. > /* 4-byte address opcodes - used on Spansion and some Macronix flashes. */ > -#define OPCODE_NORM_READ_4B 0x13 /* Read data bytes (low frequency) */ > -#define OPCODE_FAST_READ_4B 0x0c /* Read data bytes (high frequency) */ > -#define OPCODE_DUAL_READ_4B 0x3c /* Read data bytes (Dual SPI) */ > -#define OPCODE_QUAD_READ_4B 0x6c /* Read data bytes (Quad SPI) */ > -#define OPCODE_PP_4B 0x12 /* Page program (up to 256 bytes) */ > -#define OPCODE_SE_4B 0xdc /* Sector erase (usually 64KiB) */ > +#define OPCODE_NORM_READ_4B 0x13 /* Read data bytes (low frequency) */ > +#define OPCODE_FAST_READ_4B 0x0c /* Read data bytes (high frequency) */ > +#define OPCODE_DUAL_READ_4B 0x3c /* Read data bytes (Dual SPI) */ > +#define OPCODE_QUAD_READ_4B 0x6c /* Read data bytes (Quad SPI) */ This comment here is indented with spaces, while the other comments are indented with tabs ;-/ [...] -- To unsubscribe from this list: send the line "unsubscribe linux-spi" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Wed, Apr 09, 2014 at 07:40:14PM +0200, Marek Vasut wrote: > On Wednesday, April 09, 2014 at 07:32:46 PM, Brian Norris wrote: > > +#define OPCODE_DUAL_READ 0x3b /* Read data bytes (Dual SPI) */ > > +#define OPCODE_QUAD_READ 0x6b /* Read data bytes (Quad SPI) */ > > This is still a little non-standard -- or rather -- inconsistent here. You > should use space after #define and \t after the name I'd say. I'd also say these > two slipped your attention as the others do it just like that. Thanks. I think I noticed this at one point, but in my patch juggling, I never straightened it out. I'll send v2 eventually. And in the meantime, I'm keeping my patches here: http://git.infradead.org/users/norris/linux-mtd.git/shortlog/refs/heads/spinor Brian -- To unsubscribe from this list: send the line "unsubscribe linux-spi" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Wed, Apr 09, 2014 at 10:32:46AM -0700, Brian Norris wrote: > Spacing is a little non-standard here. > -- > 1.8.3.2 > > > Acked-by: Huang Shijie <b32955@freescale.com> -- To unsubscribe from this list: send the line "unsubscribe linux-spi" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index 41dae78fbd1d..558097e14932 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -2,50 +2,50 @@ #define __LINUX_MTD_SPI_NOR_H /* Flash opcodes. */ -#define OPCODE_WREN 0x06 /* Write enable */ -#define OPCODE_RDSR 0x05 /* Read status register */ -#define OPCODE_WRSR 0x01 /* Write status register 1 byte */ -#define OPCODE_NORM_READ 0x03 /* Read data bytes (low frequency) */ -#define OPCODE_FAST_READ 0x0b /* Read data bytes (high frequency) */ -#define OPCODE_DUAL_READ 0x3b /* Read data bytes (Dual SPI) */ -#define OPCODE_QUAD_READ 0x6b /* Read data bytes (Quad SPI) */ -#define OPCODE_PP 0x02 /* Page program (up to 256 bytes) */ -#define OPCODE_BE_4K 0x20 /* Erase 4KiB block */ -#define OPCODE_BE_4K_PMC 0xd7 /* Erase 4KiB block on PMC chips */ -#define OPCODE_BE_32K 0x52 /* Erase 32KiB block */ -#define OPCODE_CHIP_ERASE 0xc7 /* Erase whole flash chip */ -#define OPCODE_SE 0xd8 /* Sector erase (usually 64KiB) */ -#define OPCODE_RDID 0x9f /* Read JEDEC ID */ -#define OPCODE_RDCR 0x35 /* Read configuration register */ +#define OPCODE_WREN 0x06 /* Write enable */ +#define OPCODE_RDSR 0x05 /* Read status register */ +#define OPCODE_WRSR 0x01 /* Write status register 1 byte */ +#define OPCODE_NORM_READ 0x03 /* Read data bytes (low frequency) */ +#define OPCODE_FAST_READ 0x0b /* Read data bytes (high frequency) */ +#define OPCODE_DUAL_READ 0x3b /* Read data bytes (Dual SPI) */ +#define OPCODE_QUAD_READ 0x6b /* Read data bytes (Quad SPI) */ +#define OPCODE_PP 0x02 /* Page program (up to 256 bytes) */ +#define OPCODE_BE_4K 0x20 /* Erase 4KiB block */ +#define OPCODE_BE_4K_PMC 0xd7 /* Erase 4KiB block on PMC chips */ +#define OPCODE_BE_32K 0x52 /* Erase 32KiB block */ +#define OPCODE_CHIP_ERASE 0xc7 /* Erase whole flash chip */ +#define OPCODE_SE 0xd8 /* Sector erase (usually 64KiB) */ +#define OPCODE_RDID 0x9f /* Read JEDEC ID */ +#define OPCODE_RDCR 0x35 /* Read configuration register */ /* 4-byte address opcodes - used on Spansion and some Macronix flashes. */ -#define OPCODE_NORM_READ_4B 0x13 /* Read data bytes (low frequency) */ -#define OPCODE_FAST_READ_4B 0x0c /* Read data bytes (high frequency) */ -#define OPCODE_DUAL_READ_4B 0x3c /* Read data bytes (Dual SPI) */ -#define OPCODE_QUAD_READ_4B 0x6c /* Read data bytes (Quad SPI) */ -#define OPCODE_PP_4B 0x12 /* Page program (up to 256 bytes) */ -#define OPCODE_SE_4B 0xdc /* Sector erase (usually 64KiB) */ +#define OPCODE_NORM_READ_4B 0x13 /* Read data bytes (low frequency) */ +#define OPCODE_FAST_READ_4B 0x0c /* Read data bytes (high frequency) */ +#define OPCODE_DUAL_READ_4B 0x3c /* Read data bytes (Dual SPI) */ +#define OPCODE_QUAD_READ_4B 0x6c /* Read data bytes (Quad SPI) */ +#define OPCODE_PP_4B 0x12 /* Page program (up to 256 bytes) */ +#define OPCODE_SE_4B 0xdc /* Sector erase (usually 64KiB) */ /* Used for SST flashes only. */ -#define OPCODE_BP 0x02 /* Byte program */ -#define OPCODE_WRDI 0x04 /* Write disable */ -#define OPCODE_AAI_WP 0xad /* Auto address increment word program */ +#define OPCODE_BP 0x02 /* Byte program */ +#define OPCODE_WRDI 0x04 /* Write disable */ +#define OPCODE_AAI_WP 0xad /* Auto address increment word program */ /* Used for Macronix and Winbond flashes. */ -#define OPCODE_EN4B 0xb7 /* Enter 4-byte mode */ -#define OPCODE_EX4B 0xe9 /* Exit 4-byte mode */ +#define OPCODE_EN4B 0xb7 /* Enter 4-byte mode */ +#define OPCODE_EX4B 0xe9 /* Exit 4-byte mode */ /* Used for Spansion flashes only. */ -#define OPCODE_BRWR 0x17 /* Bank register write */ +#define OPCODE_BRWR 0x17 /* Bank register write */ /* Status Register bits. */ -#define SR_WIP 1 /* Write in progress */ -#define SR_WEL 2 /* Write enable latch */ +#define SR_WIP 1 /* Write in progress */ +#define SR_WEL 2 /* Write enable latch */ /* meaning of other SR_* bits may differ between vendors */ -#define SR_BP0 4 /* Block protect 0 */ -#define SR_BP1 8 /* Block protect 1 */ -#define SR_BP2 0x10 /* Block protect 2 */ -#define SR_SRWD 0x80 /* SR write protect */ +#define SR_BP0 4 /* Block protect 0 */ +#define SR_BP1 8 /* Block protect 1 */ +#define SR_BP2 0x10 /* Block protect 2 */ +#define SR_SRWD 0x80 /* SR write protect */ #define SR_QUAD_EN_MX 0x40 /* Macronix Quad I/O */ @@ -86,7 +86,7 @@ struct spi_nor_xfer_cfg { u8 dummy_cycles; }; -#define SPI_NOR_MAX_CMD_SIZE 8 +#define SPI_NOR_MAX_CMD_SIZE 8 enum spi_nor_ops { SPI_NOR_OPS_READ = 0, SPI_NOR_OPS_WRITE,
Spacing is a little non-standard here. Signed-off-by: Brian Norris <computersforpeace@gmail.com> --- Series based on l2-mtd.git/spinor: http://git.infradead.org/l2-mtd.git include/linux/mtd/spi-nor.h | 68 ++++++++++++++++++++++----------------------- 1 file changed, 34 insertions(+), 34 deletions(-)