| Message ID | 1247643267.5981.82.camel@localhost.localdomain (mailing list archive) |
|---|---|
| State | Rejected |
| Headers | show |
Hello. Philby John wrote: >>From dbe7e824d576636bb15b82a20fd2557fddc9a8f7 Mon Sep 17 00:00:00 2001 > From: Philby John <pjohn@in.mvista.com> > Date: Tue, 14 Jul 2009 21:46:47 +0530 > Subject: [PATCH] Reset i2c bus to come out of time out conditions > Get out of i2c time out condition by resetting > the i2c bus. The kernel must be robust enough to > gracefully recover from i2c bus failure without having > to reset the machine. This is done by first NACKing the slave > and then resetting the i2c bus after a certain timeout. > Signed-off-by: Philby John <pjohn@in.mvista.com> > diff --git a/drivers/i2c/busses/i2c-davinci.c b/drivers/i2c/busses/i2c-davinci.c > index 17f2ee7..4ed1a4c 100755 > --- a/drivers/i2c/busses/i2c-davinci.c > +++ b/drivers/i2c/busses/i2c-davinci.c > @@ -35,14 +35,18 @@ > #include <linux/interrupt.h> > #include <linux/platform_device.h> > #include <linux/io.h> > +#include <linux/gpio.h> > > #include <mach/hardware.h> > > #include <mach/i2c.h> > +#include <mach/mux.h> > +#include <mach/cputype.h> > > /* ----- global defines ----------------------------------------------- */ > > #define DAVINCI_I2C_TIMEOUT (1*HZ) > +#define DAVINCI_I2C_MAX_TRIES 2 > #define I2C_DAVINCI_INTR_ALL (DAVINCI_I2C_IMR_AAS | \ > DAVINCI_I2C_IMR_SCD | \ > DAVINCI_I2C_IMR_ARDY | \ > @@ -135,6 +139,50 @@ static inline u16 davinci_i2c_read_reg(struct davinci_i2c_dev *i2c_dev, int reg) > } > > /* > + * Configure the i2c data pin as a GPIO input and the i2c clock pin as a > + * high GPIO output. > + */ > +static void disable_i2c_pins(void) > +{ > + unsigned long flags; > + > + local_irq_save(flags); > + if (cpu_is_davinci_dm355()) { > + gpio_direction_input(15); > + gpio_direction_output(14, 0); > + gpio_set_value(14, 1); Why not just: gpio_direction_output(14, 1); > + davinci_cfg_reg(DM355_I2C_SDA); > + davinci_cfg_reg(DM355_I2C_SCL); Why enable the pins here? > + } > + local_irq_restore(flags); > +} > + > +/* Connect the i2c pins to the i2c controller. */ > +static void enable_i2c_pins(void) > +{ > + unsigned long flags; > + > + local_irq_save(flags); > + if (cpu_is_davinci_dm355()) { > + davinci_cfg_reg(DM355_I2C_SDA); > + davinci_cfg_reg(DM355_I2C_SCL); > + } > + local_irq_restore(flags); > +} > + > + > +/* Generate a pulse on the i2c clock pin. */ > +static void pulse_i2c_clock(void) > +{ > + if (cpu_is_davinci_dm355()) { > + gpio_set_value(14, 0); > + udelay(20); > + gpio_set_value(14, 1); > + udelay(20); > + } > +} > + > +/* > * This functions configures I2C and brings I2C out of reset. > * This function is called during I2C init function. This function > * also gets called if I2C encounters any errors. > @@ -221,14 +269,36 @@ static int i2c_davinci_wait_bus_not_busy(struct davinci_i2c_dev *dev, > char allow_sleep) > { > unsigned long timeout; > + u16 i; > + static u16 to_cnt = 0; > + u32 flag = 0; > > timeout = jiffies + dev->adapter.timeout; > while (davinci_i2c_read_reg(dev, DAVINCI_I2C_STR_REG) > - & DAVINCI_I2C_STR_BB) { > - if (time_after(jiffies, timeout)) { > - dev_warn(dev->dev, > - "timeout waiting for bus ready\n"); > - return -ETIMEDOUT; > + & DAVINCI_I2C_STR_BB) { > + > + if (to_cnt <= DAVINCI_I2C_MAX_TRIES) { > + if (time_after(jiffies, timeout)) { > + dev_warn(dev->dev, > + "timeout waiting for bus ready\n"); > + to_cnt++; > + return -ETIMEDOUT; > + } > + } else if (cpu_is_davinci_dm644x() || cpu_is_davinci_dm355()) { > + to_cnt = 0; > + dev_err(dev->dev, "initiating i2c bus recovery\n"); > + /* Send the NACK to the slave */ > + flag = davinci_i2c_read_reg(dev, DAVINCI_I2C_IMR_REG); > + flag |= DAVINCI_I2C_MDR_NACK; Superflous space here... > + /* write the data into mode register */ > + davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag); How come you're reading from the interrupt mask register but writing into the mode register which has different layout? :-O > + /* Disable i2c */ > + disable_i2c_pins(); > + for (i = 0; i < 10; i++) > + pulse_i2c_clock(); > + /* Re-enable i2c */ > + enable_i2c_pins(); > + i2c_davinci_init(dev); > } > if (allow_sleep) > schedule_timeout(1); > @@ -309,7 +379,23 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop) > r = wait_for_completion_interruptible_timeout(&dev->cmd_complete, > dev->adapter.timeout); > if (r == 0) { > - dev_err(dev->dev, "controller timed out\n"); > + u16 i; > + u32 flag = 0; > + if (cpu_is_davinci_dm644x() || cpu_is_davinci_dm355()) { > + dev_err(dev->dev, "initiating i2c bus recovery\n"); > + /* Send the NACK to the slave */ > + flag = davinci_i2c_read_reg(dev, DAVINCI_I2C_IMR_REG); > + flag |= DAVINCI_I2C_MDR_NACK; ... and here. > + /* write the data into mode register */ > + davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag); > + /* Disable i2c */ > + disable_i2c_pins(); > + /* Send high and low on the SCL line */ > + for (i = 0; i < 10; i++) > + pulse_i2c_clock(); > + /* Re-enable i2c */ > + enable_i2c_pins(); Please factor out the completely identical recovery procedures into the > + } > i2c_davinci_init(dev); > dev->buf_len = 0; > return -ETIMEDOUT; WBR, Sergei
On Wednesday 15 July 2009, Philby John wrote: > Â /* > + * Configure the i2c data pin as a GPIO input and the i2c clock pin as a > + * high GPIO output. > + */ > +static void disable_i2c_pins(void) > +{ > +Â Â Â Â Â Â Â unsigned long flags; > + > +Â Â Â Â Â Â Â local_irq_save(flags); > +Â Â Â Â Â Â Â if (cpu_is_davinci_dm355()) { > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â gpio_direction_input(15); > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â gpio_direction_output(14, 0); > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â gpio_set_value(14, 1); As noted: gpio_direction_output(14, 1) is better. > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â davinci_cfg_reg(DM355_I2C_SDA); > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â davinci_cfg_reg(DM355_I2C_SCL); > +Â Â Â Â Â Â Â } > +Â Â Â Â Â Â Â local_irq_restore(flags); > +} > + > +/* Connect the i2c pins to the i2c controller. */ > +static void enable_i2c_pins(void) > +{ > +Â Â Â Â Â Â Â unsigned long flags; > + > +Â Â Â Â Â Â Â local_irq_save(flags); > +Â Â Â Â Â Â Â if (cpu_is_davinci_dm355()) { > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â davinci_cfg_reg(DM355_I2C_SDA); > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â davinci_cfg_reg(DM355_I2C_SCL); > +Â Â Â Â Â Â Â } > +Â Â Â Â Â Â Â local_irq_restore(flags); > +} > + > + > +/* Generate a pulse on the i2c clock pin. */ > +static void pulse_i2c_clock(void) > +{ > +Â Â Â Â Â Â Â if (cpu_is_davinci_dm355()) { > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â gpio_set_value(14, 0); > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â udelay(20); > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â gpio_set_value(14, 1); > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â udelay(20); > +Â Â Â Â Â Â Â } > +} > + The general problem with how that's done is that the SoC-specific bits should not be in this file. The mach-davinc/dm355.c file should hold that configuration; likewise for other SoCs. > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â /* Disable i2c */ > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â disable_i2c_pins(); > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â for (i = 0; i < 10; i++) > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â pulse_i2c_clock(); > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â /* Re-enable i2c */ > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â enable_i2c_pins(); A better description of this is that you're trying to follow the I2Cv3 instructions about how to *reset* the bus, yes? > +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â i2c_davinci_init(dev); >
Philby John wrote: >>From dbe7e824d576636bb15b82a20fd2557fddc9a8f7 Mon Sep 17 00:00:00 2001 > From: Philby John <pjohn@in.mvista.com> > Date: Tue, 14 Jul 2009 21:46:47 +0530 > Subject: [PATCH] Reset i2c bus to come out of time out conditions > > Get out of i2c time out condition by resetting > the i2c bus. The kernel must be robust enough to > gracefully recover from i2c bus failure without having > to reset the machine. This is done by first NACKing the slave > and then resetting the i2c bus after a certain timeout. > > Signed-off-by: Philby John <pjohn@in.mvista.com> > --- I personally like the idea behind this patch. But I have heard others argue against it. But it is not related to the ^C issue others have mentioned. That should not happen in the GIT kernel. > drivers/i2c/busses/i2c-davinci.c | 98 +++++++++++++++++++++++++++++++++++-- > 1 files changed, 92 insertions(+), 6 deletions(-) > > diff --git a/drivers/i2c/busses/i2c-davinci.c b/drivers/i2c/busses/i2c-davinci.c > index 17f2ee7..4ed1a4c 100755 > --- a/drivers/i2c/busses/i2c-davinci.c > +++ b/drivers/i2c/busses/i2c-davinci.c > @@ -35,14 +35,18 @@ > #include <linux/interrupt.h> > #include <linux/platform_device.h> > #include <linux/io.h> > +#include <linux/gpio.h> > > #include <mach/hardware.h> > > #include <mach/i2c.h> > +#include <mach/mux.h> > +#include <mach/cputype.h> > > /* ----- global defines ----------------------------------------------- */ > > #define DAVINCI_I2C_TIMEOUT (1*HZ) > +#define DAVINCI_I2C_MAX_TRIES 2 > #define I2C_DAVINCI_INTR_ALL (DAVINCI_I2C_IMR_AAS | \ > DAVINCI_I2C_IMR_SCD | \ > DAVINCI_I2C_IMR_ARDY | \ > @@ -135,6 +139,50 @@ static inline u16 davinci_i2c_read_reg(struct davinci_i2c_dev *i2c_dev, int reg) > } > > /* > + * Configure the i2c data pin as a GPIO input and the i2c clock pin as a > + * high GPIO output. > + */ > +static void disable_i2c_pins(void) > +{ > + unsigned long flags; > + > + local_irq_save(flags); > + if (cpu_is_davinci_dm355()) { > + gpio_direction_input(15); > + gpio_direction_output(14, 0); > + gpio_set_value(14, 1); > + davinci_cfg_reg(DM355_I2C_SDA); > + davinci_cfg_reg(DM355_I2C_SCL); > + } > + local_irq_restore(flags); > +} > + > +/* Connect the i2c pins to the i2c controller. */ > +static void enable_i2c_pins(void) > +{ > + unsigned long flags; > + > + local_irq_save(flags); > + if (cpu_is_davinci_dm355()) { > + davinci_cfg_reg(DM355_I2C_SDA); > + davinci_cfg_reg(DM355_I2C_SCL); > + } > + local_irq_restore(flags); > +} > + > + > +/* Generate a pulse on the i2c clock pin. */ > +static void pulse_i2c_clock(void) > +{ > + if (cpu_is_davinci_dm355()) { > + gpio_set_value(14, 0); > + udelay(20); > + gpio_set_value(14, 1); > + udelay(20); > + } > +} > + > +/* > * This functions configures I2C and brings I2C out of reset. > * This function is called during I2C init function. This function > * also gets called if I2C encounters any errors. > @@ -221,14 +269,36 @@ static int i2c_davinci_wait_bus_not_busy(struct davinci_i2c_dev *dev, > char allow_sleep) > { > unsigned long timeout; > + u16 i; > + static u16 to_cnt = 0; > + u32 flag = 0; > > timeout = jiffies + dev->adapter.timeout; > while (davinci_i2c_read_reg(dev, DAVINCI_I2C_STR_REG) > - & DAVINCI_I2C_STR_BB) { > - if (time_after(jiffies, timeout)) { > - dev_warn(dev->dev, > - "timeout waiting for bus ready\n"); > - return -ETIMEDOUT; > + & DAVINCI_I2C_STR_BB) { > + > + if (to_cnt <= DAVINCI_I2C_MAX_TRIES) { > + if (time_after(jiffies, timeout)) { > + dev_warn(dev->dev, > + "timeout waiting for bus ready\n"); > + to_cnt++; > + return -ETIMEDOUT; > + } > + } else if (cpu_is_davinci_dm644x() || cpu_is_davinci_dm355()) { I would not initiate recovery until a timeout occurs. This can be a multi master bus, so a busy condition may be valid. Then, after multiple timeouts and recovery attempts, return -ETIMEDOUT > + to_cnt = 0; > + dev_err(dev->dev, "initiating i2c bus recovery\n"); > + /* Send the NACK to the slave */ > + flag = davinci_i2c_read_reg(dev, DAVINCI_I2C_IMR_REG); > + flag |= DAVINCI_I2C_MDR_NACK; > + /* write the data into mode register */ > + davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag); > + /* Disable i2c */ > + disable_i2c_pins(); > + for (i = 0; i < 10; i++) > + pulse_i2c_clock(); > + /* Re-enable i2c */ > + enable_i2c_pins(); > + i2c_davinci_init(dev); > } > if (allow_sleep) > schedule_timeout(1); > @@ -309,7 +379,23 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop) > r = wait_for_completion_interruptible_timeout(&dev->cmd_complete, > dev->adapter.timeout); > if (r == 0) { > - dev_err(dev->dev, "controller timed out\n"); > + u16 i; > + u32 flag = 0; > + if (cpu_is_davinci_dm644x() || cpu_is_davinci_dm355()) { > + dev_err(dev->dev, "initiating i2c bus recovery\n"); > + /* Send the NACK to the slave */ > + flag = davinci_i2c_read_reg(dev, DAVINCI_I2C_IMR_REG); > + flag |= DAVINCI_I2C_MDR_NACK; > + /* write the data into mode register */ > + davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag); > + /* Disable i2c */ > + disable_i2c_pins(); > + /* Send high and low on the SCL line */ > + for (i = 0; i < 10; i++) > + pulse_i2c_clock(); > + /* Re-enable i2c */ > + enable_i2c_pins(); > + } > i2c_davinci_init(dev); > dev->buf_len = 0; > return -ETIMEDOUT;
Hello, ----- Original Message ---- > From: Philby John <pjohn@in.mvista.com> > To: linux-i2c@vger.kernel.org > Cc: khali@linux-fr.org; davinci-linux-open-source@linux.davincidsp.com > Sent: Wednesday, July 15, 2009 13:04:27 > Subject: [PATCH/RFC 1/1] recover from davinci i2c time out conditions > > >From dbe7e824d576636bb15b82a20fd2557fddc9a8f7 Mon Sep 17 00:00:00 2001 > From: Philby John > Date: Tue, 14 Jul 2009 21:46:47 +0530 > Subject: [PATCH] Reset i2c bus to come out of time out conditions > > Get out of i2c time out condition by resetting > the i2c bus. The kernel must be robust enough to > gracefully recover from i2c bus failure without having > to reset the machine. This is done by first NACKing the slave > and then resetting the i2c bus after a certain timeout. > > Signed-off-by: Philby John I tried this on DM6443 based board with 2.6.18 kernel. The result I am posting below. It gives controller time out again and again. dhcppc9 login: i2c_davinci i2c_davinci.1: controller timed out i2c_davinci i2c_davinci.1: initiating i2c bus recovery i2c_davinci i2c_davinci.1: controller timed out i2c_davinci i2c_davinci.1: initiating i2c bus recovery i2c_davinci i2c_davinci.1: controller timed out i2c_davinci i2c_davinci.1: initiating i2c bus recovery i2c_davinci i2c_davinci.1: controller timed out i2c_davinci i2c_davinci.1: initiating i2c bus recovery i2c_davinci i2c_davinci.1: controller timed out i2c_davinci i2c_davinci.1: initiating i2c bus recovery i2c_davinci i2c_davinci.1: controller timed out i2c_davinci i2c_davinci.1: initiating i2c bus recovery i2c_davinci i2c_davinci.1: controller timed out i2c_davinci i2c_davinci.1: initiating i2c bus recovery i2c_davinci i2c_davinci.1: controller timed out i2c_davinci i2c_davinci.1: initiating i2c bus recovery i2c_davinci i2c_davinci.1: controller timed out i2c_davinci i2c_davinci.1: initiating i2c bus recovery i2c_davinci i2c_davinci.1: controller timed out i2c_davinci i2c_davinci.1: initiating i2c bus recovery i2c_davinci i2c_davinci.1: controller timed out i2c_davinci i2c_davinci.1: initiating i2c bus recovery regards -Nitin > --- > drivers/i2c/busses/i2c-davinci.c | 98 +++++++++++++++++++++++++++++++++++-- > 1 files changed, 92 insertions(+), 6 deletions(-) > > diff --git a/drivers/i2c/busses/i2c-davinci.c b/drivers/i2c/busses/i2c-davinci.c > index 17f2ee7..4ed1a4c 100755 > --- a/drivers/i2c/busses/i2c-davinci.c > +++ b/drivers/i2c/busses/i2c-davinci.c > @@ -35,14 +35,18 @@ > #include > #include > #include > +#include > > #include > > #include > +#include > +#include > > /* ----- global defines ----------------------------------------------- */ > > #define DAVINCI_I2C_TIMEOUT (1*HZ) > +#define DAVINCI_I2C_MAX_TRIES 2 > #define I2C_DAVINCI_INTR_ALL (DAVINCI_I2C_IMR_AAS | \ > DAVINCI_I2C_IMR_SCD | \ > DAVINCI_I2C_IMR_ARDY | \ > @@ -135,6 +139,50 @@ static inline u16 davinci_i2c_read_reg(struct > davinci_i2c_dev *i2c_dev, int reg) > } > > /* > + * Configure the i2c data pin as a GPIO input and the i2c clock pin as a > + * high GPIO output. > + */ > +static void disable_i2c_pins(void) > +{ > + unsigned long flags; > + > + local_irq_save(flags); > + if (cpu_is_davinci_dm355()) { > + gpio_direction_input(15); > + gpio_direction_output(14, 0); > + gpio_set_value(14, 1); > + davinci_cfg_reg(DM355_I2C_SDA); > + davinci_cfg_reg(DM355_I2C_SCL); > + } > + local_irq_restore(flags); > +} > + > +/* Connect the i2c pins to the i2c controller. */ > +static void enable_i2c_pins(void) > +{ > + unsigned long flags; > + > + local_irq_save(flags); > + if (cpu_is_davinci_dm355()) { > + davinci_cfg_reg(DM355_I2C_SDA); > + davinci_cfg_reg(DM355_I2C_SCL); > + } > + local_irq_restore(flags); > +} > + > + > +/* Generate a pulse on the i2c clock pin. */ > +static void pulse_i2c_clock(void) > +{ > + if (cpu_is_davinci_dm355()) { > + gpio_set_value(14, 0); > + udelay(20); > + gpio_set_value(14, 1); > + udelay(20); > + } > +} > + > +/* > * This functions configures I2C and brings I2C out of reset. > * This function is called during I2C init function. This function > * also gets called if I2C encounters any errors. > @@ -221,14 +269,36 @@ static int i2c_davinci_wait_bus_not_busy(struct > davinci_i2c_dev *dev, > char allow_sleep) > { > unsigned long timeout; > + u16 i; > + static u16 to_cnt = 0; > + u32 flag = 0; > > timeout = jiffies + dev->adapter.timeout; > while (davinci_i2c_read_reg(dev, DAVINCI_I2C_STR_REG) > - & DAVINCI_I2C_STR_BB) { > - if (time_after(jiffies, timeout)) { > - dev_warn(dev->dev, > - "timeout waiting for bus ready\n"); > - return -ETIMEDOUT; > + & DAVINCI_I2C_STR_BB) { > + > + if (to_cnt <= DAVINCI_I2C_MAX_TRIES) { > + if (time_after(jiffies, timeout)) { > + dev_warn(dev->dev, > + "timeout waiting for bus ready\n"); > + to_cnt++; > + return -ETIMEDOUT; > + } > + } else if (cpu_is_davinci_dm644x() || cpu_is_davinci_dm355()) { > + to_cnt = 0; > + dev_err(dev->dev, "initiating i2c bus recovery\n"); > + /* Send the NACK to the slave */ > + flag = davinci_i2c_read_reg(dev, DAVINCI_I2C_IMR_REG); > + flag |= DAVINCI_I2C_MDR_NACK; > + /* write the data into mode register */ > + davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag); > + /* Disable i2c */ > + disable_i2c_pins(); > + for (i = 0; i < 10; i++) > + pulse_i2c_clock(); > + /* Re-enable i2c */ > + enable_i2c_pins(); > + i2c_davinci_init(dev); > } > if (allow_sleep) > schedule_timeout(1); > @@ -309,7 +379,23 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct > i2c_msg *msg, int stop) > r = wait_for_completion_interruptible_timeout(&dev->cmd_complete, > dev->adapter.timeout); > if (r == 0) { > - dev_err(dev->dev, "controller timed out\n"); > + u16 i; > + u32 flag = 0; > + if (cpu_is_davinci_dm644x() || cpu_is_davinci_dm355()) { > + dev_err(dev->dev, "initiating i2c bus recovery\n"); > + /* Send the NACK to the slave */ > + flag = davinci_i2c_read_reg(dev, DAVINCI_I2C_IMR_REG); > + flag |= DAVINCI_I2C_MDR_NACK; > + /* write the data into mode register */ > + davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag); > + /* Disable i2c */ > + disable_i2c_pins(); > + /* Send high and low on the SCL line */ > + for (i = 0; i < 10; i++) > + pulse_i2c_clock(); > + /* Re-enable i2c */ > + enable_i2c_pins(); > + } > i2c_davinci_init(dev); > dev->buf_len = 0; > return -ETIMEDOUT; > -- > 1.6.3.3.MVISTA > > > _______________________________________________ > Davinci-linux-open-source mailing list > Davinci-linux-open-source@linux.davincidsp.com > http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source New Email addresses available on Yahoo! Get the Email name you've always wanted on the new @ymail and @rocketmail. Hurry before someone else does! http://mail.promotions.yahoo.com/newdomains/aa/
On Wed, 2009-07-22 at 04:03 -0700, Nitin Mahajan wrote: > Hello, > > ----- Original Message ---- > > From: Philby John <pjohn@in.mvista.com> > > To: linux-i2c@vger.kernel.org > > Cc: khali@linux-fr.org; davinci-linux-open-source@linux.davincidsp.com > > Sent: Wednesday, July 15, 2009 13:04:27 > > Subject: [PATCH/RFC 1/1] recover from davinci i2c time out conditions > > > > >From dbe7e824d576636bb15b82a20fd2557fddc9a8f7 Mon Sep 17 00:00:00 2001 > > From: Philby John > > Date: Tue, 14 Jul 2009 21:46:47 +0530 > > Subject: [PATCH] Reset i2c bus to come out of time out conditions > > > > Get out of i2c time out condition by resetting > > the i2c bus. The kernel must be robust enough to > > gracefully recover from i2c bus failure without having > > to reset the machine. This is done by first NACKing the slave > > and then resetting the i2c bus after a certain timeout. > > > > Signed-off-by: Philby John > > I tried this on DM6443 based board with 2.6.18 kernel. The result I am posting below. It gives controller time out again and again. > > dhcppc9 login: i2c_davinci i2c_davinci.1: controller timed out > i2c_davinci i2c_davinci.1: initiating i2c bus recovery > i2c_davinci i2c_davinci.1: controller timed out > i2c_davinci i2c_davinci.1: initiating i2c bus recovery There is something gravely wrong about this patch and I would submit a fix shortly incorporating the review comments. But please be aware that I do not guarantee a definitive time line for a fix cause I have much at hand at the moment. Regards, Philby
Troy, > <Snip> >I personally like the idea behind this patch. But I have >heard others argue against it. But it is not related to the >^C issue others have mentioned.That should not happen in >the GIT kernel. > I do get this ^c timeout issue in DM6446 and DM355. I have the video loopback application running that uses tvp5146 to capture from a video source. When I kill the application it starts giving the error while the tvp5146 driver tries to send i2c commands to stop capture at tvp5146. But in this case, it works again when the application is run again. But when I have mt9t031 connected and I do the same thing, it also fails with timeout when application is killed. But it never recovers and I have to reboot the board to recover from the error. So what you mean by "That should not happen in the GIT kernel" ? Could you explain please? Murali
Karicheri, Muralidharan wrote: > Troy, > <Snip> > >> I personally like the idea behind this patch. But I have >> heard others argue against it. But it is not related to the >> ^C issue others have mentioned.That should not happen in >> the GIT kernel. >> > I do get this ^c timeout issue in DM6446 and DM355. I have the video loopback application running that uses tvp5146 to capture from a video source. When I kill the application it starts giving the error while > the tvp5146 driver tries to send i2c commands to stop capture at tvp5146. > But in this case, it works again when the application is run again. But when I have mt9t031 connected and I do the same thing, it also fails with timeout when application is killed. But it never recovers and I have to reboot the board to recover from the error. So what you mean by "That should not happen in the GIT kernel" ? > > Could you explain please? > > Murali > please see commit 5a0d5f5ffa5d294d895ef54fc220c6182db63998 I don't know if your issue has the same root cause.
The patch submitted appears specific to the dm355. The changes are very similar to the 2.6.10 kernel from mv. If the correct gpio's and pinmux are disabled/enabled it should work for the dm644x. I took the patch from Philby and tried it on our dm6443 platform (on a 2.6.28 kernel) and it appears to work for the problem we have when the i2c appears to lock up. Craig On Wednesday 22 July 2009 5:14:35 am Philby John wrote: > On Wed, 2009-07-22 at 04:03 -0700, Nitin Mahajan wrote: > > Hello, > > > > ----- Original Message ---- > > > > > From: Philby John <pjohn@in.mvista.com> > > > To: linux-i2c@vger.kernel.org > > > Cc: khali@linux-fr.org; davinci-linux-open-source@linux.davincidsp.com > > > Sent: Wednesday, July 15, 2009 13:04:27 > > > Subject: [PATCH/RFC 1/1] recover from davinci i2c time out conditions > > > > > > >From dbe7e824d576636bb15b82a20fd2557fddc9a8f7 Mon Sep 17 00:00:00 2001 > > > > > > From: Philby John > > > Date: Tue, 14 Jul 2009 21:46:47 +0530 > > > Subject: [PATCH] Reset i2c bus to come out of time out conditions > > > > > > Get out of i2c time out condition by resetting > > > the i2c bus. The kernel must be robust enough to > > > gracefully recover from i2c bus failure without having > > > to reset the machine. This is done by first NACKing the slave > > > and then resetting the i2c bus after a certain timeout. > > > > > > Signed-off-by: Philby John > > > > I tried this on DM6443 based board with 2.6.18 kernel. The result I am > > posting below. It gives controller time out again and again. > > > > dhcppc9 login: i2c_davinci i2c_davinci.1: controller timed out > > i2c_davinci i2c_davinci.1: initiating i2c bus recovery > > i2c_davinci i2c_davinci.1: controller timed out > > i2c_davinci i2c_davinci.1: initiating i2c bus recovery > > There is something gravely wrong about this patch and I would submit a > fix shortly incorporating the review comments. But please be aware that > I do not guarantee a definitive time line for a fix cause I have much at > hand at the moment. > > > Regards, > Philby > > > _______________________________________________ > Davinci-linux-open-source mailing list > Davinci-linux-open-source@linux.davincidsp.com > http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
Hello Craig, Good to know. With out any modifications on a DM6443? Regards, Philby On Fri, 2009-09-18 at 23:12 -0600, Craig Matsuura wrote: > The patch submitted appears specific to the dm355. The changes are > very similar to the 2.6.10 kernel from mv. If the correct gpio's and > pinmux are disabled/enabled it should work for the dm644x. > > > > I took the patch from Philby and tried it on our dm6443 platform (on a > 2.6.28 kernel) and it appears to work for the problem we have when the > i2c appears to lock up. > > > > Craig > > > > > On Wednesday 22 July 2009 5:14:35 am Philby John wrote: > > On Wed, 2009-07-22 at 04:03 -0700, Nitin Mahajan wrote: > > > Hello, > > > > > > ----- Original Message ---- > > > > > > > From: Philby John <pjohn@in.mvista.com> > > > > To: linux-i2c@vger.kernel.org > > > > Cc: khali@linux-fr.org; > davinci-linux-open-source@linux.davincidsp.com > > > > Sent: Wednesday, July 15, 2009 13:04:27 > > > > Subject: [PATCH/RFC 1/1] recover from davinci i2c time out > conditions > > > > > > > > >From dbe7e824d576636bb15b82a20fd2557fddc9a8f7 Mon Sep 17 > 00:00:00 2001 > > > > > > > > From: Philby John > > > > Date: Tue, 14 Jul 2009 21:46:47 +0530 > > > > Subject: [PATCH] Reset i2c bus to come out of time out > conditions > > > > > > > > Get out of i2c time out condition by resetting > > > > the i2c bus. The kernel must be robust enough to > > > > gracefully recover from i2c bus failure without having > > > > to reset the machine. This is done by first NACKing the slave > > > > and then resetting the i2c bus after a certain timeout. > > > > > > > > Signed-off-by: Philby John > > > > > > I tried this on DM6443 based board with 2.6.18 kernel. The result > I am > > > posting below. It gives controller time out again and again. > > > > > > dhcppc9 login: i2c_davinci i2c_davinci.1: controller timed out > > > i2c_davinci i2c_davinci.1: initiating i2c bus recovery > > > i2c_davinci i2c_davinci.1: controller timed out > > > i2c_davinci i2c_davinci.1: initiating i2c bus recovery > > > > There is something gravely wrong about this patch and I would submit > a > > fix shortly incorporating the review comments. But please be aware > that > > I do not guarantee a definitive time line for a fix cause I have > much at > > hand at the moment. > > > > > > Regards, > > Philby > > > > > > _______________________________________________ > > Davinci-linux-open-source mailing list > > Davinci-linux-open-source@linux.davincidsp.com > > > http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source > > -- > > > > > > ______________________________________________________________________ > > > Craig Matsuura - Principal Engineer > Control4 > 11734 South Election Road - Suite 200 > Salt Lake City, UT 84020-6432 > PH: 801-523-3161 > FX: 801-523-3199 >
i did modify the patch to work for the dm644x. I believe it is correct, I looked at the 2.6.10 kernel and made the changes to your the i2c-davinci.c after patching it with your patch. It did nothing without the changes from the 2.6.10 kernel. Craig On Monday 21 September 2009 12:31:00 am Philby John wrote: > Hello Craig, > > Good to know. With out any modifications on a DM6443? > > Regards, > Philby > > On Fri, 2009-09-18 at 23:12 -0600, Craig Matsuura wrote: > > The patch submitted appears specific to the dm355. The changes are > > very similar to the 2.6.10 kernel from mv. If the correct gpio's and > > pinmux are disabled/enabled it should work for the dm644x. > > > > > > > > I took the patch from Philby and tried it on our dm6443 platform (on a > > 2.6.28 kernel) and it appears to work for the problem we have when the > > i2c appears to lock up. > > > > > > > > Craig > > > > On Wednesday 22 July 2009 5:14:35 am Philby John wrote: > > > On Wed, 2009-07-22 at 04:03 -0700, Nitin Mahajan wrote: > > > > Hello, > > > > > > > > ----- Original Message ---- > > > > > > > > > From: Philby John <pjohn@in.mvista.com> > > > > > To: linux-i2c@vger.kernel.org > > > > > Cc: khali@linux-fr.org; > > > > davinci-linux-open-source@linux.davincidsp.com > > > > > > > Sent: Wednesday, July 15, 2009 13:04:27 > > > > > Subject: [PATCH/RFC 1/1] recover from davinci i2c time out > > > > conditions > > > > > > > >From dbe7e824d576636bb15b82a20fd2557fddc9a8f7 Mon Sep 17 > > > > 00:00:00 2001 > > > > > > > From: Philby John > > > > > Date: Tue, 14 Jul 2009 21:46:47 +0530 > > > > > Subject: [PATCH] Reset i2c bus to come out of time out > > > > conditions > > > > > > > Get out of i2c time out condition by resetting > > > > > the i2c bus. The kernel must be robust enough to > > > > > gracefully recover from i2c bus failure without having > > > > > to reset the machine. This is done by first NACKing the slave > > > > > and then resetting the i2c bus after a certain timeout. > > > > > > > > > > Signed-off-by: Philby John > > > > > > > > I tried this on DM6443 based board with 2.6.18 kernel. The result > > > > I am > > > > > > posting below. It gives controller time out again and again. > > > > > > > > dhcppc9 login: i2c_davinci i2c_davinci.1: controller timed out > > > > i2c_davinci i2c_davinci.1: initiating i2c bus recovery > > > > i2c_davinci i2c_davinci.1: controller timed out > > > > i2c_davinci i2c_davinci.1: initiating i2c bus recovery > > > > > > There is something gravely wrong about this patch and I would submit > > > > a > > > > > fix shortly incorporating the review comments. But please be aware > > > > that > > > > > I do not guarantee a definitive time line for a fix cause I have > > > > much at > > > > > hand at the moment. > > > > > > > > > Regards, > > > Philby > > > > > > > > > _______________________________________________ > > > Davinci-linux-open-source mailing list > > > Davinci-linux-open-source@linux.davincidsp.com > > > > http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source > > > > -- > > > > > > > > > > > > ______________________________________________________________________ > > > > > > Craig Matsuura - Principal Engineer > > Control4 > > 11734 South Election Road - Suite 200 > > Salt Lake City, UT 84020-6432 > > PH: 801-523-3161 > > FX: 801-523-3199
Philby, Sorry, I forgot to mention, I did correct a problem with accessing a regs, it is where yo usend a NACK. I changed the read from DAVINCI_I2C_IMR_REG to DAVINCI_I2C_MDR_REG. + flag = davinci_i2c_read_reg(dev, DAVINCI_I2C_IMR_REG); + flag |= DAVINCI_I2C_MDR_NACK; + /* write the data into mode register */ + davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag); Craig On Monday 21 September 2009 12:31:00 am Philby John wrote: > Hello Craig, > > Good to know. With out any modifications on a DM6443? > > Regards, > Philby > > On Fri, 2009-09-18 at 23:12 -0600, Craig Matsuura wrote: > > The patch submitted appears specific to the dm355. The changes are > > very similar to the 2.6.10 kernel from mv. If the correct gpio's and > > pinmux are disabled/enabled it should work for the dm644x. > > > > > > > > I took the patch from Philby and tried it on our dm6443 platform (on a > > 2.6.28 kernel) and it appears to work for the problem we have when the > > i2c appears to lock up. > > > > > > > > Craig > > > > On Wednesday 22 July 2009 5:14:35 am Philby John wrote: > > > On Wed, 2009-07-22 at 04:03 -0700, Nitin Mahajan wrote: > > > > Hello, > > > > > > > > ----- Original Message ---- > > > > > > > > > From: Philby John <pjohn@in.mvista.com> > > > > > To: linux-i2c@vger.kernel.org > > > > > Cc: khali@linux-fr.org; > > > > davinci-linux-open-source@linux.davincidsp.com > > > > > > > Sent: Wednesday, July 15, 2009 13:04:27 > > > > > Subject: [PATCH/RFC 1/1] recover from davinci i2c time out > > > > conditions > > > > > > > >From dbe7e824d576636bb15b82a20fd2557fddc9a8f7 Mon Sep 17 > > > > 00:00:00 2001 > > > > > > > From: Philby John > > > > > Date: Tue, 14 Jul 2009 21:46:47 +0530 > > > > > Subject: [PATCH] Reset i2c bus to come out of time out > > > > conditions > > > > > > > Get out of i2c time out condition by resetting > > > > > the i2c bus. The kernel must be robust enough to > > > > > gracefully recover from i2c bus failure without having > > > > > to reset the machine. This is done by first NACKing the slave > > > > > and then resetting the i2c bus after a certain timeout. > > > > > > > > > > Signed-off-by: Philby John > > > > > > > > I tried this on DM6443 based board with 2.6.18 kernel. The result > > > > I am > > > > > > posting below. It gives controller time out again and again. > > > > > > > > dhcppc9 login: i2c_davinci i2c_davinci.1: controller timed out > > > > i2c_davinci i2c_davinci.1: initiating i2c bus recovery > > > > i2c_davinci i2c_davinci.1: controller timed out > > > > i2c_davinci i2c_davinci.1: initiating i2c bus recovery > > > > > > There is something gravely wrong about this patch and I would submit > > > > a > > > > > fix shortly incorporating the review comments. But please be aware > > > > that > > > > > I do not guarantee a definitive time line for a fix cause I have > > > > much at > > > > > hand at the moment. > > > > > > > > > Regards, > > > Philby > > > > > > > > > _______________________________________________ > > > Davinci-linux-open-source mailing list > > > Davinci-linux-open-source@linux.davincidsp.com > > > > http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source > > > > -- > > > > > > > > > > > > ______________________________________________________________________ > > > > > > Craig Matsuura - Principal Engineer > > Control4 > > 11734 South Election Road - Suite 200 > > Salt Lake City, UT 84020-6432 > > PH: 801-523-3161 > > FX: 801-523-3199
diff --git a/drivers/i2c/busses/i2c-davinci.c b/drivers/i2c/busses/i2c-davinci.c index 17f2ee7..4ed1a4c 100755 --- a/drivers/i2c/busses/i2c-davinci.c +++ b/drivers/i2c/busses/i2c-davinci.c @@ -35,14 +35,18 @@ #include <linux/interrupt.h> #include <linux/platform_device.h> #include <linux/io.h> +#include <linux/gpio.h> #include <mach/hardware.h> #include <mach/i2c.h> +#include <mach/mux.h> +#include <mach/cputype.h> /* ----- global defines ----------------------------------------------- */ #define DAVINCI_I2C_TIMEOUT (1*HZ) +#define DAVINCI_I2C_MAX_TRIES 2 #define I2C_DAVINCI_INTR_ALL (DAVINCI_I2C_IMR_AAS | \ DAVINCI_I2C_IMR_SCD | \ DAVINCI_I2C_IMR_ARDY | \ @@ -135,6 +139,50 @@ static inline u16 davinci_i2c_read_reg(struct davinci_i2c_dev *i2c_dev, int reg) } /* + * Configure the i2c data pin as a GPIO input and the i2c clock pin as a + * high GPIO output. + */ +static void disable_i2c_pins(void) +{ + unsigned long flags; + + local_irq_save(flags); + if (cpu_is_davinci_dm355()) { + gpio_direction_input(15); + gpio_direction_output(14, 0); + gpio_set_value(14, 1); + davinci_cfg_reg(DM355_I2C_SDA); + davinci_cfg_reg(DM355_I2C_SCL); + } + local_irq_restore(flags); +} + +/* Connect the i2c pins to the i2c controller. */ +static void enable_i2c_pins(void) +{ + unsigned long flags; + + local_irq_save(flags); + if (cpu_is_davinci_dm355()) { + davinci_cfg_reg(DM355_I2C_SDA); + davinci_cfg_reg(DM355_I2C_SCL); + } + local_irq_restore(flags); +} + + +/* Generate a pulse on the i2c clock pin. */ +static void pulse_i2c_clock(void) +{ + if (cpu_is_davinci_dm355()) { + gpio_set_value(14, 0); + udelay(20); + gpio_set_value(14, 1); + udelay(20); + } +} + +/* * This functions configures I2C and brings I2C out of reset. * This function is called during I2C init function. This function * also gets called if I2C encounters any errors. @@ -221,14 +269,36 @@ static int i2c_davinci_wait_bus_not_busy(struct davinci_i2c_dev *dev, char allow_sleep) { unsigned long timeout; + u16 i; + static u16 to_cnt = 0; + u32 flag = 0; timeout = jiffies + dev->adapter.timeout; while (davinci_i2c_read_reg(dev, DAVINCI_I2C_STR_REG) - & DAVINCI_I2C_STR_BB) { - if (time_after(jiffies, timeout)) { - dev_warn(dev->dev, - "timeout waiting for bus ready\n"); - return -ETIMEDOUT; + & DAVINCI_I2C_STR_BB) { + + if (to_cnt <= DAVINCI_I2C_MAX_TRIES) { + if (time_after(jiffies, timeout)) { + dev_warn(dev->dev, + "timeout waiting for bus ready\n"); + to_cnt++; + return -ETIMEDOUT; + } + } else if (cpu_is_davinci_dm644x() || cpu_is_davinci_dm355()) { + to_cnt = 0; + dev_err(dev->dev, "initiating i2c bus recovery\n"); + /* Send the NACK to the slave */ + flag = davinci_i2c_read_reg(dev, DAVINCI_I2C_IMR_REG); + flag |= DAVINCI_I2C_MDR_NACK; + /* write the data into mode register */ + davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag); + /* Disable i2c */ + disable_i2c_pins(); + for (i = 0; i < 10; i++) + pulse_i2c_clock(); + /* Re-enable i2c */ + enable_i2c_pins(); + i2c_davinci_init(dev); } if (allow_sleep) schedule_timeout(1); @@ -309,7 +379,23 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop) r = wait_for_completion_interruptible_timeout(&dev->cmd_complete, dev->adapter.timeout); if (r == 0) { - dev_err(dev->dev, "controller timed out\n"); + u16 i; + u32 flag = 0; + if (cpu_is_davinci_dm644x() || cpu_is_davinci_dm355()) { + dev_err(dev->dev, "initiating i2c bus recovery\n"); + /* Send the NACK to the slave */ + flag = davinci_i2c_read_reg(dev, DAVINCI_I2C_IMR_REG); + flag |= DAVINCI_I2C_MDR_NACK; + /* write the data into mode register */ + davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag); + /* Disable i2c */ + disable_i2c_pins(); + /* Send high and low on the SCL line */ + for (i = 0; i < 10; i++) + pulse_i2c_clock(); + /* Re-enable i2c */ + enable_i2c_pins(); + } i2c_davinci_init(dev); dev->buf_len = 0; return -ETIMEDOUT;