| Message ID | E1WerG4-0001X4-Ic@rmk-PC.arm.linux.org.uk (mailing list archive) |
|---|---|
| State | Awaiting Upstream |
| Headers | show |
On 04/28/2014 01:30 PM, Russell King wrote: > Since we now automatically enable early BRESP in core L2C-310 code when > we detect a Cortex-A9, we don't need platforms/SoCs to set this bit > explicitly. Instead, they should seek to preserve the value of bit 30 > in the auxiliary control register. Acked-by: Stephen Warren <swarren@nvidia.com> -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Mon, Apr 28, 2014 at 08:30:32PM +0100, Russell King wrote: > Since we now automatically enable early BRESP in core L2C-310 code when > we detect a Cortex-A9, we don't need platforms/SoCs to set this bit > explicitly. Instead, they should seek to preserve the value of bit 30 > in the auxiliary control register. > > Acked-by: Tony Lindgren <tony@atomide.com> > Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> I would prefer if this patch was broken out into individual patches for each board or SoC file and that they were then picked up by their respective platform maintainers. Likewise for patch 66/97. Although it is only for shmobile I would prefer it broken out. > --- > arch/arm/mach-berlin/berlin.c | 2 +- > arch/arm/mach-exynos/exynos.c | 4 ++-- > arch/arm/mach-omap2/omap4-common.c | 3 +-- > arch/arm/mach-shmobile/board-armadillo800eva-reference.c | 4 ++-- > arch/arm/mach-shmobile/board-armadillo800eva.c | 4 ++-- > arch/arm/mach-shmobile/board-kzm9g-reference.c | 4 ++-- > arch/arm/mach-shmobile/board-kzm9g.c | 4 ++-- > arch/arm/mach-shmobile/setup-r8a7778.c | 4 ++-- > arch/arm/mach-shmobile/setup-r8a7779.c | 4 ++-- > arch/arm/mach-spear/spear13xx.c | 2 +- > arch/arm/mach-tegra/tegra.c | 4 ++-- > 11 files changed, 19 insertions(+), 20 deletions(-) > > diff --git a/arch/arm/mach-berlin/berlin.c b/arch/arm/mach-berlin/berlin.c > index 025bcb5473eb..6709d2a6bec8 100644 > --- a/arch/arm/mach-berlin/berlin.c > +++ b/arch/arm/mach-berlin/berlin.c > @@ -24,7 +24,7 @@ static void __init berlin_init_machine(void) > * with DT probing for L2CCs, berlin_init_machine can be removed. > * Note: 88DE3005 (Armada 1500-mini) uses pl310 l2cc > */ > - l2x0_of_init(0x70c00000, 0xfeffffff); > + l2x0_of_init(0x30c00000, 0xfeffffff); > of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); > } > > diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c > index b32a907d021d..e6828fb46034 100644 > --- a/arch/arm/mach-exynos/exynos.c > +++ b/arch/arm/mach-exynos/exynos.c > @@ -32,8 +32,8 @@ > #include "mfc.h" > #include "regs-pmu.h" > > -#define L2_AUX_VAL 0x7C470001 > -#define L2_AUX_MASK 0xC200ffff > +#define L2_AUX_VAL 0x3c470001 > +#define L2_AUX_MASK 0xc200ffff > > static struct map_desc exynos4_iodesc[] __initdata = { > { > diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c > index dc9844a55443..9ce52548a484 100644 > --- a/arch/arm/mach-omap2/omap4-common.c > +++ b/arch/arm/mach-omap2/omap4-common.c > @@ -220,8 +220,7 @@ static int __init omap_l2_cache_init(void) > L2C_AUX_CTRL_WAY_SIZE(3) | > L2C_AUX_CTRL_SHARED_OVERRIDE | > L310_AUX_CTRL_DATA_PREFETCH | > - L310_AUX_CTRL_INSTR_PREFETCH | > - L310_AUX_CTRL_EARLY_BRESP; > + L310_AUX_CTRL_INSTR_PREFETCH; > > outer_cache.write_sec = omap4_l2c310_write_sec; > if (of_have_populated_dt()) > diff --git a/arch/arm/mach-shmobile/board-armadillo800eva-reference.c b/arch/arm/mach-shmobile/board-armadillo800eva-reference.c > index 57d1a78367b6..34e7f3c17dd2 100644 > --- a/arch/arm/mach-shmobile/board-armadillo800eva-reference.c > +++ b/arch/arm/mach-shmobile/board-armadillo800eva-reference.c > @@ -164,8 +164,8 @@ static void __init eva_init(void) > r8a7740_meram_workaround(); > > #ifdef CONFIG_CACHE_L2X0 > - /* Early BRESP enable, Shared attribute override enable, 32K*8way */ > - l2x0_init(IOMEM(0xf0002000), 0x40440000, 0x82000fff); > + /* Shared attribute override enable, 32K*8way */ > + l2x0_init(IOMEM(0xf0002000), 0x00440000, 0xc2000fff); > #endif > > r8a7740_add_standard_devices_dt(); > diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c > index 2858f380beae..7688990edd3a 100644 > --- a/arch/arm/mach-shmobile/board-armadillo800eva.c > +++ b/arch/arm/mach-shmobile/board-armadillo800eva.c > @@ -1270,8 +1270,8 @@ static void __init eva_init(void) > > > #ifdef CONFIG_CACHE_L2X0 > - /* Early BRESP enable, Shared attribute override enable, 32K*8way */ > - l2x0_init(IOMEM(0xf0002000), 0x40440000, 0x82000fff); > + /* Shared attribute override enable, 32K*8way */ > + l2x0_init(IOMEM(0xf0002000), 0x00440000, 0xc2000fff); > #endif > > i2c_register_board_info(0, i2c0_devices, ARRAY_SIZE(i2c0_devices)); > diff --git a/arch/arm/mach-shmobile/board-kzm9g-reference.c b/arch/arm/mach-shmobile/board-kzm9g-reference.c > index 598e32488410..85873f186d77 100644 > --- a/arch/arm/mach-shmobile/board-kzm9g-reference.c > +++ b/arch/arm/mach-shmobile/board-kzm9g-reference.c > @@ -36,8 +36,8 @@ static void __init kzm_init(void) > sh73a0_add_standard_devices_dt(); > > #ifdef CONFIG_CACHE_L2X0 > - /* Early BRESP enable, Shared attribute override enable, 64K*8way */ > - l2x0_init(IOMEM(0xf0100000), 0x40460000, 0x82000fff); > + /* Shared attribute override enable, 64K*8way */ > + l2x0_init(IOMEM(0xf0100000), 0x00460000, 0xc2000fff); > #endif > } > > diff --git a/arch/arm/mach-shmobile/board-kzm9g.c b/arch/arm/mach-shmobile/board-kzm9g.c > index 03dc3ac84502..ea9bf39fdc10 100644 > --- a/arch/arm/mach-shmobile/board-kzm9g.c > +++ b/arch/arm/mach-shmobile/board-kzm9g.c > @@ -876,8 +876,8 @@ static void __init kzm_init(void) > gpio_request_one(223, GPIOF_IN, NULL); /* IRQ8 */ > > #ifdef CONFIG_CACHE_L2X0 > - /* Early BRESP enable, Shared attribute override enable, 64K*8way */ > - l2x0_init(IOMEM(0xf0100000), 0x40460000, 0x82000fff); > + /* Shared attribute override enable, 64K*8way */ > + l2x0_init(IOMEM(0xf0100000), 0x00460000, 0xc2000fff); > #endif > > i2c_register_board_info(0, i2c0_devices, ARRAY_SIZE(i2c0_devices)); > diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c > index 6d694526e4ca..3a8e5316671e 100644 > --- a/arch/arm/mach-shmobile/setup-r8a7778.c > +++ b/arch/arm/mach-shmobile/setup-r8a7778.c > @@ -298,10 +298,10 @@ void __init r8a7778_add_dt_devices(void) > void __iomem *base = ioremap_nocache(0xf0100000, 0x1000); > if (base) { > /* > - * Early BRESP enable, Shared attribute override enable, 64K*16way > + * Shared attribute override enable, 64K*16way > * don't call iounmap(base) > */ > - l2x0_init(base, 0x40470000, 0x82000fff); > + l2x0_init(base, 0x00470000, 0xc2000fff); > } > #endif > > diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c > index 8e860b36997a..91c90bf0ae83 100644 > --- a/arch/arm/mach-shmobile/setup-r8a7779.c > +++ b/arch/arm/mach-shmobile/setup-r8a7779.c > @@ -700,8 +700,8 @@ static struct platform_device *r8a7779_standard_devices[] __initdata = { > void __init r8a7779_add_standard_devices(void) > { > #ifdef CONFIG_CACHE_L2X0 > - /* Early BRESP enable, Shared attribute override enable, 64K*16way */ > - l2x0_init(IOMEM(0xf0100000), 0x40470000, 0x82000fff); > + /* Shared attribute override enable, 64K*16way */ > + l2x0_init(IOMEM(0xf0100000), 0x00470000, 0xc2000fff); > #endif > r8a7779_pm_init(); > > diff --git a/arch/arm/mach-spear/spear13xx.c b/arch/arm/mach-spear/spear13xx.c > index 92860fa01668..dcb300443b66 100644 > --- a/arch/arm/mach-spear/spear13xx.c > +++ b/arch/arm/mach-spear/spear13xx.c > @@ -46,7 +46,7 @@ void __init spear13xx_l2x0_init(void) > */ > writel_relaxed(0x221, VA_L2CC_BASE + L310_TAG_LATENCY_CTRL); > writel_relaxed(0x441, VA_L2CC_BASE + L310_DATA_LATENCY_CTRL); > - l2x0_init(VA_L2CC_BASE, 0x70A60001, 0xfe00ffff); > + l2x0_init(VA_L2CC_BASE, 0x30a60001, 0xfe00ffff); > } > > /* > diff --git a/arch/arm/mach-tegra/tegra.c b/arch/arm/mach-tegra/tegra.c > index 6191603379e1..ecbb5411a104 100644 > --- a/arch/arm/mach-tegra/tegra.c > +++ b/arch/arm/mach-tegra/tegra.c > @@ -89,9 +89,9 @@ static void __init tegra_init_cache(void) > > cache_type = readl(p + L2X0_CACHE_TYPE); > aux_ctrl = (cache_type & 0x700) << (17-8); > - aux_ctrl |= 0x7C400001; > + aux_ctrl |= 0x3c400001; > > - ret = l2x0_of_init(aux_ctrl, 0x8200c3fe); > + ret = l2x0_of_init(aux_ctrl, 0xc200c3fe); > if (!ret) > l2x0_saved_regs_addr = virt_to_phys(&l2x0_saved_regs); > #endif > -- > 1.8.3.1 > -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Tue, Apr 29, 2014 at 09:02:27AM +0900, Simon Horman wrote: > On Mon, Apr 28, 2014 at 08:30:32PM +0100, Russell King wrote: > > Since we now automatically enable early BRESP in core L2C-310 code when > > we detect a Cortex-A9, we don't need platforms/SoCs to set this bit > > explicitly. Instead, they should seek to preserve the value of bit 30 > > in the auxiliary control register. > > > > Acked-by: Tony Lindgren <tony@atomide.com> > > Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> > > I would prefer if this patch was broken out into individual patches > for each board or SoC file and that they were then picked up > by their respective platform maintainers. > > Likewise for patch 66/97. Although it is only for shmobile > I would prefer it broken out. Oh fuck that. Okay, I'm dropping the whole patch set right now and forgetting the whole damned thing. The L2 cache code can damned well stay as it is and remain an unmaintainable mess.
On 04/28/2014 06:02 PM, Simon Horman wrote: > On Mon, Apr 28, 2014 at 08:30:32PM +0100, Russell King wrote: >> Since we now automatically enable early BRESP in core L2C-310 code when >> we detect a Cortex-A9, we don't need platforms/SoCs to set this bit >> explicitly. Instead, they should seek to preserve the value of bit 30 >> in the auxiliary control register. >> >> Acked-by: Tony Lindgren <tony@atomide.com> >> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> > > I would prefer if this patch was broken out into individual patches > for each board or SoC file and that they were then picked up > by their respective platform maintainers. > > Likewise for patch 66/97. Although it is only for shmobile > I would prefer it broken out. There are far too many dependencies in this series to break out the board file patches to be merged separately; it'd take either a whole bunch of kernel releases to merge it all that way, or a twisty maze of tiny topic branches cross-merged all over the place. Neither option is realistic. -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Tue, Apr 29, 2014 at 10:17:01AM -0600, Stephen Warren wrote: > On 04/28/2014 06:02 PM, Simon Horman wrote: > > On Mon, Apr 28, 2014 at 08:30:32PM +0100, Russell King wrote: > >> Since we now automatically enable early BRESP in core L2C-310 code when > >> we detect a Cortex-A9, we don't need platforms/SoCs to set this bit > >> explicitly. Instead, they should seek to preserve the value of bit 30 > >> in the auxiliary control register. > >> > >> Acked-by: Tony Lindgren <tony@atomide.com> > >> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> > > > > I would prefer if this patch was broken out into individual patches > > for each board or SoC file and that they were then picked up > > by their respective platform maintainers. > > > > Likewise for patch 66/97. Although it is only for shmobile > > I would prefer it broken out. > > There are far too many dependencies in this series to break out the > board file patches to be merged separately; it'd take either a whole > bunch of kernel releases to merge it all that way, or a twisty maze of > tiny topic branches cross-merged all over the place. Neither option is > realistic. Understood, that seems reasonable to me. For the shmobile portions this patch and 66/97. Acked-by: Simon Horman <horms+renesas@verge.net.au> -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Tue, 29 Apr 2014 01:21:41 +0100, Russell King - ARM Linux <linux@arm.linux.org.uk> wrote: > On Tue, Apr 29, 2014 at 09:02:27AM +0900, Simon Horman wrote: > > On Mon, Apr 28, 2014 at 08:30:32PM +0100, Russell King wrote: > > > Since we now automatically enable early BRESP in core L2C-310 code when > > > we detect a Cortex-A9, we don't need platforms/SoCs to set this bit > > > explicitly. Instead, they should seek to preserve the value of bit 30 > > > in the auxiliary control register. > > > > > > Acked-by: Tony Lindgren <tony@atomide.com> > > > Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> > > > > I would prefer if this patch was broken out into individual patches > > for each board or SoC file and that they were then picked up > > by their respective platform maintainers. > > > > Likewise for patch 66/97. Although it is only for shmobile > > I would prefer it broken out. > > Oh fuck that. > > Okay, I'm dropping the whole patch set right now and forgetting the whole > damned thing. The L2 cache code can damned well stay as it is and remain > an unmaintainable mess. FWIW, there are an awful lot of people, myself included, who do care that you've done this work. It is 100% okay for you to say "no" to requests to split things up because of the complexity of the series. I really hope you're reconsider and not give up on this series. g. -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi Russell, I emphatically second Grant's opinion here: This is a good patch series and is a much-needed improvement. I am in the middle of a board-port for an A9 system, and this series will greatly simplify things for me *despite* the fact that I will need to convert to the new write_sec() form of L2C control on PSCI-enabled non-secure platforms. To reiterate Grant's request, please re-consider applying this L2C patch series! Thank you, jdl On Thu, May 1, 2014 at 10:12 AM, Grant Likely <grant.likely@secretlab.ca> wrote: > On Tue, 29 Apr 2014 01:21:41 +0100, Russell King - ARM Linux <linux@arm.linux.org.uk> wrote: >> On Tue, Apr 29, 2014 at 09:02:27AM +0900, Simon Horman wrote: >> > On Mon, Apr 28, 2014 at 08:30:32PM +0100, Russell King wrote: >> > > Since we now automatically enable early BRESP in core L2C-310 code when >> > > we detect a Cortex-A9, we don't need platforms/SoCs to set this bit >> > > explicitly. Instead, they should seek to preserve the value of bit 30 >> > > in the auxiliary control register. >> > > >> > > Acked-by: Tony Lindgren <tony@atomide.com> >> > > Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> >> > >> > I would prefer if this patch was broken out into individual patches >> > for each board or SoC file and that they were then picked up >> > by their respective platform maintainers. >> > >> > Likewise for patch 66/97. Although it is only for shmobile >> > I would prefer it broken out. >> >> Oh fuck that. >> >> Okay, I'm dropping the whole patch set right now and forgetting the whole >> damned thing. The L2 cache code can damned well stay as it is and remain >> an unmaintainable mess. > > FWIW, there are an awful lot of people, myself included, who do care > that you've done this work. It is 100% okay for you to say "no" to > requests to split things up because of the complexity of the series. > > I really hope you're reconsider and not give up on this series. > > g. > > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Thu, May 1, 2014 at 8:12 AM, Grant Likely <grant.likely@secretlab.ca> wrote: > On Tue, 29 Apr 2014 01:21:41 +0100, Russell King - ARM Linux <linux@arm.linux.org.uk> wrote: >> On Tue, Apr 29, 2014 at 09:02:27AM +0900, Simon Horman wrote: >> > On Mon, Apr 28, 2014 at 08:30:32PM +0100, Russell King wrote: >> > > Since we now automatically enable early BRESP in core L2C-310 code when >> > > we detect a Cortex-A9, we don't need platforms/SoCs to set this bit >> > > explicitly. Instead, they should seek to preserve the value of bit 30 >> > > in the auxiliary control register. >> > > >> > > Acked-by: Tony Lindgren <tony@atomide.com> >> > > Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> >> > >> > I would prefer if this patch was broken out into individual patches >> > for each board or SoC file and that they were then picked up >> > by their respective platform maintainers. >> > >> > Likewise for patch 66/97. Although it is only for shmobile >> > I would prefer it broken out. >> >> Oh fuck that. >> >> Okay, I'm dropping the whole patch set right now and forgetting the whole >> damned thing. The L2 cache code can damned well stay as it is and remain >> an unmaintainable mess. > > FWIW, there are an awful lot of people, myself included, who do care > that you've done this work. It is 100% okay for you to say "no" to > requests to split things up because of the complexity of the series. > > I really hope you're reconsider and not give up on this series. +1. I've been very behind on email lately and I haven't paid enough attention to this, but I'd like to see this go in for 3.16 as well, and it shouldn't have to go in through each subtree. Sequencing that in this case would be a huge pain indeed. It would be better to just keep it all on a shared topic branch that we can merge into arm-soc as a dependency, so we can resolve merge conflicts as we merge in from platform maintainers. I wouldn't expect anything major besides some context conflicts due to nearby edits. The only thing I am not 100% on is if it's a good idea or not to add to the machine descriptor, since it'll make it harder to make descriptor-free generic platforms for A9, but it's a minor detail and the benefit of the series outweigh that (and we can revisit if truly needed later). -Olof -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/arm/mach-berlin/berlin.c b/arch/arm/mach-berlin/berlin.c index 025bcb5473eb..6709d2a6bec8 100644 --- a/arch/arm/mach-berlin/berlin.c +++ b/arch/arm/mach-berlin/berlin.c @@ -24,7 +24,7 @@ static void __init berlin_init_machine(void) * with DT probing for L2CCs, berlin_init_machine can be removed. * Note: 88DE3005 (Armada 1500-mini) uses pl310 l2cc */ - l2x0_of_init(0x70c00000, 0xfeffffff); + l2x0_of_init(0x30c00000, 0xfeffffff); of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); } diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c index b32a907d021d..e6828fb46034 100644 --- a/arch/arm/mach-exynos/exynos.c +++ b/arch/arm/mach-exynos/exynos.c @@ -32,8 +32,8 @@ #include "mfc.h" #include "regs-pmu.h" -#define L2_AUX_VAL 0x7C470001 -#define L2_AUX_MASK 0xC200ffff +#define L2_AUX_VAL 0x3c470001 +#define L2_AUX_MASK 0xc200ffff static struct map_desc exynos4_iodesc[] __initdata = { { diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c index dc9844a55443..9ce52548a484 100644 --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c @@ -220,8 +220,7 @@ static int __init omap_l2_cache_init(void) L2C_AUX_CTRL_WAY_SIZE(3) | L2C_AUX_CTRL_SHARED_OVERRIDE | L310_AUX_CTRL_DATA_PREFETCH | - L310_AUX_CTRL_INSTR_PREFETCH | - L310_AUX_CTRL_EARLY_BRESP; + L310_AUX_CTRL_INSTR_PREFETCH; outer_cache.write_sec = omap4_l2c310_write_sec; if (of_have_populated_dt()) diff --git a/arch/arm/mach-shmobile/board-armadillo800eva-reference.c b/arch/arm/mach-shmobile/board-armadillo800eva-reference.c index 57d1a78367b6..34e7f3c17dd2 100644 --- a/arch/arm/mach-shmobile/board-armadillo800eva-reference.c +++ b/arch/arm/mach-shmobile/board-armadillo800eva-reference.c @@ -164,8 +164,8 @@ static void __init eva_init(void) r8a7740_meram_workaround(); #ifdef CONFIG_CACHE_L2X0 - /* Early BRESP enable, Shared attribute override enable, 32K*8way */ - l2x0_init(IOMEM(0xf0002000), 0x40440000, 0x82000fff); + /* Shared attribute override enable, 32K*8way */ + l2x0_init(IOMEM(0xf0002000), 0x00440000, 0xc2000fff); #endif r8a7740_add_standard_devices_dt(); diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c index 2858f380beae..7688990edd3a 100644 --- a/arch/arm/mach-shmobile/board-armadillo800eva.c +++ b/arch/arm/mach-shmobile/board-armadillo800eva.c @@ -1270,8 +1270,8 @@ static void __init eva_init(void) #ifdef CONFIG_CACHE_L2X0 - /* Early BRESP enable, Shared attribute override enable, 32K*8way */ - l2x0_init(IOMEM(0xf0002000), 0x40440000, 0x82000fff); + /* Shared attribute override enable, 32K*8way */ + l2x0_init(IOMEM(0xf0002000), 0x00440000, 0xc2000fff); #endif i2c_register_board_info(0, i2c0_devices, ARRAY_SIZE(i2c0_devices)); diff --git a/arch/arm/mach-shmobile/board-kzm9g-reference.c b/arch/arm/mach-shmobile/board-kzm9g-reference.c index 598e32488410..85873f186d77 100644 --- a/arch/arm/mach-shmobile/board-kzm9g-reference.c +++ b/arch/arm/mach-shmobile/board-kzm9g-reference.c @@ -36,8 +36,8 @@ static void __init kzm_init(void) sh73a0_add_standard_devices_dt(); #ifdef CONFIG_CACHE_L2X0 - /* Early BRESP enable, Shared attribute override enable, 64K*8way */ - l2x0_init(IOMEM(0xf0100000), 0x40460000, 0x82000fff); + /* Shared attribute override enable, 64K*8way */ + l2x0_init(IOMEM(0xf0100000), 0x00460000, 0xc2000fff); #endif } diff --git a/arch/arm/mach-shmobile/board-kzm9g.c b/arch/arm/mach-shmobile/board-kzm9g.c index 03dc3ac84502..ea9bf39fdc10 100644 --- a/arch/arm/mach-shmobile/board-kzm9g.c +++ b/arch/arm/mach-shmobile/board-kzm9g.c @@ -876,8 +876,8 @@ static void __init kzm_init(void) gpio_request_one(223, GPIOF_IN, NULL); /* IRQ8 */ #ifdef CONFIG_CACHE_L2X0 - /* Early BRESP enable, Shared attribute override enable, 64K*8way */ - l2x0_init(IOMEM(0xf0100000), 0x40460000, 0x82000fff); + /* Shared attribute override enable, 64K*8way */ + l2x0_init(IOMEM(0xf0100000), 0x00460000, 0xc2000fff); #endif i2c_register_board_info(0, i2c0_devices, ARRAY_SIZE(i2c0_devices)); diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c index 6d694526e4ca..3a8e5316671e 100644 --- a/arch/arm/mach-shmobile/setup-r8a7778.c +++ b/arch/arm/mach-shmobile/setup-r8a7778.c @@ -298,10 +298,10 @@ void __init r8a7778_add_dt_devices(void) void __iomem *base = ioremap_nocache(0xf0100000, 0x1000); if (base) { /* - * Early BRESP enable, Shared attribute override enable, 64K*16way + * Shared attribute override enable, 64K*16way * don't call iounmap(base) */ - l2x0_init(base, 0x40470000, 0x82000fff); + l2x0_init(base, 0x00470000, 0xc2000fff); } #endif diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c index 8e860b36997a..91c90bf0ae83 100644 --- a/arch/arm/mach-shmobile/setup-r8a7779.c +++ b/arch/arm/mach-shmobile/setup-r8a7779.c @@ -700,8 +700,8 @@ static struct platform_device *r8a7779_standard_devices[] __initdata = { void __init r8a7779_add_standard_devices(void) { #ifdef CONFIG_CACHE_L2X0 - /* Early BRESP enable, Shared attribute override enable, 64K*16way */ - l2x0_init(IOMEM(0xf0100000), 0x40470000, 0x82000fff); + /* Shared attribute override enable, 64K*16way */ + l2x0_init(IOMEM(0xf0100000), 0x00470000, 0xc2000fff); #endif r8a7779_pm_init(); diff --git a/arch/arm/mach-spear/spear13xx.c b/arch/arm/mach-spear/spear13xx.c index 92860fa01668..dcb300443b66 100644 --- a/arch/arm/mach-spear/spear13xx.c +++ b/arch/arm/mach-spear/spear13xx.c @@ -46,7 +46,7 @@ void __init spear13xx_l2x0_init(void) */ writel_relaxed(0x221, VA_L2CC_BASE + L310_TAG_LATENCY_CTRL); writel_relaxed(0x441, VA_L2CC_BASE + L310_DATA_LATENCY_CTRL); - l2x0_init(VA_L2CC_BASE, 0x70A60001, 0xfe00ffff); + l2x0_init(VA_L2CC_BASE, 0x30a60001, 0xfe00ffff); } /* diff --git a/arch/arm/mach-tegra/tegra.c b/arch/arm/mach-tegra/tegra.c index 6191603379e1..ecbb5411a104 100644 --- a/arch/arm/mach-tegra/tegra.c +++ b/arch/arm/mach-tegra/tegra.c @@ -89,9 +89,9 @@ static void __init tegra_init_cache(void) cache_type = readl(p + L2X0_CACHE_TYPE); aux_ctrl = (cache_type & 0x700) << (17-8); - aux_ctrl |= 0x7C400001; + aux_ctrl |= 0x3c400001; - ret = l2x0_of_init(aux_ctrl, 0x8200c3fe); + ret = l2x0_of_init(aux_ctrl, 0xc200c3fe); if (!ret) l2x0_saved_regs_addr = virt_to_phys(&l2x0_saved_regs); #endif