diff mbox

[v3,2/2] ARM: dts: Add peach-pit board support

Message ID 1398856138-18837-3-git-send-email-arun.kk@samsung.com (mailing list archive)
State New, archived
Headers show

Commit Message

Arun Kumar K April 30, 2014, 11:08 a.m. UTC
Adds the google peach-pit board dts file which uses
exynos5420 SoC.

Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
---
 arch/arm/boot/dts/Makefile                 |    1 +
 arch/arm/boot/dts/exynos5420-peach-pit.dts |  156 ++++++++++++++++++++++++++++
 2 files changed, 157 insertions(+)
 create mode 100644 arch/arm/boot/dts/exynos5420-peach-pit.dts

Comments

Doug Anderson May 1, 2014, 3:40 p.m. UTC | #1
Arun,

On Wed, Apr 30, 2014 at 4:08 AM, Arun Kumar K <arun.kk@samsung.com> wrote:
> +       memory {
> +               reg = <0x20000000 0x80000000>;

As mentioned in the other thread, I think this should be 0 0

> +&pinctrl_0 {
> +       tpm_irq: tpm-irq {
> +               samsung,pins = "gpx1-0";
> +               samsung,pin-function = <0>;
> +               samsung,pin-pud = <0>;

Is there any way to use the #defines PIN_PULL_NONE here?

> +&pinctrl_3 {
> +       backlight_pwm: backlight-pwm {
> +               samsung,pins = "gpb2-0";
> +               samsung,pin-function = <2>;
> +               samsung,pin-pud = <0>;
> +               samsung,pin-drv = <0>;
> +       };

The PWM probably belongs in exynos5420-pinctrl.dtsi (though you'd need
to call it by a more generic name since it could be used for something
other than a backlight).
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Tomasz Figa May 1, 2014, 5:30 p.m. UTC | #2
On 01.05.2014 17:40, Doug Anderson wrote:
> Arun,
>
> On Wed, Apr 30, 2014 at 4:08 AM, Arun Kumar K <arun.kk@samsung.com> wrote:
>> +       memory {
>> +               reg = <0x20000000 0x80000000>;
>
> As mentioned in the other thread, I think this should be 0 0

I guess it may depend on your boards, but DT might contain safe default 
configuration that would work on all variants, so if you have for 
example 1 GiB and 2 GiB variants, 1 GiB configuration here should be 
fine to get the board running even without a bootloader that could 
inject remaining data.

>
>> +&pinctrl_0 {
>> +       tpm_irq: tpm-irq {
>> +               samsung,pins = "gpx1-0";
>> +               samsung,pin-function = <0>;
>> +               samsung,pin-pud = <0>;
>
> Is there any way to use the #defines PIN_PULL_NONE here?

I wonder if we already have this kind of #define defined. Keep in mind 
that this value is specific for Exynos SoCs, so we would need to define 
it in Exynos-specific header, like include/dt-bindings/pinctrl/exynos.h.

>
>> +&pinctrl_3 {
>> +       backlight_pwm: backlight-pwm {
>> +               samsung,pins = "gpb2-0";
>> +               samsung,pin-function = <2>;
>> +               samsung,pin-pud = <0>;
>> +               samsung,pin-drv = <0>;
>> +       };
>
> The PWM probably belongs in exynos5420-pinctrl.dtsi (though you'd need
> to call it by a more generic name since it could be used for something
> other than a backlight).

Yes, please add generic pinctrl nodes for all PWM outputs on the SoC to 
exynos5420-pinctrl.dtsi, as done in exynos4x12-pinctrl.dtsi (see 
pwmX-out nodes).

Best regards,
Tomasz

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Doug Anderson May 1, 2014, 5:45 p.m. UTC | #3
Tomasz,

On Thu, May 1, 2014 at 10:30 AM, Tomasz Figa <tomasz.figa@gmail.com> wrote:
> On 01.05.2014 17:40, Doug Anderson wrote:
>>
>> Arun,
>>
>> On Wed, Apr 30, 2014 at 4:08 AM, Arun Kumar K <arun.kk@samsung.com> wrote:
>>>
>>> +       memory {
>>> +               reg = <0x20000000 0x80000000>;
>>
>>
>> As mentioned in the other thread, I think this should be 0 0
>
>
> I guess it may depend on your boards, but DT might contain safe default
> configuration that would work on all variants, so if you have for example 1
> GiB and 2 GiB variants, 1 GiB configuration here should be fine to get the
> board running even without a bootloader that could inject remaining data.

That was part of the debate yesterday, I thought.  Tom Rini (U-Boot
guy) said that right now U-Boot clobbers the memory node _always_ and
fills it in with whatever it detects.  He wasn't sure this was a good
idea.  Someone said they thought that it wasn't a good idea, but
someone could request U-Boot keep clobbering things by doing <0 0>

Tom: did I summarize that correctly?


>>> +&pinctrl_0 {
>>> +       tpm_irq: tpm-irq {
>>> +               samsung,pins = "gpx1-0";
>>> +               samsung,pin-function = <0>;
>>> +               samsung,pin-pud = <0>;
>>
>>
>> Is there any way to use the #defines PIN_PULL_NONE here?
>
>
> I wonder if we already have this kind of #define defined. Keep in mind that
> this value is specific for Exynos SoCs, so we would need to define it in
> Exynos-specific header, like include/dt-bindings/pinctrl/exynos.h.

I dunno.  I'd actually love to see function 0/1 defined (input /
output) too.  ...and drive strengths (since 0, 1, 2, 3 don't map
nicely to x1, x2, x3, x4).

I requested PIN_PULL_NONE though, since I saw it being used.

...oh, but it's a #define in a .dtsi.  Hrm.

arch/arm/boot/dts/s3c64xx-pinctrl.dtsi:#define PIN_PULL_NONE    0

I guess I'd say that it would be nice to do this properly for exynos,
but we could do it in a later patch.


-Doug
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diff mbox

Patch

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 35c146f..3220e29 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -74,6 +74,7 @@  dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
 	exynos5250-smdk5250.dtb \
 	exynos5250-snow.dtb \
 	exynos5420-arndale-octa.dtb \
+	exynos5420-peach-pit.dtb \
 	exynos5420-smdk5420.dtb \
 	exynos5440-sd5v1.dtb \
 	exynos5440-ssdk5440.dtb
diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts b/arch/arm/boot/dts/exynos5420-peach-pit.dts
new file mode 100644
index 0000000..03ef094
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
@@ -0,0 +1,156 @@ 
+/*
+ * Google Peach Pit Rev 6+ board device tree source
+ *
+ * Copyright (c) 2014 Google, Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+#include "exynos5420.dtsi"
+
+/ {
+	model = "Google Peach Pit Rev 6+";
+
+	compatible = "google,pit-rev16",
+		"google,pit-rev15", "google,pit-rev14",
+		"google,pit-rev13", "google,pit-rev12",
+		"google,pit-rev11", "google,pit-rev10",
+		"google,pit-rev9", "google,pit-rev8",
+		"google,pit-rev7", "google,pit-rev6",
+		"google,pit", "google,peach","samsung,exynos5420",
+		"samsung,exynos5";
+
+	memory {
+		reg = <0x20000000 0x80000000>;
+	};
+
+	fixed-rate-clocks {
+		oscclk {
+			compatible = "samsung,exynos5420-oscclk";
+			clock-frequency = <24000000>;
+		};
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&power_key_irq>;
+
+		power {
+			label = "Power";
+			gpios = <&gpx1 2 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_POWER>;
+			gpio-key,wakeup;
+		};
+	};
+
+	backlight {
+		compatible = "pwm-backlight";
+		pwms = <&pwm 0 1000000 0>;
+		brightness-levels = <0 100 500 1000 1500 2000 2500 2800>;
+		default-brightness-level = <7>;
+		pinctrl-0 = <&backlight_pwm>;
+		pinctrl-names = "default";
+	};
+};
+
+&pinctrl_0 {
+	tpm_irq: tpm-irq {
+		samsung,pins = "gpx1-0";
+		samsung,pin-function = <0>;
+		samsung,pin-pud = <0>;
+		samsung,pin-drv = <0>;
+	};
+
+	power_key_irq: power-key-irq {
+		samsung,pins = "gpx1-2";
+		samsung,pin-function = <0>;
+		samsung,pin-pud = <0>;
+		samsung,pin-drv = <0>;
+	};
+};
+
+&pinctrl_3 {
+	backlight_pwm: backlight-pwm {
+		samsung,pins = "gpb2-0";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <0>;
+		samsung,pin-drv = <0>;
+	};
+};
+
+&rtc {
+	status = "okay";
+};
+
+&serial_3 {
+	status = "okay";
+};
+
+&mmc_0 {
+	status = "okay";
+	num-slots = <1>;
+	broken-cd;
+	caps2-mmc-hs200-1_8v;
+	supports-highspeed;
+	non-removable;
+	card-detect-delay = <200>;
+	clock-frequency = <400000000>;
+	samsung,dw-mshc-ciu-div = <3>;
+	samsung,dw-mshc-sdr-timing = <0 4>;
+	samsung,dw-mshc-ddr-timing = <0 2>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
+
+	slot@0 {
+		reg = <0>;
+		bus-width = <8>;
+	};
+};
+
+&mmc_2 {
+	status = "okay";
+	num-slots = <1>;
+	supports-highspeed;
+	card-detect-delay = <200>;
+	clock-frequency = <400000000>;
+	samsung,dw-mshc-ciu-div = <3>;
+	samsung,dw-mshc-sdr-timing = <2 3>;
+	samsung,dw-mshc-ddr-timing = <1 2>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
+
+	slot@0 {
+		reg = <0>;
+		bus-width = <4>;
+	};
+};
+
+&hsi2c_9 {
+	status = "okay";
+	clock-frequency = <400000>;
+
+	tpm@20 {
+		compatible = "infineon,slb9645tt";
+		reg = <0x20>;
+
+		/* Unused irq; but still need to configure the pins */
+		pinctrl-names = "default";
+		pinctrl-0 = <&tpm_irq>;
+	};
+};
+
+/*
+ * Use longest HW watchdog in SoC (32 seconds) since the hardware
+ * watchdog provides no debugging information (compared to soft/hard
+ * lockup detectors) and so should be last resort.
+ */
+&watchdog {
+	timeout-sec = <32>;
+};