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[v2,02/12] Documentation: bindings: add reset bindings docs for Marvell Berlin SoCs

Message ID 1403606121-6368-3-git-send-email-antoine.tenart@free-electrons.com (mailing list archive)
State New, archived
Headers show

Commit Message

Antoine Tenart June 24, 2014, 10:35 a.m. UTC
Add the reset binding documentation to the SoC binding documentation as
the reset driver in Marvell Berlin SoC is part of the chip/system
control registers. This patch adds the required properties to configure
the reset controller.

Signed-off-by: Antoine Ténart <antoine.tenart@free-electrons.com>
---
 Documentation/devicetree/bindings/arm/marvell,berlin.txt | 10 ++++++++++
 1 file changed, 10 insertions(+)

Comments

Philipp Zabel June 24, 2014, 11:14 a.m. UTC | #1
Am Dienstag, den 24.06.2014, 12:35 +0200 schrieb Antoine Ténart:
> Add the reset binding documentation to the SoC binding documentation as
> the reset driver in Marvell Berlin SoC is part of the chip/system
> control registers. This patch adds the required properties to configure
> the reset controller.
> 
> Signed-off-by: Antoine Ténart <antoine.tenart@free-electrons.com>

Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
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Patch

diff --git a/Documentation/devicetree/bindings/arm/marvell,berlin.txt b/Documentation/devicetree/bindings/arm/marvell,berlin.txt
index 94013a9a8769..32a1a8a652ad 100644
--- a/Documentation/devicetree/bindings/arm/marvell,berlin.txt
+++ b/Documentation/devicetree/bindings/arm/marvell,berlin.txt
@@ -90,11 +90,21 @@  Required subnode-properties:
 - groups: a list of strings describing the group names.
 - function: a string describing the function used to mux the groups.
 
+* Reset controller binding
+
+A reset controller is part of the chip control registers set. The chip control
+node also provides the reset. The register set is not at the same offset between
+Berlin SoCs.
+
+Required property:
+- #reset-cells: must be set to 2
+
 Example:
 
 chip: chip-control@ea0000 {
 	compatible = "marvell,berlin2-chip-ctrl";
 	#clock-cells = <1>;
+	#reset-cells = <2>;
 	reg = <0xea0000 0x400>;
 	clocks = <&refclk>, <&externaldev 0>;
 	clock-names = "refclk", "video_ext0";