[v3,0/7] Forward Error Correction
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Message ID 20181102054159.28886-1-anusha.srivatsa@intel.com
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Srivatsa, Anusha Nov. 2, 2018, 5:41 a.m. UTC
With Display Compression, the bit error in the pixel
stream can turn into a significant corruption on
the screen. The DP1.4 adds FEC - Forward Error Correction
scheme which uses Reed-Solomon parity/correction check
generated by the source and used by the sink to detect
and correct small numbers of bit errors in the compressed
stream.

v2: Avoid doing aux channel read everytime we check
for FEC support. Instead cache the value of the DPCD
registers, similar to the DSC implementaion (Jani)

v3: Add fec as a state to crtc. Move around the code. (Ville)

v4: s/can_fec/fec_enable; s/intel_dp_can_fec/intel_dp_supports_fec;
Add intel_dp_source supports_fec() (Ville)

v5: Reduce unwanted checks. Pass intel_encoder to fec func
instead of intel_dp. Move code around to suitable place.

This is rebased on top of Manasi's End-to-end DSC
Implementation: https://patchwork.freedesktop.org/series/47514/

Anusha Srivatsa (7):
  i915/dp/fec: Cache the FEC_CAPABLE DPCD register
  drm/dp/fec: DRM helper for Forward Error Correction
  i915/dp/fec: Check for FEC Support
  i915/dp/fec: Add can_fec to the crtc state.
  drm/i915/fec: Set FEC_READY in FEC_CONFIGURATION
  i915/dp/fec: Configure the Forward Error Correction bits.
  drm/i915/fec: Disable FEC state.

 drivers/gpu/drm/i915/i915_reg.h  |  2 ++
 drivers/gpu/drm/i915/intel_ddi.c | 60 ++++++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_dp.c  | 58 ++++++++++++++++++++++++++++--
 drivers/gpu/drm/i915/intel_drv.h | 11 ++++++
 include/drm/drm_dp_helper.h      |  7 ++++
 5 files changed, 136 insertions(+), 2 deletions(-)