From patchwork Fri Feb 8 13:47:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sharma, Swati2" X-Patchwork-Id: 10803105 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B5A6E1390 for ; Fri, 8 Feb 2019 13:51:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A61E62E1DA for ; Fri, 8 Feb 2019 13:51:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A45C62E1DD; Fri, 8 Feb 2019 13:51:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 43A1F2E1E5 for ; Fri, 8 Feb 2019 13:51:09 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5C5066EDE8; Fri, 8 Feb 2019 13:51:08 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id BB9656EDE7; Fri, 8 Feb 2019 13:51:06 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Feb 2019 05:51:06 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.58,347,1544515200"; d="scan'208";a="114681720" Received: from genxfsim-shark-bay-client-platform.iind.intel.com ([10.223.25.3]) by orsmga006.jf.intel.com with ESMTP; 08 Feb 2019 05:51:03 -0800 From: swati2.sharma@intel.com To: dri-devel@lists.freedesktop.org Date: Fri, 8 Feb 2019 19:17:18 +0530 Message-Id: <1549633645-29616-1-git-send-email-swati2.sharma@intel.com> X-Mailer: git-send-email 1.9.1 Subject: [Intel-gfx] [PATCH 0/7] Enable P0xx (planar), Y2xx and Y4xx (packed) pixel formats X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: daniel.vetter@ffwll.ch, intel-gfx@lists.freedesktop.org MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Swati Sharma In this patch series, Juha Pekka's patch series for Gen10+ P0xx formats https://patchwork.freedesktop.org/series/56053/ is combined with Swati's https://patchwork.freedesktop.org/series/55035/ for Gen11+ pixel formats (Y2xx and Y4xx). P0xx pixel formats are enabled from GLK whereas Y2xx and Y4xx are enabled from ICL platform. These patches enable planar formats YUV420-P010, P012 and P016 (Intial 4 patches of Juha) for GLK+ platform and packed format YUV422-Y210, Y212 and Y216 and YUV444-Y410, Y412, Y416 for 10, 12 and 16 bits for ICL+ platforms. IGT validating all these pixel formats written by Maarten Lankhorst https://patchwork.freedesktop.org/patch/284508/ IGT needs libraries for pixman and cairo to support more than 8bpc. Need cairo >= 1.17.2 and pixman-1 >= 0.36.0. Tested with custom cairo and pixman. P0xx and Y2xx successfully validated for HDR planes, SDR planes having CRC mismatch (known bug for all YUV formats). IGT for Y410 and Y416 is alpha enabled whereas kernel patches are non-alpha; depending upon review comments will make changes either in IGT or kernel. TODO: IGT for Y412 yet to be written Juha-Pekka Heikkila (4): drm: Add P010, P012, P016 format definitions and fourcc drm/i915: Add P010, P012, P016 plane control definitions drm/i915: preparations for enabling P010, P012, P016 formats drm/i915: enable P010, P012, P016 formats for primary and sprite planes Swati Sharma (3): drm: Add Y2xx and Y4xx (xx:10/12/16) format definitions and fourcc drm/i915/icl: Add Y2xx and Y4xx (xx:10/12/16) plane control definitions drm/i915/icl: Enabling Y2xx and Y4xx (xx:10/12/16) formats for universal planes drivers/gpu/drm/drm_fourcc.c | 9 +++ drivers/gpu/drm/i915/i915_reg.h | 9 +++ drivers/gpu/drm/i915/intel_atomic_plane.c | 2 +- drivers/gpu/drm/i915/intel_display.c | 57 ++++++++++++++-- drivers/gpu/drm/i915/intel_drv.h | 1 + drivers/gpu/drm/i915/intel_pm.c | 14 ++-- drivers/gpu/drm/i915/intel_sprite.c | 108 ++++++++++++++++++++++++++++-- include/uapi/drm/drm_fourcc.h | 28 +++++++- 8 files changed, 208 insertions(+), 20 deletions(-)