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[i-g-t,0/5] DC states igt tests patch series v7

Message ID 1551979817-26123-1-git-send-email-anshuman.gupta@intel.com (mailing list archive)
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Series DC states igt tests patch series v7 | expand

Message

Gupta, Anshuman March 7, 2019, 5:30 p.m. UTC
This patch series adds new tests to validate Display C states.
DC states like DC5 and DC6 are validated during PSR entry/exit
and during DPMS on/off cycle.
Sending new revision of patch series after addressing review comments and
other relevant changes.
 
1. Changing the name of test from pm_dc to i915_pm_dc alinged to other PM tests.
2. Changing the DC5/6 counter check timeout from 1 sec to 3 sec,
   as in case of PSR  it requires more than 2 second to disable DC
   power wells after vblank event.

Jyoti Yadav (5):
  lib/igt_pm: igt lib helper routines to support DC5/6 tests
  tests/pm_dc: Added new test to verify Display C States
  tests/pm_dc: Added test for DC6 during PSR
  tests/pm_dc: Added test for DC5 during DPMS
  tests/pm_dc: Added test for DC6 during DPMS

 lib/igt_pm.c             |  47 +++++++++
 lib/igt_pm.h             |   2 +
 tests/Makefile.sources   |   3 +
 tests/i915/i915_pm_dc.c  | 255 +++++++++++++++++++++++++++++++++++++++++++++++
 tests/i915/i915_pm_rpm.c |  17 +---
 tests/meson.build        |   1 +
 6 files changed, 309 insertions(+), 16 deletions(-)
 create mode 100644 tests/i915/i915_pm_dc.c