[v4,00/10] support wakeup capable GPIOs
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Message ID 20190313211844.29416-1-ilina@codeaurora.org
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Lina Iyer March 13, 2019, 9:18 p.m. UTC
Hi all,

This series adds support for wakeup capable GPIOs. It is based on Thierry's
hiearchical GPIO domains. This approach is based on Stephen's idea [1]. The SoC
that is used for this development is a QCOM SDM845. The current patchset is
rebased on top of 5.0 and adds documentation for the wakeup-parent and
irqdomain-map DT properties along with the the optional irqdomain-map-mask and
irqdomain-map-pass-thru properties. Also incorporating comments from Marc on
the earlier submission [2]. I cleaned up some of the change history in these
patches to match the version number with that of the submission.

The dtsi patches are based on Bjorn's changes for increased address and cell
size [3] and [4].

Kindly review the series.

Thanks,
Lina

[1]. https://lkml.org/lkml/2018/12/19/813
[2]. https://lkml.org/lkml/2019/2/22/716
[3]. https://patchwork.kernel.org/patch/10767511/
[4]. https://lkml.kernel.org/r/20190117042940.25487-2-bjorn.andersson@linaro.org

Lina Iyer (8):
  irqdomain: add bus token DOMAIN_BUS_WAKEUP
  of/irq: document properties for wakeup interrupt parent
  drivers: irqchip: add PDC irqdomain for wakeup capable GPIOs
  dt-bindings: sdm845-pinctrl: add wakeup interrupt parent for GPIO
  drivers: pinctrl: msm: setup GPIO irqchip hierarchy
  arm64: dts: qcom: add PDC interrupt controller for SDM845
  arm64: dts: qcom: setup PDC as wakeup parent for GPIOs for SDM845
  arm64: defconfig: enable PDC interrupt controller for Qualcomm SDM845

Stephen Boyd (1):
  of: irq: add helper to remap interrupts to another irqdomain

Thierry Reding (1):
  gpio: Add support for hierarchical IRQ domains

 .../interrupt-controller/interrupts.txt       |  39 +++++
 .../bindings/pinctrl/qcom,sdm845-pinctrl.txt  |   7 +-
 arch/arm64/boot/dts/qcom/sdm845.dtsi          |  87 ++++++++++
 arch/arm64/configs/defconfig                  |   1 +
 drivers/gpio/gpiolib.c                        |  15 +-
 drivers/irqchip/qcom-pdc.c                    |  72 ++++++++-
 drivers/of/irq.c                              | 125 +++++++++++++++
 drivers/pinctrl/qcom/pinctrl-msm.c            | 151 +++++++++++++++---
 include/linux/gpio/driver.h                   |   6 +
 include/linux/irqdomain.h                     |   1 +
 include/linux/of_irq.h                        |   1 +
 include/linux/soc/qcom/irq.h                  |  23 +++
 12 files changed, 497 insertions(+), 31 deletions(-)
 create mode 100644 include/linux/soc/qcom/irq.h

--
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a Linux Foundation Collaborative Project

Comments

Marc Zyngier April 15, 2019, 12:43 p.m. UTC | #1
On 13/03/2019 21:18, Lina Iyer wrote:
> Hi all,
> 
> This series adds support for wakeup capable GPIOs. It is based on Thierry's
> hiearchical GPIO domains. This approach is based on Stephen's idea [1]. The SoC
> that is used for this development is a QCOM SDM845. The current patchset is
> rebased on top of 5.0 and adds documentation for the wakeup-parent and
> irqdomain-map DT properties along with the the optional irqdomain-map-mask and
> irqdomain-map-pass-thru properties. Also incorporating comments from Marc on
> the earlier submission [2]. I cleaned up some of the change history in these
> patches to match the version number with that of the submission.
> 
> The dtsi patches are based on Bjorn's changes for increased address and cell
> size [3] and [4].
> 
> Kindly review the series.

What the status of this? What is the expected merge strategy?

Thanks,

	M.
Lina Iyer April 15, 2019, 3:56 p.m. UTC | #2
On Mon, Apr 15 2019 at 06:43 -0600, Marc Zyngier wrote:
>On 13/03/2019 21:18, Lina Iyer wrote:
>> Hi all,
>>
>> This series adds support for wakeup capable GPIOs. It is based on Thierry's
>> hiearchical GPIO domains. This approach is based on Stephen's idea [1]. The SoC
>> that is used for this development is a QCOM SDM845. The current patchset is
>> rebased on top of 5.0 and adds documentation for the wakeup-parent and
>> irqdomain-map DT properties along with the the optional irqdomain-map-mask and
>> irqdomain-map-pass-thru properties. Also incorporating comments from Marc on
>> the earlier submission [2]. I cleaned up some of the change history in these
>> patches to match the version number with that of the submission.
>>
>> The dtsi patches are based on Bjorn's changes for increased address and cell
>> size [3] and [4].
>>
>> Kindly review the series.
>
>What the status of this? What is the expected merge strategy?
>
Hi Mark,

I ran into a couple of issues, most of which have been sorted out. But
there is a hardware requirement to write up another register (to set
type), for GPIO wakeup that was missed earlier. I am trying to get that
tested out. That's the hold up. Sorry about that.

--Lina