[v5,0/8] PCI: DWC/Keystone: MSI configuration cleanup
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Message ID 20190321095927.7058-1-kishon@ti.com
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  • PCI: DWC/Keystone: MSI configuration cleanup
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Kishon Vijay Abraham I March 21, 2019, 9:59 a.m. UTC
This series tries to address the comments discussed in [1] w.r.t
removing Keystone specific callbacks defined in dw_pcie_host_ops.

This series also tries to cleanup the Keystone interrupt handling
part.

Changes from v4:
*) Removed legacy interrupt cleanup patch which uses hierarchy IRQ
   domain since TI platform uses edge interrupt for legacy interrupt.
   This will be deferred till I get more details from HW team.

Changes from v3:
*) Uses hierarchy IRQ domain for legacy interrupts since there is 1:1
   mapping between legacy interrupt and GIC IRQ.
   (MSI still depends on the order of IRQs populated in dt).

Changes from v2:
*) Removed patch that modifies ks_pcie_legacy_irq_handler() to check the
   IRQ_STATUS of INTA/B/C/D. Lorenzo's comment to create a matrix
   LinuxIRQ x INTx will be added in AM654x PCIe support series
*) ks_pcie_legacy_irq_handler() is made to use hwirq to get IRQ offset
   instead of virq.
*) default msi_irq_chip is assigned in dw_pcie_host_init() once keystone
   assigns its msi_irq_chip
*) Fixed other minor comments from Lorenzo and Bjorn

Changes from v1:
*) Removed "PCI: keystone: Use "dummy_irq_chip" instead of new irqchip
for legacy interrupt handling" from the patch series. It should be
handled differently.

*) Added Gustavo's ACKed by and fixed a commit message.

[1] -> https://patchwork.kernel.org/patch/10681587/

Kishon Vijay Abraham I (8):
  PCI: keystone: Cleanup interrupt related macros
  PCI: keystone: Add separate functions for configuring MSI and legacy
    interrupt
  PCI: keystone: Use hwirq to get the MSI IRQ number offset
  PCI: keystone: Cleanup ks_pcie_msi_irq_handler
  PCI: dwc: Add support to use non default msi_irq_chip
  PCI: keystone: Use Keystone specific msi_irq_chip
  PCI: dwc: Remove Keystone specific dw_pcie_host_ops
  PCI: dwc: Do not write to MSI control registers if the platform
    doesn't use it

 drivers/pci/controller/dwc/pci-keystone.c     | 365 ++++++++++--------
 .../pci/controller/dwc/pcie-designware-host.c |  78 ++--
 drivers/pci/controller/dwc/pcie-designware.h  |   6 +-
 3 files changed, 233 insertions(+), 216 deletions(-)

Comments

Lorenzo Pieralisi April 3, 2019, 5:11 p.m. UTC | #1
On Thu, Mar 21, 2019 at 03:29:19PM +0530, Kishon Vijay Abraham I wrote:
> This series tries to address the comments discussed in [1] w.r.t
> removing Keystone specific callbacks defined in dw_pcie_host_ops.
> 
> This series also tries to cleanup the Keystone interrupt handling
> part.
> 
> Changes from v4:
> *) Removed legacy interrupt cleanup patch which uses hierarchy IRQ
>    domain since TI platform uses edge interrupt for legacy interrupt.
>    This will be deferred till I get more details from HW team.
> 
> Changes from v3:
> *) Uses hierarchy IRQ domain for legacy interrupts since there is 1:1
>    mapping between legacy interrupt and GIC IRQ.
>    (MSI still depends on the order of IRQs populated in dt).
> 
> Changes from v2:
> *) Removed patch that modifies ks_pcie_legacy_irq_handler() to check the
>    IRQ_STATUS of INTA/B/C/D. Lorenzo's comment to create a matrix
>    LinuxIRQ x INTx will be added in AM654x PCIe support series
> *) ks_pcie_legacy_irq_handler() is made to use hwirq to get IRQ offset
>    instead of virq.
> *) default msi_irq_chip is assigned in dw_pcie_host_init() once keystone
>    assigns its msi_irq_chip
> *) Fixed other minor comments from Lorenzo and Bjorn
> 
> Changes from v1:
> *) Removed "PCI: keystone: Use "dummy_irq_chip" instead of new irqchip
> for legacy interrupt handling" from the patch series. It should be
> handled differently.
> 
> *) Added Gustavo's ACKed by and fixed a commit message.
> 
> [1] -> https://patchwork.kernel.org/patch/10681587/
> 
> Kishon Vijay Abraham I (8):
>   PCI: keystone: Cleanup interrupt related macros
>   PCI: keystone: Add separate functions for configuring MSI and legacy
>     interrupt
>   PCI: keystone: Use hwirq to get the MSI IRQ number offset
>   PCI: keystone: Cleanup ks_pcie_msi_irq_handler
>   PCI: dwc: Add support to use non default msi_irq_chip
>   PCI: keystone: Use Keystone specific msi_irq_chip
>   PCI: dwc: Remove Keystone specific dw_pcie_host_ops
>   PCI: dwc: Do not write to MSI control registers if the platform
>     doesn't use it
> 
>  drivers/pci/controller/dwc/pci-keystone.c     | 365 ++++++++++--------
>  .../pci/controller/dwc/pcie-designware-host.c |  78 ++--
>  drivers/pci/controller/dwc/pcie-designware.h  |   6 +-
>  3 files changed, 233 insertions(+), 216 deletions(-)

I would need Gustavo's ACKs on dwc patches, I will queue the
series then.

Lorenzo
Lorenzo Pieralisi April 10, 2019, 4:50 p.m. UTC | #2
On Thu, Mar 21, 2019 at 03:29:19PM +0530, Kishon Vijay Abraham I wrote:
> This series tries to address the comments discussed in [1] w.r.t
> removing Keystone specific callbacks defined in dw_pcie_host_ops.
> 
> This series also tries to cleanup the Keystone interrupt handling
> part.
> 
> Changes from v4:
> *) Removed legacy interrupt cleanup patch which uses hierarchy IRQ
>    domain since TI platform uses edge interrupt for legacy interrupt.
>    This will be deferred till I get more details from HW team.
> 
> Changes from v3:
> *) Uses hierarchy IRQ domain for legacy interrupts since there is 1:1
>    mapping between legacy interrupt and GIC IRQ.
>    (MSI still depends on the order of IRQs populated in dt).
> 
> Changes from v2:
> *) Removed patch that modifies ks_pcie_legacy_irq_handler() to check the
>    IRQ_STATUS of INTA/B/C/D. Lorenzo's comment to create a matrix
>    LinuxIRQ x INTx will be added in AM654x PCIe support series
> *) ks_pcie_legacy_irq_handler() is made to use hwirq to get IRQ offset
>    instead of virq.
> *) default msi_irq_chip is assigned in dw_pcie_host_init() once keystone
>    assigns its msi_irq_chip
> *) Fixed other minor comments from Lorenzo and Bjorn
> 
> Changes from v1:
> *) Removed "PCI: keystone: Use "dummy_irq_chip" instead of new irqchip
> for legacy interrupt handling" from the patch series. It should be
> handled differently.
> 
> *) Added Gustavo's ACKed by and fixed a commit message.
> 
> [1] -> https://patchwork.kernel.org/patch/10681587/
> 
> Kishon Vijay Abraham I (8):
>   PCI: keystone: Cleanup interrupt related macros
>   PCI: keystone: Add separate functions for configuring MSI and legacy
>     interrupt
>   PCI: keystone: Use hwirq to get the MSI IRQ number offset
>   PCI: keystone: Cleanup ks_pcie_msi_irq_handler
>   PCI: dwc: Add support to use non default msi_irq_chip
>   PCI: keystone: Use Keystone specific msi_irq_chip
>   PCI: dwc: Remove Keystone specific dw_pcie_host_ops
>   PCI: dwc: Do not write to MSI control registers if the platform
>     doesn't use it
> 
>  drivers/pci/controller/dwc/pci-keystone.c     | 365 ++++++++++--------
>  .../pci/controller/dwc/pcie-designware-host.c |  78 ++--
>  drivers/pci/controller/dwc/pcie-designware.h  |   6 +-
>  3 files changed, 233 insertions(+), 216 deletions(-)

Applied to pci/keystone, aiming for v5.2 unless something goes
wrong with testing.

Lorenzo