[v7,00/15] crypto: caam - Add i.MX8MQ support
mbox series

Message ID 20190812200739.30389-1-andrew.smirnov@gmail.com
Headers show
Series
  • crypto: caam - Add i.MX8MQ support
Related show

Message

Andrey Smirnov Aug. 12, 2019, 8:07 p.m. UTC
Everyone:

Picking up where Chris left off (I chatted with him privately
beforehead), this series adds support for i.MX8MQ to CAAM driver. Just
like [v1], this series is i.MX8MQ only.

Feedback is welcome!
Thanks,
Andrey Smirnov

Changes since [v6]:

  - Fixed build problems in "crypto: caam - make CAAM_PTR_SZ dynamic"

  - Collected Reviewied-by from Horia

  - "crypto: caam - force DMA address to 32-bit on 64-bit i.MX SoCs"
    is changed to check 'caam_ptr_sz' instead of using 'caam_imx'
    
  - Incorporated feedback for "crypto: caam - request JR IRQ as the
    last step" and "crypto: caam - simplfy clock initialization"

Changes since [v5]:

  - Hunk replacing sizeof(*jrp->inpring) to SIZEOF_JR_INPENTRY in
    "crypto: caam - don't hardcode inpentry size", lost in [v5], is
    back

  - Collected Tested-by from Iuliana

Changes since [v4]:

  - Fixed missing sentinel element in "crypto: caam - simplfy clock
    initialization"
    
  - Squashed all of the devers related patches into a single one and
    converted IRQ allocation to use devres while at it

  - Added "crypto: caam - request JR IRQ as the last step" as
    discussed

Changes since [v3]:

  - Patchset changed to select DMA size at runtime in order to enable
    support for both i.MX8MQ and Layerscape at the same time. I only
    tested the patches on i.MX6,7 and 8MQ, since I don't have access
    to any of the Layerscape HW. Any help in that regard would be
    appareciated.

  - Bulk clocks and their number are now stored as a part of struct
    caam_drv_private to simplify allocation and cleanup code (no
    special context needed)
    
  - Renamed 'soc_attr' -> 'imx_soc_match' for clarity

Changes since [v2]:

  - Dropped "crypto: caam - do not initialise clocks on the i.MX8" and
    replaced it with "crypto: caam - simplfy clock initialization" and 
    "crypto: caam - add clock entry for i.MX8MQ"


Changes since [v1]

  - Series reworked to continue using register based interface for
    queueing RNG initialization job, dropping "crypto: caam - use job
    ring for RNG instantiation instead of DECO"

  - Added a patch to share DMA mask selection code

  - Added missing Signed-off-by for authors of original NXP tree
    commits that this sereis is based on

[v6] lore.kernel.org/r/20190717152458.22337-1-andrew.smirnov@gmail.com
[v5] lore.kernel.org/r/20190715201942.17309-1-andrew.smirnov@gmail.com
[v4] lore.kernel.org/r/20190703081327.17505-1-andrew.smirnov@gmail.com
[v3] lore.kernel.org/r/20190617160339.29179-1-andrew.smirnov@gmail.com
[v2] lore.kernel.org/r/20190607200225.21419-1-andrew.smirnov@gmail.com
[v1] https://patchwork.kernel.org/cover/10825625/

Andrey Smirnov (15):
  crypto: caam - move DMA mask selection into a function
  crypto: caam - simplfy clock initialization
  crypto: caam - convert caam_jr_init() to use devres
  crypto: caam - request JR IRQ as the last step
  crytpo: caam - make use of iowrite64*_hi_lo in wr_reg64
  crypto: caam - use ioread64*_hi_lo in rd_reg64
  crypto: caam - drop 64-bit only wr/rd_reg64()
  crypto: caam - share definition for MAX_SDLEN
  crypto: caam - make CAAM_PTR_SZ dynamic
  crypto: caam - move cpu_to_caam_dma() selection to runtime
  crypto: caam - drop explicit usage of struct jr_outentry
  crypto: caam - don't hardcode inpentry size
  crypto: caam - force DMA address to 32-bit on 64-bit i.MX SoCs
  crypto: caam - always select job ring via RSR on i.MX8MQ
  crypto: caam - add clock entry for i.MX8MQ

 drivers/crypto/caam/caamalg.c     |   2 +-
 drivers/crypto/caam/caamalg_qi2.h |  27 ----
 drivers/crypto/caam/caamhash.c    |   2 +-
 drivers/crypto/caam/caampkc.c     |   8 +-
 drivers/crypto/caam/caamrng.c     |   2 +-
 drivers/crypto/caam/ctrl.c        | 220 ++++++++++++++----------------
 drivers/crypto/caam/desc_constr.h |  47 ++++++-
 drivers/crypto/caam/error.c       |   3 +
 drivers/crypto/caam/intern.h      |  32 ++++-
 drivers/crypto/caam/jr.c          |  93 ++++---------
 drivers/crypto/caam/pdb.h         |  16 ++-
 drivers/crypto/caam/pkc_desc.c    |   8 +-
 drivers/crypto/caam/qi.h          |  26 ----
 drivers/crypto/caam/regs.h        | 139 +++++++++++++------
 14 files changed, 326 insertions(+), 299 deletions(-)

Comments

Horia Geanta Aug. 13, 2019, 1:59 p.m. UTC | #1
On 8/12/2019 11:08 PM, Andrey Smirnov wrote:
> Everyone:
> 
> Picking up where Chris left off (I chatted with him privately
> beforehead), this series adds support for i.MX8MQ to CAAM driver. Just
> like [v1], this series is i.MX8MQ only.
> 
> Feedback is welcome!
> Thanks,
> Andrey Smirnov
> 
> Changes since [v6]:
> 
>   - Fixed build problems in "crypto: caam - make CAAM_PTR_SZ dynamic"
> 
>   - Collected Reviewied-by from Horia
> 
>   - "crypto: caam - force DMA address to 32-bit on 64-bit i.MX SoCs"
>     is changed to check 'caam_ptr_sz' instead of using 'caam_imx'
>     
>   - Incorporated feedback for "crypto: caam - request JR IRQ as the
>     last step" and "crypto: caam - simplfy clock initialization"
> 
FYI - the series does not apply cleanly on current cryptodev-2.6 tree.

Horia
Andrey Smirnov Aug. 13, 2019, 6:51 p.m. UTC | #2
On Tue, Aug 13, 2019 at 6:59 AM Horia Geanta <horia.geanta@nxp.com> wrote:
>
> On 8/12/2019 11:08 PM, Andrey Smirnov wrote:
> > Everyone:
> >
> > Picking up where Chris left off (I chatted with him privately
> > beforehead), this series adds support for i.MX8MQ to CAAM driver. Just
> > like [v1], this series is i.MX8MQ only.
> >
> > Feedback is welcome!
> > Thanks,
> > Andrey Smirnov
> >
> > Changes since [v6]:
> >
> >   - Fixed build problems in "crypto: caam - make CAAM_PTR_SZ dynamic"
> >
> >   - Collected Reviewied-by from Horia
> >
> >   - "crypto: caam - force DMA address to 32-bit on 64-bit i.MX SoCs"
> >     is changed to check 'caam_ptr_sz' instead of using 'caam_imx'
> >
> >   - Incorporated feedback for "crypto: caam - request JR IRQ as the
> >     last step" and "crypto: caam - simplfy clock initialization"
> >
> FYI - the series does not apply cleanly on current cryptodev-2.6 tree.
>

OK, sorry about that, will fix.

Thanks,
Andrey Smirnov
Horia Geanta Aug. 14, 2019, 10:26 a.m. UTC | #3
On 8/13/2019 9:51 PM, Andrey Smirnov wrote:
> On Tue, Aug 13, 2019 at 6:59 AM Horia Geanta <horia.geanta@nxp.com> wrote:
>>
>> On 8/12/2019 11:08 PM, Andrey Smirnov wrote:
>>> Everyone:
>>>
>>> Picking up where Chris left off (I chatted with him privately
>>> beforehead), this series adds support for i.MX8MQ to CAAM driver. Just
>>> like [v1], this series is i.MX8MQ only.
>>>
>>> Feedback is welcome!
>>> Thanks,
>>> Andrey Smirnov
>>>
>>> Changes since [v6]:
>>>
>>>   - Fixed build problems in "crypto: caam - make CAAM_PTR_SZ dynamic"
>>>
>>>   - Collected Reviewied-by from Horia
>>>
>>>   - "crypto: caam - force DMA address to 32-bit on 64-bit i.MX SoCs"
>>>     is changed to check 'caam_ptr_sz' instead of using 'caam_imx'
>>>
>>>   - Incorporated feedback for "crypto: caam - request JR IRQ as the
>>>     last step" and "crypto: caam - simplfy clock initialization"
>>>
>> FYI - the series does not apply cleanly on current cryptodev-2.6 tree.
>>
> 
> OK, sorry about that, will fix.
> 
Please also include the crypto DT node in v8 series - see patch below.

I would like to go with it through the cryptodev-2.6 tree,
to save one kernel release cycle.
This way kernel v5.4 would support CAAM on i.MX8MQ.

That's how we previously did for i.MX7ULP and Herbert and Shawn agreed.
Details (including who to Cc) here:
https://patchwork.kernel.org/patch/10978811/

-- >8 --

Subject: [PATCH] arm64: dts: imx8mq: add crypto node

Add node for CAAM - Cryptographic Acceleration and Assurance Module.

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8mq.dtsi | 30 +++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index d09b808eff87..197965dac505 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -728,6 +728,36 @@
 				status = "disabled";
 			};
 
+			crypto: crypto@30900000 {
+				compatible = "fsl,sec-v4.0";
+				#address-cells = <0x1>;
+				#size-cells = <0x1>;
+				reg = <0x30900000 0x40000>;
+				ranges = <0 0x30900000 0x40000>;
+				interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clk IMX8MQ_CLK_AHB>,
+					 <&clk IMX8MQ_CLK_IPG_ROOT>;
+				clock-names = "aclk", "ipg";
+
+				sec_jr0: jr0@1000 {
+					 compatible = "fsl,sec-v4.0-job-ring";
+					 reg = <0x1000 0x1000>;
+					 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+				};
+
+				sec_jr1: jr1@2000 {
+					 compatible = "fsl,sec-v4.0-job-ring";
+					 reg = <0x2000 0x1000>;
+					 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+				};
+
+				sec_jr2: jr2@3000 {
+					 compatible = "fsl,sec-v4.0-job-ring";
+					 reg = <0x3000 0x1000>;
+					 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
+				};
+			};
+
 			i2c1: i2c@30a20000 {
 				compatible = "fsl,imx8mq-i2c", "fsl,imx21-i2c";
 				reg = <0x30a20000 0x10000>;