[PATCHv2,0/3] Update cpupower and make it more accurate
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Message ID cover.1570819652.git.Janakarajan.Natarajan@amd.com
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  • Update cpupower and make it more accurate
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Natarajan, Janakarajan Oct. 11, 2019, 7:37 p.m. UTC
This patchset updates cpupower to make it more accurate by removing
the userspace to kernel transitions and read_msr initiated IPI delays.

The first patch does a little re-arrangement of variables in the
cpuidle_monitor struct to prepare for a new flag.

The second patch introduces a per_cpu_schedule flag which, when set,
will allow cpupower to move to each of the cpus in the system. The
advantage of this is that the IPI latency is removed when reading
the APERF/MPERF registers, since an IPI is not generated for rdmsrs
when the source and destination cpus are the same for the IPI.

The third patch introduces the RDPRU instruction, which will allow
cpupower to not use the msr module for APERF/MPERF register reads.
This will remove the userspace to kernel transition delays when
reading the APERF/MPERF registers.

v1->v2:
* Added cover letter.
* Used bind_cpu instead of rewriting the same code.
* Moved needs_root to flag sub-struct.
* Introduced per_cpu_schedule flag.

Janakarajan Natarajan (3):
  cpupower: Move needs_root variable into a sub-struct
  cpupower: mperf_monitor: Introduce per_cpu_schedule flag
  cpupower: mperf_monitor: Update cpupower to use the RDPRU instruction

 tools/power/cpupower/utils/helpers/cpuid.c    |  4 ++
 tools/power/cpupower/utils/helpers/helpers.h  |  1 +
 .../utils/idle_monitor/amd_fam14h_idle.c      |  2 +-
 .../utils/idle_monitor/cpuidle_sysfs.c        |  2 +-
 .../utils/idle_monitor/cpupower-monitor.c     |  2 +-
 .../utils/idle_monitor/cpupower-monitor.h     |  5 +-
 .../utils/idle_monitor/hsw_ext_idle.c         |  2 +-
 .../utils/idle_monitor/mperf_monitor.c        | 64 +++++++++++++++----
 .../cpupower/utils/idle_monitor/nhm_idle.c    |  2 +-
 .../cpupower/utils/idle_monitor/snb_idle.c    |  2 +-
 10 files changed, 68 insertions(+), 18 deletions(-)

Comments

Natarajan, Janakarajan Oct. 22, 2019, 4:39 p.m. UTC | #1
On 10/11/2019 2:37 PM, Natarajan, Janakarajan wrote:
> This patchset updates cpupower to make it more accurate by removing
> the userspace to kernel transitions and read_msr initiated IPI delays.
>
> The first patch does a little re-arrangement of variables in the
> cpuidle_monitor struct to prepare for a new flag.
>
> The second patch introduces a per_cpu_schedule flag which, when set,
> will allow cpupower to move to each of the cpus in the system. The
> advantage of this is that the IPI latency is removed when reading
> the APERF/MPERF registers, since an IPI is not generated for rdmsrs
> when the source and destination cpus are the same for the IPI.
>
> The third patch introduces the RDPRU instruction, which will allow
> cpupower to not use the msr module for APERF/MPERF register reads.
> This will remove the userspace to kernel transition delays when
> reading the APERF/MPERF registers.


Any concerns regarding this patchset?


-Janak


>
> v1->v2:
> * Added cover letter.
> * Used bind_cpu instead of rewriting the same code.
> * Moved needs_root to flag sub-struct.
> * Introduced per_cpu_schedule flag.
>
> Janakarajan Natarajan (3):
>    cpupower: Move needs_root variable into a sub-struct
>    cpupower: mperf_monitor: Introduce per_cpu_schedule flag
>    cpupower: mperf_monitor: Update cpupower to use the RDPRU instruction
>
>   tools/power/cpupower/utils/helpers/cpuid.c    |  4 ++
>   tools/power/cpupower/utils/helpers/helpers.h  |  1 +
>   .../utils/idle_monitor/amd_fam14h_idle.c      |  2 +-
>   .../utils/idle_monitor/cpuidle_sysfs.c        |  2 +-
>   .../utils/idle_monitor/cpupower-monitor.c     |  2 +-
>   .../utils/idle_monitor/cpupower-monitor.h     |  5 +-
>   .../utils/idle_monitor/hsw_ext_idle.c         |  2 +-
>   .../utils/idle_monitor/mperf_monitor.c        | 64 +++++++++++++++----
>   .../cpupower/utils/idle_monitor/nhm_idle.c    |  2 +-
>   .../cpupower/utils/idle_monitor/snb_idle.c    |  2 +-
>   10 files changed, 68 insertions(+), 18 deletions(-)
>
Thomas Renninger Oct. 25, 2019, 10:47 a.m. UTC | #2
Hi,

Removed: Pu Wen <puwen@hygon.com>

On Tuesday, October 22, 2019 6:39:11 PM CEST Natarajan, Janakarajan wrote:
> On 10/11/2019 2:37 PM, Natarajan, Janakarajan wrote:
> 
> > This patchset updates cpupower to make it more accurate by removing
> > the userspace to kernel transitions and read_msr initiated IPI delays.

Acked-by: Thomas Renninger <trenn@suse.de>

Shuan: If you do not object, it would be great if you can schedule these
to be included into Rafael's pm tree.

It's a nice enhancement for these CPUs.
Doing it even nicer and more generic (per cpu measures) needs further
restructuring, but should not delay this any further.


        Thomas
shuah Oct. 25, 2019, 3:18 p.m. UTC | #3
On 10/25/19 4:47 AM, Thomas Renninger wrote:
> Hi,
> 
> Removed: Pu Wen <puwen@hygon.com>
> 
> On Tuesday, October 22, 2019 6:39:11 PM CEST Natarajan, Janakarajan wrote:
>> On 10/11/2019 2:37 PM, Natarajan, Janakarajan wrote:
>>
>>> This patchset updates cpupower to make it more accurate by removing
>>> the userspace to kernel transitions and read_msr initiated IPI delays.
> 
> Acked-by: Thomas Renninger <trenn@suse.de>
> 
> Shuan: If you do not object, it would be great if you can schedule these
> to be included into Rafael's pm tree.
> 

I have no objections.

> It's a nice enhancement for these CPUs.
> Doing it even nicer and more generic (per cpu measures) needs further
> restructuring, but should not delay this any further.
> 

Thanks. I was waiting for you to Ack these before I pulled them in.
I will get them in for 5.5-rc1

thanks,
-- Shuah
shuah Nov. 4, 2019, 8:21 p.m. UTC | #4
On 10/25/19 9:18 AM, shuah wrote:
> On 10/25/19 4:47 AM, Thomas Renninger wrote:
>> Hi,
>>
>> Removed: Pu Wen <puwen@hygon.com>
>>
>> On Tuesday, October 22, 2019 6:39:11 PM CEST Natarajan, Janakarajan 
>> wrote:
>>> On 10/11/2019 2:37 PM, Natarajan, Janakarajan wrote:
>>>
>>>> This patchset updates cpupower to make it more accurate by removing
>>>> the userspace to kernel transitions and read_msr initiated IPI delays.
>>
>> Acked-by: Thomas Renninger <trenn@suse.de>
>>
>> Shuan: If you do not object, it would be great if you can schedule these
>> to be included into Rafael's pm tree.
>>
> 
> I have no objections.
> 
>> It's a nice enhancement for these CPUs.
>> Doing it even nicer and more generic (per cpu measures) needs further
>> restructuring, but should not delay this any further.
>>
> 
> Thanks. I was waiting for you to Ack these before I pulled them in.
> I will get them in for 5.5-rc1
> 

Hi Janak,

All your patches fail Signed-off-by check.

WARNING: Missing Signed-off-by: line by nominal patch author 'Natarajan, 
Janakarajan <Janakarajan.Natarajan@amd.com>'

There is a mismatch between your From: and Signed-off-by names? Can you
fix these and resend all 4 patches.

thanks,
-- Shuah
Borislav Petkov Nov. 4, 2019, 9:15 p.m. UTC | #5
On Mon, Nov 04, 2019 at 01:21:11PM -0700, shuah wrote:
> WARNING: Missing Signed-off-by: line by nominal patch author 'Natarajan,
> Janakarajan <Janakarajan.Natarajan@amd.com>'
> 
> There is a mismatch between your From: and Signed-off-by names?

That's checkpatch complaining that From: is of the format "Lastname,
Firstname" while the SOB is the other way around. One could use a script
which massages a mail before turning it into patch and fixes up that,
among other things.