[RESEND,V5,00/11] clk: imx8: add new clock binding for better pm support
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Aisheng Dong Nov. 17, 2019, 12:25 p.m. UTC
This is a follow up of this patch series.
https://patchwork.kernel.org/cover/10924029/
[V2,0/2] clk: imx: scu: add parsing clocks from device tree support

This patch series is a preparation for the MX8 Architecture improvement.
As for IMX SCU based platforms like MX8QM and MX8QXP, they are comprised
of a couple of SS(Subsystems) while most of them within the same SS
can be shared. e.g. Clocks, Devices and etc.

However, current clock binding is using SW IDs for device tree to use
which can cause troubles in writing the common <soc>-ss-xx.dtsi file for
different SoCs.

This patch series aims to introduce a new binding which is more close to
hardware and platform independent and can makes us write a more general
drivers for different SCU based SoCs.

Another important thing is that on MX8, each Clock resource is associated
with a power domain. So we have to attach that clock device to the power
domain in order to make it work properly. Further more, the clock state
will be lost when its power domain is completely off during suspend/resume,
so we also introduce the clock state save&restore mechanism.

ChangeLog:
v4->v5:
 * Address all comments from Stephen
v3->v4:
 * use clk-indices for LPCG to fetch each clks offset from dt
v2->v3:
 * change scu clk into two cells binding
 * add clk pm patches to ease the understand of the changes
v1->v2:
 * SCU clock changed to one cell clock binding inspired by arm,scpi.txt
   Documentation/devicetree/bindings/arm/arm,scpi.txt
 * Add required power domain property
 * Dropped PATCH 3&4 first, will send the updated version accordingly
   after the binding is finally determined,

Dong Aisheng (11):
  dt-bindings: firmware: imx-scu: new binding to parse clocks from
    device tree
  dt-bindings: clock: imx-lpcg: add support to parse clocks from device
    tree
  clk: imx: scu: add two cells binding support
  clk: imx: scu: bypass cpu power domains
  clk: imx: scu: allow scu clk to take device pointer
  clk: imx: scu: add runtime pm support
  clk: imx: scu: add suspend/resume support
  clk: imx: imx8qxp-lpcg: add parsing clocks from device tree
  clk: imx: lpcg: allow lpcg clk to take device pointer
  clk: imx: clk-imx8qxp-lpcg: add runtime pm support
  clk: imx: lpcg: add suspend/resume support

 .../bindings/arm/freescale/fsl,scu.txt        |  12 +-
 .../bindings/clock/imx8qxp-lpcg.txt           |  36 ++-
 drivers/clk/imx/clk-imx8qxp-lpcg.c            | 139 +++++++++++
 drivers/clk/imx/clk-imx8qxp.c                 | 129 ++++++-----
 drivers/clk/imx/clk-lpcg-scu.c                |  52 ++++-
 drivers/clk/imx/clk-scu.c                     | 218 +++++++++++++++++-
 drivers/clk/imx/clk-scu.h                     |  54 ++++-
 include/dt-bindings/clock/imx8-lpcg.h         |  14 ++
 include/dt-bindings/firmware/imx/rsrc.h       |  23 ++
 9 files changed, 587 insertions(+), 90 deletions(-)
 create mode 100644 include/dt-bindings/clock/imx8-lpcg.h

Comments

Shawn Guo Dec. 11, 2019, 8:05 a.m. UTC | #1
On Sun, Nov 17, 2019 at 08:25:08PM +0800, Dong Aisheng wrote:
> This is a follow up of this patch series.
> https://patchwork.kernel.org/cover/10924029/
> [V2,0/2] clk: imx: scu: add parsing clocks from device tree support
> 
> This patch series is a preparation for the MX8 Architecture improvement.
> As for IMX SCU based platforms like MX8QM and MX8QXP, they are comprised
> of a couple of SS(Subsystems) while most of them within the same SS
> can be shared. e.g. Clocks, Devices and etc.
> 
> However, current clock binding is using SW IDs for device tree to use
> which can cause troubles in writing the common <soc>-ss-xx.dtsi file for
> different SoCs.
> 
> This patch series aims to introduce a new binding which is more close to
> hardware and platform independent and can makes us write a more general
> drivers for different SCU based SoCs.
> 
> Another important thing is that on MX8, each Clock resource is associated
> with a power domain. So we have to attach that clock device to the power
> domain in order to make it work properly. Further more, the clock state
> will be lost when its power domain is completely off during suspend/resume,
> so we also introduce the clock state save&restore mechanism.
> 
> ChangeLog:
> v4->v5:
>  * Address all comments from Stephen

Hi Stephen,

Are you fine with this version?

Shawn
Aisheng Dong Jan. 2, 2020, 8:25 a.m. UTC | #2
Hi Stephen,

Could you take a look at this?

Regards
Aisheng

> From: Shawn Guo <shawnguo@kernel.org>
> Sent: Wednesday, December 11, 2019 4:05 PM
> 
> On Sun, Nov 17, 2019 at 08:25:08PM +0800, Dong Aisheng wrote:
> > This is a follow up of this patch series.
> > [V2,0/2] clk: imx: scu: add parsing clocks from device tree support
> >
> > This patch series is a preparation for the MX8 Architecture improvement.
> > As for IMX SCU based platforms like MX8QM and MX8QXP, they are
> > comprised of a couple of SS(Subsystems) while most of them within the
> > same SS can be shared. e.g. Clocks, Devices and etc.
> >
> > However, current clock binding is using SW IDs for device tree to use
> > which can cause troubles in writing the common <soc>-ss-xx.dtsi file
> > for different SoCs.
> >
> > This patch series aims to introduce a new binding which is more close
> > to hardware and platform independent and can makes us write a more
> > general drivers for different SCU based SoCs.
> >
> > Another important thing is that on MX8, each Clock resource is
> > associated with a power domain. So we have to attach that clock device
> > to the power domain in order to make it work properly. Further more,
> > the clock state will be lost when its power domain is completely off
> > during suspend/resume, so we also introduce the clock state save&restore
> mechanism.
> >
> > ChangeLog:
> > v4->v5:
> >  * Address all comments from Stephen
> 
> Hi Stephen,
> 
> Are you fine with this version?
> 
> Shawn
Aisheng Dong Jan. 21, 2020, 5 a.m. UTC | #3
Gently ping..

> From: Aisheng Dong <aisheng.dong@nxp.com>
> Sent: Thursday, January 2, 2020 4:26 PM
> 
> Hi Stephen,
> 
> Could you take a look at this?
> 
> Regards
> Aisheng
> 
> > From: Shawn Guo <shawnguo@kernel.org>
> > Sent: Wednesday, December 11, 2019 4:05 PM
> >
> > On Sun, Nov 17, 2019 at 08:25:08PM +0800, Dong Aisheng wrote:
> > > This is a follow up of this patch series.
> > > [V2,0/2] clk: imx: scu: add parsing clocks from device tree support
> > >
> > > This patch series is a preparation for the MX8 Architecture improvement.
> > > As for IMX SCU based platforms like MX8QM and MX8QXP, they are
> > > comprised of a couple of SS(Subsystems) while most of them within
> > > the same SS can be shared. e.g. Clocks, Devices and etc.
> > >
> > > However, current clock binding is using SW IDs for device tree to
> > > use which can cause troubles in writing the common <soc>-ss-xx.dtsi
> > > file for different SoCs.
> > >
> > > This patch series aims to introduce a new binding which is more
> > > close to hardware and platform independent and can makes us write a
> > > more general drivers for different SCU based SoCs.
> > >
> > > Another important thing is that on MX8, each Clock resource is
> > > associated with a power domain. So we have to attach that clock
> > > device to the power domain in order to make it work properly.
> > > Further more, the clock state will be lost when its power domain is
> > > completely off during suspend/resume, so we also introduce the clock
> > > state save&restore
> > mechanism.
> > >
> > > ChangeLog:
> > > v4->v5:
> > >  * Address all comments from Stephen
> >
> > Hi Stephen,
> >
> > Are you fine with this version?
> >
> > Shawn
Oliver Graute Feb. 7, 2020, 11:06 a.m. UTC | #4
On 21/01/20, Aisheng Dong wrote:
> Gently ping..

Hello,

what is the current status of this patch set?
I'am running this patches since november on my im8qm board and it works
very well for me. So I'am interessted to get this into mainline.
I there something to improve? or to test?

Best Regards,

Oliver