| Message ID | 20191126170911.23253-1-ville.syrjala@linux.intel.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | drm/i915/fbc: Fix FBC for glk+ | expand |
Hi Ville, It's great to see Intel putting attention into this, thanks! On Wed, Nov 27, 2019 at 1:09 AM Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > Implement the missing w/a for back to back FBC disable + plane > update on glk+. The scariest part of this is that we now start > to use flip nuke so that we can avoid the w/a (as it would cost > us one extra frame for every plane update). Hopefully my "can > we flip nuke safely?" check is good enough. I tested on Asus E406MA which is one of the original platforms where we were seeing the corruption at the top of the screen. I first took your branch *without* your new patches applied, to reconfirm the base case of FBC causing corruption. However this didn't work as desired - FBC did not get enabled and i915_fbc_status reported "no suitable CRTC fo FBC". This must be a change in behaviour since we originally saw the corruption bug a while back. I checked that skl_plane_has_fbc() correctly marks the right plane (pipe A, primary plane) as has_fbc=1 however the loop inside intel_fbc_choose_crtc() was only considering plane 7 (PLANE_CURSOR) and then deciding that there were no FBC-capable planes. I then applied your patch series and checked again. FBC still disabled, but this time the reason is "CFB requirements changed". I then booted with i915.fastboot=0 and now FBC is enabled. I'm unable to reproduce the graphics corruption under this setup, so it looks like your patches may have solved the original issue. However, it's unfortunate that FBC will continue to remain disabled for users of this platform, as fastboot defaults to on (and the fastboot associated boot flicker reduction is very welcome). Do you think this point is worth following up on? Thanks, Daniel
From: Ville Syrjälä <ville.syrjala@linux.intel.com> Implement the missing w/a for back to back FBC disable + plane update on glk+. The scariest part of this is that we now start to use flip nuke so that we can avoid the w/a (as it would cost us one extra frame for every plane update). Hopefully my "can we flip nuke safely?" check is good enough. There's a bit of cleanup mixed in since there was all kinds of crap in my way. The state of the code is still not pretty but seemed to work well enough in my limited testing. Entire series availalbe here: git://github.com/vsyrjala/linux.git glk_fbc_wa Cc: Daniel Drake <drake@endlessm.com>, Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>, Cc: Jian-Hong Pan <jian-hong@endlessm.com>, Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Ville Syrjälä (13): drm/i915/fbc: Disable fbc by default on all glk+ drm/i915/fbc: Nuke bogus single pipe fbc1 restriction drm/i915: Relocate intel_crtc_active() drm/i915/fbc: Remove the FBC_RT_BASE setup for ILK/SNB drm/i915/fbc: Precompute gen9 cfb stride w/a drm/i915/fbc: Track plane visibility drm/i915/fbc: Store fence_id direction in fbc cache/params drm/i915/fbc: Make fence_id optional for i965gm drm/i915/fbc: s/gen9 && !glk/gen9_bc || bxt/ drm/i915/fbc: Nuke fbc.enabled drm/i915/fbc: Start using flip nuke drm/i915/fbc: Wait for vblank after FBC disable on glk+ drm/i915/fbc: Enable fbc by default on glk+ once again drivers/gpu/drm/i915/display/intel_display.c | 25 +- drivers/gpu/drm/i915/display/intel_display.h | 1 - drivers/gpu/drm/i915/display/intel_fbc.c | 249 +++++++++---------- drivers/gpu/drm/i915/display/intel_fbc.h | 3 +- drivers/gpu/drm/i915/i915_drv.h | 14 +- drivers/gpu/drm/i915/intel_pm.c | 19 ++ 6 files changed, 150 insertions(+), 161 deletions(-)