[v4,0/2] add Microchip PIT64B timer

Message

Claudiu Beznea Dec. 13, 2019, 11:19 a.m. UTC

Hi,

This series adds driver for Microchip PIT64B timer.
Timer could be used in continuous or oneshot mode. It has 2x32 bit registers
to emulate a 64 bit timer. The timer's period could be configured via LSB_PR
and MSB_PR registers. The current timer's value could be checked via TLSB and
TMSB registers. When (TMSB << 32) | TLSB value reach the (MSB_PR << 32) | LSB_PR
interrupt is raised. If in contiuous mode the TLSB and TMSB resets and restart
counting.

This drivers uses PIT64B capabilities for clocksource and clockevent.
The first requested PIT64B timer is used for clockevent. The second one is used
for clocksource. Individual PIT64B hardware resources were used for clocksource
and clockevent to be able to support high resolution timers with this PIT64B
implementation.

Thank you,
Claudiu Beznea

Changes in v4:
- use clocksource_mmio_init() to register timer for clocksource
  functionality; with this, struct mchp_pit64b_clksrc was removed and replaced
  with mchp_pit64b_cs_base variable to keep the timer base address
- removed clksrc_to_mchp_pit64b_timer() macro 
- introduce mchp_pit64b_dt_init_timer() and add there the content of
  mchp_pit64b_timer_init() which was removed
- s/mchp_pit64b_dt_init_clksrc()/mchp_pit64b_init_clksrc(),
  s/mchp_pit64b_dt_init_clkevt()/mchp_pit64b_init_clkevt() and minimize
  their content
- remove cycles member from mchp_pit64b_timer and add it as a local
  variable (to be used only for clockevent timer in periodic mode)
- add mode member to struct mchp_pit64b_timer keeping a precomputed value
  (at probe) of the mode register to remove some of the logic inside
  mchp_pit64b_reset() function
- remove irq member from struct mchp_pit64b_timer; add it instead as
  argument for mchp_pit64b_reset() function to be able to use the same
  function also for programming of clocksource timer
- remove mchp_pit64b_clkevt_set_oneshot() function; timer programming
  while in one shot mode should be done by mchp_pit64b_clkevt_set_next_event()
- in mchp_pit64b_clkevt_suspend()/mchp_pit64b_clkevt_resume() remove the
  timer reconfiguration (via mchp_pit64b_reset()); it should be done
  while programming next delta (if one shot mode) or in
  mchp_pit64b_clkevt_set_periodic() if periodic mode
- s/mchp_pit64b_get_period()/mchp_pit64b_cnt_read()
- in mchp_pit64b_init_clksrc() stop timer if clocksource registration fails
- remove MCHP_PIT64B_ISR_PERIOD macro
- s/to_mchp_pit64b_clkevt()/to_mchp_pit64b_timer() and cast the result
  to struct mchp_pit64b_timer *
- s/mchp_pit64b_pres_prepare()/mchp_pit64b_init_mode() since the function
  will be in charge of precomputing the mode registe value to be used at
  runtime

Changes in v3:
- rework data structures:
	- timer related data structure is called now mchp_pit64b_timer embedding
	  base iomem, clocks, interrupt, prescaler value
	- introduced struct mchp_pit64b_clksrc and struct mchp_pit64b_clkevt
	  instead of mchp_pit64b_clksrc_data and mchp_pit64b_clkevt_data
	- use container_of() to retrieve mchp_pit64b_timer objects on
	  clocksource/clockevent specific APIs
	- document data structures
- use raw_local_irq_save()/raw_local_irq_restore() when reading
  MCHP_PIT64B_TLSBR and MCHP_PIT64B_TMSBR in mchp_pit64b_get_period()
- get rid of mchp_pit64b_read(), mchp_pit64b_write() and use instead
  readl_relaxed(), writel_relaxed()
- get rid of mchp_pit64b_set_period() and inlined its instructions in
  mchp_pit64b_reset()
- mchp_pit64b_reset() gets now as arguments an object of type
  struct mchp_pit64b_timer, cycles to program and mode
- remove static struct clocksource mchp_pit64b_clksrc and
  static struct clock_event_device mchp_pit64b_clkevt and instead allocate
  and fill them in mchp_pit64b_dt_init_clksrc() and
  mchp_pit64b_dt_init_clkevt()
- call mchp_pit64b_reset() in mchp_pit64b_clkevt_set_next_event() and
  program clockevent timer with SMOD=0; if SMOD=1 the timer's period could
  be reprogrammed also if writing TLSB, TMSB if it is running. In cases
  were its period expired START bit still has to be set in control register.
  In case the programming sequence is like in v2, with SMOD=1:
	- program MSB_PR
	- program LSB_PR
	- program START bit in control register
  for short programmed periods we may start the timer twice with this
  programming sequence, 1st time after LSB_PR is updated (and due to SMOD=1),
  2nd time after programming START bit in control register and in case
  programmed period already expire
- simplify mchp_pit64b_interrupt() by just reading ISR register, to clear the
  received interrupt, and just call irq_data->clkevt->event_handler(irq_data->clkevt);
- in mchp_pit64b_pres_compute() chose the bigest prescaler in case a good
  one not found
- document mchp_pit64b_pres_prepare() and simplified it a bit
- enforce gclk as mandatory
- introduce mchp_pit64b_timer_init() and mchp_pit64b_timer_cleanup()
- keep the clocksource timer base address in a mchp_pit64b_cs_base variable so
  that it could be used by mchp_pit64b_sched_read_clk()
- rework mchp_pit64b_dt_init() and return -EINVAL in case it was called
  more than two times: one for initialization of clockevent, one for
  initialization of clocksource
- introduce MCHP_PIT64B_MR_ONE_SHOT define
- move the new lines introduced in Makefile and Kconfig at the end of files
- collect Rob's Reviewed-by tag on patch 1/2
- review the commit message of patch 2/2

Changes in v2:
- remove clock-frequency DT binding and hardcoded it in the driver
- initialize best_pres variable in mchp_pit64b_pres_prepare()
- remove MCHP_PIT64B_DEF_FREQ 
- get rid of patches 3-5 from v1 [1] since there is no entry in MAINTAINERS file
  for this entry. It was removed in
  commit 44015a8181a5 ("MAINTAINERS: at91: remove the TC entry")

[1] https://lore.kernel.org/lkml/[e-mail]/


Claudiu Beznea (2):
  dt-bindings: arm: atmel: add bindings for PIT64B
  clocksource/drivers/timer-microchip-pit64b: add Microchip PIT64B
    support

 .../devicetree/bindings/arm/atmel-sysregs.txt      |   6 +
 drivers/clocksource/Kconfig                        |   7 +
 drivers/clocksource/Makefile                       |   1 +
 drivers/clocksource/timer-microchip-pit64b.c       | 449 +++++++++++++++++++++
 4 files changed, 463 insertions(+)
 create mode 100644 drivers/clocksource/timer-microchip-pit64b.c

Comments

Daniel Lezcano Dec. 16, 2019, 9:16 a.m. UTC | #1

On 13/12/2019 12:19, Claudiu Beznea wrote:
> Hi,
> 
> This series adds driver for Microchip PIT64B timer.
> Timer could be used in continuous or oneshot mode. It has 2x32 bit registers
> to emulate a 64 bit timer. The timer's period could be configured via LSB_PR
> and MSB_PR registers. The current timer's value could be checked via TLSB and
> TMSB registers. When (TMSB << 32) | TLSB value reach the (MSB_PR << 32) | LSB_PR
> interrupt is raised. If in contiuous mode the TLSB and TMSB resets and restart
> counting.
> 
> This drivers uses PIT64B capabilities for clocksource and clockevent.
> The first requested PIT64B timer is used for clockevent. The second one is used
> for clocksource. Individual PIT64B hardware resources were used for clocksource
> and clockevent to be able to support high resolution timers with this PIT64B
> implementation.

I've applied the patches.

Thanks

 -- Daniel