[00/26] drm/i915: Pimp DP DFP handling
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Message ID 20200203151343.14378-1-ville.syrjala@linux.intel.com
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  • drm/i915: Pimp DP DFP handling
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Ville Syrjälä Feb. 3, 2020, 3:13 p.m. UTC
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Attempt to deal with DP downstream facing ports (DFP) more
thoroughly. This involves reading more of the port caps
and dealing with various clock/bpc limitations.

Also we try to hook up the DP dual mode dongles into the
mix (unfortunately I've not yet seen a DP++ DFP that would
pass the dual mode adapter register i2c accesses through).

And we try to enable YCbCr 444->420 conversion for HDMI DFPs
which could allow some 4k displays to actually use 4k on
pre-icl hardware (which doesn't have native 420 output),
assuming we don't run into some other hardware limits.

It's a bit on the large side but since it looks like other
people are poking around the same area I figured I'd post
the entire thing.

Entire series available here:
git://github.com/vsyrjala/linux.git dp_downstream_ports_5

Ville Syrjälä (26):
  drm/i915: Nuke pre-production GLK HDMI w/a 1139
  drm/i915: Limit display Wa_1405510057 to gen11
  drm/i915: Drop WaDDIIOTimeout:glk
  drm/i915: Add glk to intel_detect_preproduction_hw()
  drm/dp: Include the AUX CH name in the debug messages
  drm/i915/lspcon: Do not send infoframes to non-HDMI sinks
  drm/dp: Define protocol converter DPCD registers
  drm/dp: Define more downstream facing port caps
  drm/i915: Reworkd DFP max bpc handling
  drm/dp: Add helpers to identify downstream facing port types
  drm/dp: Pimp drm_dp_downstream_max_bpc()
  drm/dp: Redo drm_dp_downstream_max_clock() as
  drm/i915: Reworkd DP DFP clock handling
  drm/i915: Dump downstream facing port caps
  drm/dp: Add drm_dp_downstream_{min,max}_tmds_clock()
  drm/i915: Deal with TMDS DFP clock limits
  drm/i915: Configure DP 1.3+ protocol converted HDMI mode
  drm/dp: Add drm_dp_downstream_mode()
  drm/i915: Handle downstream facing ports w/o EDID
  drm/i915: Extract intel_hdmi_has_audio()
  drm/i915: DP->HDMI TMDS clock limits vs. deep color
  drm/dp: Add helpers for DFP YCbCr 4:2:0 handling
  drm/i915: Do YCbCr 444->420 conversion via DP protocol converters
  drm/i915: Decouple DP++ from the HDMI code
  drm/i915: Try to probe DP++ dongles on DP++ downstream facing ports
  drm/i915: Try to frob the TMDS buffer enable knob on DP++ dongles on
    DP DFPs

 drivers/gpu/drm/drm_dp_helper.c               | 409 +++++++++++++++---
 drivers/gpu/drm/drm_edid.c                    |  21 +
 drivers/gpu/drm/i915/display/intel_ddi.c      |  23 +-
 .../drm/i915/display/intel_display_types.h    |  22 +-
 drivers/gpu/drm/i915/display/intel_dp.c       | 367 ++++++++++++++--
 drivers/gpu/drm/i915/display/intel_dp.h       |   1 +
 drivers/gpu/drm/i915/display/intel_hdmi.c     | 181 ++++----
 drivers/gpu/drm/i915/display/intel_hdmi.h     |  11 +-
 drivers/gpu/drm/i915/i915_debugfs.c           |   4 +-
 drivers/gpu/drm/i915/i915_drv.c               |   1 +
 drivers/gpu/drm/i915/i915_drv.h               |   2 +
 drivers/gpu/drm/i915/intel_pm.c               |  10 -
 include/drm/drm_dp_helper.h                   |  63 ++-
 include/drm/drm_edid.h                        |   4 +
 14 files changed, 904 insertions(+), 215 deletions(-)