From patchwork Thu Oct 12 11:36:15 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 10001689 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 769D560325 for ; Thu, 12 Oct 2017 11:38:02 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 670F128D13 for ; Thu, 12 Oct 2017 11:38:02 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5BA0028D74; Thu, 12 Oct 2017 11:38:02 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 7055828D13 for ; Thu, 12 Oct 2017 11:38:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=PiFnbpfB0tYV7f1d95UjI7ulhKmsIGDP8kcIJZZfdMQ=; b=pgEOLnE6OksGniCN1SUrzs1tE+ awoABsFdg+PhI0vIx+YSIbnRcAdnxdk0x5pYHHy5ABJowyKhNuIcPlCXT70zH2JpMgbBgUaM7V70C 5salswnhMrrmQsjusUOpbE1sthtBjy1jygHsgSHWt3efgf8StBxqwGseZ7gbYF0gZVR5Nr+5a6HFg q0OmdsovyaN64oPEKGGffIE+E3MYYceITJnb+WhI3x19mmjW38RrfL38zUa1RkyzY29jFAtqRMesl RsEQJt5SqSwK+Vd4Kyao6ZHNsEO3ImMfHWq1rYw6UYJ/zbApQg8GKBl2TE2Lp+iFxWYcuC5fgmbIH 7HsWAgBA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1e2boO-0005Xk-Gi; Thu, 12 Oct 2017 11:38:00 +0000 Received: from conuserg-10.nifty.com ([210.131.2.77]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1e2boK-0005Uq-DS for linux-arm-kernel@lists.infradead.org; Thu, 12 Oct 2017 11:37:58 +0000 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-10.nifty.com with ESMTP id v9CBaXWI007328; Thu, 12 Oct 2017 20:36:35 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-10.nifty.com v9CBaXWI007328 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1507808197; bh=Wbq0quG6z4jY2prKg5dmgRaNVEa2ywX2FKIUn16mNMQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=EaQeGXdXDSrtL4c+diIFnNMT8VTXJr93n02ZPqvHCDOPgidKeESHPfIKporr0uuus Z5rfm5UFVDowkKbVDP0jhqsmhQHSGHDJWiOJPJ+p41VnUv/n0KVAhZLCMMSNxzFYNp UogOU0T5zLq0U6gvJghEjrXmxlpHSra606twaQobSABwy6zsSzKkS6R/Tgg/3VdfE9 n0Ch12KOa5TB0A2iIPMc9m3gASzZhKqImrA51UeJZoDCN3uEZNI8HVgzBOGv9D8/Xx 4v450Ui7qdtiUxjK8N8ogR376JT0n30yeZRmjz+EnldP/yYkzRhWI4MCFiHwRXIJF6 bdEET1z225oEw== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: linux-gpio@vger.kernel.org Subject: [PATCH v8 1/2] dt-bindings: gpio: uniphier: add UniPhier GPIO binding Date: Thu, 12 Oct 2017 20:36:15 +0900 Message-Id: <1507808176-5223-2-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1507808176-5223-1-git-send-email-yamada.masahiro@socionext.com> References: <1507808176-5223-1-git-send-email-yamada.masahiro@socionext.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20171012_043756_851179_9273297D X-CRM114-Status: GOOD ( 15.35 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Greg Kroah-Hartman , Linus Walleij , Randy Dunlap , linux-kernel@vger.kernel.org, Masahiro Yamada , Rob Herring , Mauro Carvalho Chehab , "David S. Miller" , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This GPIO controller is used on UniPhier SoC family. The vendor specific property "socionext,interrupt-ranges" is for specifying interrupt mapping to the parent interrupt controller because the mapping is not contiguous. It works like "ranges", but transforms "interrupts" instead of "reg". Signed-off-by: Masahiro Yamada Acked-by: Rob Herring --- .../devicetree/bindings/gpio/gpio-uniphier.txt | 52 ++++++++++++++++++++++ MAINTAINERS | 1 + include/dt-bindings/gpio/uniphier-gpio.h | 18 ++++++++ 3 files changed, 71 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/gpio-uniphier.txt create mode 100644 include/dt-bindings/gpio/uniphier-gpio.h diff --git a/Documentation/devicetree/bindings/gpio/gpio-uniphier.txt b/Documentation/devicetree/bindings/gpio/gpio-uniphier.txt new file mode 100644 index 0000000..fed9158 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/gpio-uniphier.txt @@ -0,0 +1,52 @@ +UniPhier GPIO controller + +Required properties: +- compatible: Should be "socionext,uniphier-gpio". +- reg: Specifies offset and length of the register set for the device. +- gpio-controller: Marks the device node as a GPIO controller. +- #gpio-cells: Should be 2. The first cell is the pin number and the second + cell is used to specify optional parameters. +- interrupt-parent: Specifies the parent interrupt controller. +- interrupt-controller: Marks the device node as an interrupt controller. +- #interrupt-cells: Should be 2. The first cell defines the interrupt number. + The second cell bits[3:0] is used to specify trigger type as follows: + 1 = low-to-high edge triggered + 2 = high-to-low edge triggered + 4 = active high level-sensitive + 8 = active low level-sensitive + Valid combinations are 1, 2, 3, 4, 8. +- ngpios: Specifies the number of GPIO lines. +- gpio-ranges: Mapping to pin controller pins (as described in gpio.txt) +- socionext,interrupt-ranges: Specifies an interrupt number mapping between + this GPIO controller and its interrupt parent, in the form of arbitrary + number of triplets. + +Optional properties: +- gpio-ranges-group-names: Used for named gpio ranges (as described in gpio.txt) + +Example: + gpio: gpio@55000000 { + compatible = "socionext,uniphier-gpio"; + reg = <0x55000000 0x200>; + interrupt-parent = <&aidet>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 0 0>; + gpio-ranges-group-names = "gpio_range"; + ngpios = <248>; + socionext,interrupt-ranges = <0 48 16>, <16 154 5>, <21 217 3>; + }; + +Consumer Example: + + sdhci0_pwrseq { + compatible = "mmc-pwrseq-emmc"; + reset-gpios = <&gpio UNIPHIER_GPIO_PORT(29, 4) GPIO_ACTIVE_LOW>; + }; + +Please note UNIPHIER_GPIO_PORT(29, 4) represents PORT294 in the SoC document. +Unfortunately, only the one's place is octal in the port numbering. (That is, +PORT 8, 9, 18, 19, 28, 29, ... are missing.) UNIPHIER_GPIO_PORT() is a helper +macro to calculate 29 * 8 + 4. diff --git a/MAINTAINERS b/MAINTAINERS index caacc88..2474032 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2029,6 +2029,7 @@ M: Masahiro Yamada L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) T: git git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier.git S: Maintained +F: Documentation/devicetree/bindings/gpio/gpio-uniphier.txt F: arch/arm/boot/dts/uniphier* F: arch/arm/include/asm/hardware/cache-uniphier.h F: arch/arm/mach-uniphier/ diff --git a/include/dt-bindings/gpio/uniphier-gpio.h b/include/dt-bindings/gpio/uniphier-gpio.h new file mode 100644 index 0000000..9f0ad17 --- /dev/null +++ b/include/dt-bindings/gpio/uniphier-gpio.h @@ -0,0 +1,18 @@ +/* + * Copyright (C) 2017 Socionext Inc. + * Author: Masahiro Yamada + */ + +#ifndef _DT_BINDINGS_GPIO_UNIPHIER_H +#define _DT_BINDINGS_GPIO_UNIPHIER_H + +#define UNIPHIER_GPIO_LINES_PER_BANK 8 + +#define UNIPHIER_GPIO_IRQ_OFFSET ((UNIPHIER_GPIO_LINES_PER_BANK) * 15) + +#define UNIPHIER_GPIO_PORT(bank, line) \ + ((UNIPHIER_GPIO_LINES_PER_BANK) * (bank) + (line)) + +#define UNIPHIER_GPIO_IRQ(n) ((UNIPHIER_GPIO_IRQ_OFFSET) + (n)) + +#endif /* _DT_BINDINGS_GPIO_UNIPHIER_H */