From patchwork Fri Oct 13 14:59:24 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 10005013 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id CE2F5602B3 for ; Fri, 13 Oct 2017 15:01:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BEC6A290A0 for ; Fri, 13 Oct 2017 15:01:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B3A06290A2; Fri, 13 Oct 2017 15:01:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 4B0B2290A0 for ; Fri, 13 Oct 2017 15:01:44 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9AB226EBD1; Fri, 13 Oct 2017 15:00:04 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from galahad.ideasonboard.com (galahad.ideasonboard.com [185.26.127.97]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7FE066EBCC for ; Fri, 13 Oct 2017 15:00:02 +0000 (UTC) Received: from avalon.bb.dnainternet.fi (dfj612ybrt5fhg77mgycy-3.rev.dnainternet.fi [IPv6:2001:14ba:21f5:5b00:2e86:4862:ef6a:2804]) by galahad.ideasonboard.com (Postfix) with ESMTPSA id 1700F2143A; Fri, 13 Oct 2017 16:59:16 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1507906756; bh=vKjQKJwlWs+jUeBzaeGjyhjDKvmsL1KMymisSLeNNII=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=iH1g+myueQP9Fi0AAsfqi+1zdgG6acvGydtefwodvIo9EufNlDNb13ql3RXFBnCK2 scykFPV0M1g2CtyS0x1OUNqYy4hvxCQ9aOmDXAsnuRr3PkG0r/mcUmtUGqOPcLPlYf Ou4LG3lwYgdmPJN8wmSiszpUJD7fSArpq30NtGSU= From: Laurent Pinchart To: dri-devel@lists.freedesktop.org Subject: [PATCH 28/48] drm: omapdrm: dss: Pass DSS pointer to remaining dss functions Date: Fri, 13 Oct 2017 17:59:24 +0300 Message-Id: <20171013145944.26557-29-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20171013145944.26557-1-laurent.pinchart@ideasonboard.com> References: <20171013145944.26557-1-laurent.pinchart@ideasonboard.com> Cc: Tomi Valkeinen X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP This removes the need to access the global DSS private data in those functions (both for the current accesses and the future ones that will be introduced when allocating the DSS device dynamically). Signed-off-by: Laurent Pinchart Reviewed-by: Sebastian Reichel --- drivers/gpu/drm/omapdrm/dss/dispc.c | 2 +- drivers/gpu/drm/omapdrm/dss/dss.c | 9 +++++---- drivers/gpu/drm/omapdrm/dss/dss.h | 7 ++++--- drivers/gpu/drm/omapdrm/dss/venc.c | 11 +++++++---- 4 files changed, 17 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c index 7b74c8ee9372..912957c471ce 100644 --- a/drivers/gpu/drm/omapdrm/dss/dispc.c +++ b/drivers/gpu/drm/omapdrm/dss/dispc.c @@ -2737,7 +2737,7 @@ static int dispc_ovl_enable(enum omap_plane_id plane, bool enable) static enum omap_dss_output_id dispc_mgr_get_supported_outputs(enum omap_channel channel) { - return dss_get_supported_outputs(channel); + return dss_get_supported_outputs(dispc.dss, channel); } static void dispc_lcd_enable_signal_polarity(bool act_high) diff --git a/drivers/gpu/drm/omapdrm/dss/dss.c b/drivers/gpu/drm/omapdrm/dss/dss.c index 24237ed0557f..98a0da32f217 100644 --- a/drivers/gpu/drm/omapdrm/dss/dss.c +++ b/drivers/gpu/drm/omapdrm/dss/dss.c @@ -706,9 +706,10 @@ unsigned long dss_get_max_fck_rate(struct dss_device *dss) return dss->feat->fck_freq_max; } -enum omap_dss_output_id dss_get_supported_outputs(enum omap_channel channel) +enum omap_dss_output_id dss_get_supported_outputs(struct dss_device *dss, + enum omap_channel channel) { - return dss.feat->outputs[channel]; + return dss->feat->outputs[channel]; } static int dss_setup_default_clock(void) @@ -737,7 +738,7 @@ static int dss_setup_default_clock(void) return 0; } -void dss_set_venc_output(enum omap_dss_venc_type type) +void dss_set_venc_output(struct dss_device *dss, enum omap_dss_venc_type type) { int l = 0; @@ -752,7 +753,7 @@ void dss_set_venc_output(enum omap_dss_venc_type type) REG_FLD_MOD(DSS_CONTROL, l, 6, 6); } -void dss_set_dac_pwrdn_bgz(bool enable) +void dss_set_dac_pwrdn_bgz(struct dss_device *dss, bool enable) { REG_FLD_MOD(DSS_CONTROL, enable, 5, 5); /* DAC Power-Down Control */ } diff --git a/drivers/gpu/drm/omapdrm/dss/dss.h b/drivers/gpu/drm/omapdrm/dss/dss.h index cb257ffc8a54..2641d5c6a32a 100644 --- a/drivers/gpu/drm/omapdrm/dss/dss.h +++ b/drivers/gpu/drm/omapdrm/dss/dss.h @@ -286,7 +286,8 @@ void dss_runtime_put(struct dss_device *dss); unsigned long dss_get_dispc_clk_rate(struct dss_device *dss); unsigned long dss_get_max_fck_rate(struct dss_device *dss); -enum omap_dss_output_id dss_get_supported_outputs(enum omap_channel channel); +enum omap_dss_output_id dss_get_supported_outputs(struct dss_device *dss, + enum omap_channel channel); int dss_dpi_select_source(struct dss_device *dss, int port, enum omap_channel channel); void dss_select_hdmi_venc_clk_source(struct dss_device *dss, @@ -317,8 +318,8 @@ enum dss_clk_source dss_get_dsi_clk_source(struct dss_device *dss, enum dss_clk_source dss_get_lcd_clk_source(struct dss_device *dss, enum omap_channel channel); -void dss_set_venc_output(enum omap_dss_venc_type type); -void dss_set_dac_pwrdn_bgz(bool enable); +void dss_set_venc_output(struct dss_device *dss, enum omap_dss_venc_type type); +void dss_set_dac_pwrdn_bgz(struct dss_device *dss, bool enable); int dss_set_fck_rate(struct dss_device *dss, unsigned long rate); diff --git a/drivers/gpu/drm/omapdrm/dss/venc.c b/drivers/gpu/drm/omapdrm/dss/venc.c index 68035c1acf1f..179ef73a5564 100644 --- a/drivers/gpu/drm/omapdrm/dss/venc.c +++ b/drivers/gpu/drm/omapdrm/dss/venc.c @@ -327,6 +327,7 @@ static struct { struct mutex venc_lock; u32 wss_data; struct regulator *vdda_dac_reg; + struct dss_device *dss; struct dss_debugfs_entry *debugfs; @@ -472,8 +473,8 @@ static int venc_power_on(struct omap_dss_device *dssdev) venc_reset(); venc_write_config(venc_timings_to_config(&venc.vm)); - dss_set_venc_output(venc.type); - dss_set_dac_pwrdn_bgz(1); + dss_set_venc_output(venc.dss, venc.type); + dss_set_dac_pwrdn_bgz(venc.dss, 1); l = 0; @@ -503,7 +504,7 @@ static int venc_power_on(struct omap_dss_device *dssdev) regulator_disable(venc.vdda_dac_reg); err1: venc_write_reg(VENC_OUTPUT_CONTROL, 0); - dss_set_dac_pwrdn_bgz(0); + dss_set_dac_pwrdn_bgz(venc.dss, 0); venc_runtime_put(); err0: @@ -515,7 +516,7 @@ static void venc_power_off(struct omap_dss_device *dssdev) enum omap_channel channel = dssdev->dispc_channel; venc_write_reg(VENC_OUTPUT_CONTROL, 0); - dss_set_dac_pwrdn_bgz(0); + dss_set_dac_pwrdn_bgz(venc.dss, 0); dss_mgr_disable(channel); @@ -876,11 +877,13 @@ static const struct soc_device_attribute venc_soc_devices[] = { static int venc_bind(struct device *dev, struct device *master, void *data) { struct platform_device *pdev = to_platform_device(dev); + struct dss_device *dss = dss_get_device(master); u8 rev_id; struct resource *venc_mem; int r; venc.pdev = pdev; + venc.dss = dss; /* The OMAP34xx, OMAP35xx and AM35xx VENC require the TV DAC clock. */ if (soc_device_match(venc_soc_devices))