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[9/9] drm/i915/cnl: Fix DP max rate for Cannonlake with port F.

Message ID 20171016212939.29590-9-rodrigo.vivi@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Rodrigo Vivi Oct. 16, 2017, 9:29 p.m. UTC
On CNL SKUs that uses port F,  max DP rate is 8.1G for all
ports when we have the elevated voltage.

v2: Make commit message more generic.

Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)
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Patch

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 4d520c6b766a..eced3281cb2f 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -248,8 +248,9 @@  intel_dp_set_source_rates(struct intel_dp *intel_dp)
 		source_rates = cnl_rates;
 		size = ARRAY_SIZE(cnl_rates);
 		voltage = I915_READ(CNL_PORT_COMP_DW3) & VOLTAGE_INFO_MASK;
-		if (port == PORT_A || port == PORT_D ||
-		    voltage == VOLTAGE_INFO_0_85V)
+		if (voltage == VOLTAGE_INFO_0_85V ||
+		    (!IS_CNL_WITH_PORT_F(dev_priv) && (port == PORT_A ||
+						       port == PORT_D)))
 			size -= 2;
 	} else if (IS_GEN9_BC(dev_priv)) {
 		source_rates = skl_rates;