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Mon, 25 Jul 2011 06:56:40 +0000 Received: from az33smr01.freescale.net (10.64.34.199) by 039-SN1MMR1-003.039d.mgd.msft.net (10.84.1.16) with Microsoft SMTP Server id 14.1.289.8; Mon, 25 Jul 2011 01:56:27 -0500 Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by az33smr01.freescale.net (8.13.1/8.13.0) with ESMTP id p6P6uJgZ026176; Mon, 25 Jul 2011 01:56:26 -0500 (CDT) From: Tony Lin To: Subject: [PATCH v2 3/6] ARM: mxs: add usb clocks to clock tree Date: Mon, 25 Jul 2011 15:01:21 +0800 Message-ID: <1311577284-11506-4-git-send-email-tony.lin@freescale.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1311577284-11506-1-git-send-email-tony.lin@freescale.com> References: <1311577284-11506-1-git-send-email-tony.lin@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110725_025642_864996_06F04607 X-CRM114-Status: GOOD ( 14.57 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [216.32.181.185 listed in list.dnswl.org] Cc: koen.beel.barco@gmail.com, stern@rowland.harvard.edu, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Mon, 25 Jul 2011 06:58:27 +0000 (UTC) add usb host clock and usb host phy clock to clock tree add usb dummy clocks to clock tree to get rid of adding more cpu_is_mx macros Signed-off-by: Tony Lin --- arch/arm/mach-mxs/clock-mx28.c | 28 +++++++++++++++++++--------- 1 files changed, 19 insertions(+), 9 deletions(-) diff --git a/arch/arm/mach-mxs/clock-mx28.c b/arch/arm/mach-mxs/clock-mx28.c index 5dcc59d..6f3cd40 100644 --- a/arch/arm/mach-mxs/clock-mx28.c +++ b/arch/arm/mach-mxs/clock-mx28.c @@ -554,15 +554,15 @@ static struct clk rtc_clk = { .parent = &ref_xtal_clk, }; -/* usb_clk gate is controlled in DIGCTRL other than CLKCTRL */ -static struct clk usb0_clk = { - .enable_reg = DIGCTRL_BASE_ADDR, - .enable_shift = 2, - .enable = _raw_clk_enable, - .disable = _raw_clk_disable, - .parent = &pll0_clk, +static struct clk dummy_clk = { + .enable_reg = 0, + .enable_shift = 0, + .enable = NULL, + .disable = NULL, + .parent = NULL, }; +/* usb_clk gate is controlled in DIGCTRL other than CLKCTRL */ static struct clk usb1_clk = { .enable_reg = DIGCTRL_BASE_ADDR, .enable_shift = 16, @@ -571,6 +571,14 @@ static struct clk usb1_clk = { .parent = &pll1_clk, }; +/* usb phy clock for usb1 */ +static struct clk usb_phy_clk1 = { + .parent = &pll1_clk, + .enable = _raw_clk_disable, + .disable = _raw_clk_enable, + .enable_reg = CLKCTRL_BASE_ADDR + HW_CLKCTRL_PLL1CTRL0, + .enable_shift = 18, +}; #define _DEFINE_CLOCK(name, er, es, p) \ static struct clk name = { \ .enable_reg = CLKCTRL_BASE_ADDR + HW_CLKCTRL_##er, \ @@ -627,8 +635,10 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK("mxs-mmc.1", NULL, ssp1_clk) _REGISTER_CLOCK("flexcan.0", NULL, can0_clk) _REGISTER_CLOCK("flexcan.1", NULL, can1_clk) - _REGISTER_CLOCK(NULL, "usb0", usb0_clk) - _REGISTER_CLOCK(NULL, "usb1", usb1_clk) + _REGISTER_CLOCK("mxc-ehci", "usb1", usb1_clk) + _REGISTER_CLOCK("mxc-ehci", "usb1_phy", usb_phy_clk1) + _REGISTER_CLOCK("mxc-ehci", "usb", dummy_clk) + _REGISTER_CLOCK("mxc-ehci", "usb_ahb", dummy_clk) _REGISTER_CLOCK("mxs-pwm.0", NULL, pwm_clk) _REGISTER_CLOCK("mxs-pwm.1", NULL, pwm_clk) _REGISTER_CLOCK("mxs-pwm.2", NULL, pwm_clk)